URL
https://opencores.org/ocsvn/xgate/xgate/trunk
Subversion Repositories xgate
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- This comparison shows the changes necessary to convert path
/xgate
- from Rev 60 to Rev 61
- ↔ Reverse comparison
Rev 60 → Rev 61
/trunk/README.txt
3,6 → 3,21
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// SVN tag: None |
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Apr 5,2010 |
RTL - First pass at fixing bug when entering DEBUG by command from the slave |
WISHBONE bus. All tests now pass when the RAM wait states are set to zero, |
although there are errors in DEBUG mode when RAM wait states are increased. |
Icarus Verilog version 0.9.2 now supports the "generate" command. This is |
now used to instantiate the semaphore registers. |
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Testbench - Added capability to insert wait states on RAM access. |
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Doc - No change. |
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// SVN tag: None |
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Feb 12,2010 |
RTL - Update to the WISHBONE interface when wait states are enabled to trade |
16 data flops for 5 address registers. This change now also requires single |