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Subversion Repositories xgate

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  • This comparison shows the changes necessary to convert path
    /xgate
    from Rev 62 to Rev 63
    Reverse comparison

Rev 62 → Rev 63

/trunk/rtl/verilog/xgate_top.v
67,8 → 67,6
input wbm_ack_i, // bus cycle acknowledge input
// XGATE IO Signals
output [ 7:0] xgswt, // XGATE Software Trigger Register
output write_mem_strb_l, // Strobe for writing low data byte
output write_mem_strb_h, // Strobe for writing high data bye
output xg_sw_irq, // Xgate Software interrupt
output [MAX_CHANNEL:0] xgif, // XGATE Interrupt Flag
input [MAX_CHANNEL:0] chan_req_i, // XGATE Interrupt request
148,10 → 146,9
wire single_step; // Pulse to trigger a single instruction execution in debug mode
wire ss_mem_ack; // WISHBONE Bus has granted single step memory access
wire [ 7:0] host_semap; // Semaphore status for host
// wire [15:0] write_mem_data;
// wire [15:0] read_mem_data;
// wire [15:0] perif_data;
wire [ 7:0] host_semap; // Semaphore status for host
wire write_mem_strb_l; // Strobe for writing low data byte
wire write_mem_strb_h; // Strobe for writing high data bye
assign xgif = xgif_status[MAX_CHANNEL:0];
// ---------------------------------------------------------------------------

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