OpenCores
URL https://opencores.org/ocsvn/xulalx25soc/xulalx25soc/trunk

Subversion Repositories xulalx25soc

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /xulalx25soc/trunk/bench/cpp
    from Rev 116 to Rev 117
    ↔ Reverse comparison
  •

Rev 116 → Rev 117

/pipecmdr.cpp File deleted
/Makefile
46,7 → 46,7
OBJDIR := obj-pc
YYMMDD := `date +%Y%m%d`
VOBJDR := ../../rtl/obj_dir
VROOT := /usr/share/verilator
VROOT ?= $(shell bash -c 'verilator -V|grep VERILATOR_ROOT | head -1 | sed -e " s/^.*=\s*//"')
VINC := -I$(VROOT)/include -I$(VOBJDR)
CFLAGS := -c -g -Wall -I. $(VINC)
# Now return to the "all" target, and fill in some details
/busmaster_tb.cpp
116,6 → 116,8
#ifdef XULA25
sdcard_miso = m_sdcard(m_core->o_sd_cs_n, m_core->o_spi_sck,
m_core->o_spi_mosi);
#else
sdcard_miso = 1;
#endif
 
if ((m_core->o_sf_cs_n)&&(m_core->o_sd_cs_n))
138,7 → 140,7
m_core->v__DOT__serialport__DOT__r_setup);
PIPECMDR::tick();
 
// #define DEBUGGING_OUTPUT
#define DEBUGGING_OUTPUT
#ifdef DEBUGGING_OUTPUT
bool writeout = false;
/*
154,8 → 156,8
writeout = true;
*/
 
if ((m_core->v__DOT__wbu_cyc)&&(!m_core->v__DOT__wbu_we))
writeout = true;
// if ((m_core->v__DOT__wbu_cyc)&&(!m_core->v__DOT__wbu_we))
// writeout = true;
/*
if ((m_core->v__DOT__wbu_cyc)&&(!m_core->v__DOT__wbu_we))
writeout = true;
163,10 → 165,10
writeout = true;
*/
 
if ((m_core->v__DOT__zippy__DOT__thecpu__DOT__instruction_decoder__DOT__genblk3__DOT__r_early_branch)
&&(m_core->v__DOT__zippy__DOT__thecpu__DOT__instruction == 0x7883ffff))
m_busy+=2;
else if (m_busy > 0) m_busy--;
// if ((m_core->v__DOT__zippy__DOT__thecpu__DOT__instruction_decoder__DOT__genblk3__DOT__r_early_branch)
// &&(m_core->v__DOT__zippy__DOT__thecpu__DOT__instruction == 0x7883ffff))
// m_busy+=2;
// else if (m_busy > 0) m_busy--;
#define v__DOT__wb_addr v__DOT__dwb_addr
#define v__DOT__dwb_stall v__DOT__wb_stall
#define v__DOT__dwb_ack v__DOT__wb_ack
200,8 → 202,10
|((m_core->v__DOT__serialport__DOT__txmod__DOT__lcl_data)<<8)
|((m_core->v__DOT__serialport__DOT__txmod__DOT__baud_counter&0x0f)<<4)
|(m_core->v__DOT__serialport__DOT__txmod__DOT__state);
/*
if (tx_state != m_last_tx_state)
writeout = true;
*/
int bus_owner = m_core->v__DOT__wbu_zip_arbiter__DOT__r_a_owner;
bus_owner |= (m_core->v__DOT__wbu_cyc)?2:0;
bus_owner |= (m_core->v__DOT__dwb_cyc)?4:0;
214,8 → 218,10
#ifdef XULA25
bus_owner |= (m_core->v__DOT__zippy__DOT__ext_cyc)?512:0;
#endif
/*
if (bus_owner != m_last_bus_owner)
writeout = true;
*/
/*
writeout = (writeout)||(m_core->i_rx_stb)
||((m_core->o_tx_stb)&&(!m_core->i_tx_busy));
359,17 → 365,17
(m_core->v__DOT__zippy__DOT__thecpu__DOT__op_ce)?"k":"-",
(m_core->v__DOT__zippy__DOT__thecpu__DOT__op_stall)?"s":"-",
(m_core->v__DOT__zippy__DOT__thecpu__DOT__op_illegal)?"i":"-",
(m_core->v__DOT__zippy__DOT__thecpu__DOT__op_break)?"B":"-",
(m_core->v__DOT__zippy__DOT__thecpu__DOT__r_op_break)?"B":"-",
(m_core->v__DOT__zippy__DOT__thecpu__DOT__genblk5__DOT__r_op_lock)?"L":"-",
(m_core->v__DOT__zippy__DOT__thecpu__DOT__r_op_pipe)?"P":"-",
(m_core->v__DOT__zippy__DOT__thecpu__DOT__break_pending)?"p":"-",
(m_core->v__DOT__zippy__DOT__thecpu__DOT__op_gie)?"G":"-",
(m_core->v__DOT__zippy__DOT__thecpu__DOT__r_break_pending)?"p":"-",
(m_core->v__DOT__zippy__DOT__thecpu__DOT__r_op_gie)?"G":"-",
(m_core->v__DOT__zippy__DOT__thecpu__DOT__opvalid_alu)?"A":"-");
printf("|%s%s%s%s%s",
(m_core->v__DOT__zippy__DOT__thecpu__DOT__alu_ce)?"a":"-",
(m_core->v__DOT__zippy__DOT__thecpu__DOT__alu_stall)?"s":"-",
(m_core->v__DOT__zippy__DOT__thecpu__DOT__doalu__DOT__genblk2__DOT__r_busy)?"B":"-",
(m_core->v__DOT__zippy__DOT__thecpu__DOT__alu_gie)?"G":"-",
(m_core->v__DOT__zippy__DOT__thecpu__DOT__r_alu_gie)?"G":"-",
(m_core->v__DOT__zippy__DOT__thecpu__DOT__r_alu_illegal)?"i":"-");
printf("|%s%s%s%2x %s%s%s %2d %2d",
(m_core->v__DOT__zippy__DOT__thecpu__DOT__opvalid_mem)?"M":"-",
408,9 → 414,9
(m_core->v__DOT__zippy__DOT__thecpu__DOT__opvalid)?'O':'-',
m_core->v__DOT__zippy__DOT__thecpu__DOT__op_pc,
(m_core->v__DOT__zippy__DOT__thecpu__DOT__alu_valid)?'A':'-',
m_core->v__DOT__zippy__DOT__thecpu__DOT__alu_pc);
#ifdef XULA25
m_core->v__DOT__zippy__DOT__thecpu__DOT__r_alu_pc);
/*
// Prefetch debugging
printf(" [PC%08x,LST%08x]->[%d%s%s](%d,%08x/%08x)->%08x@%08x",
m_core->v__DOT__zippy__DOT__thecpu__DOT__pf_pc,
427,23 → 433,16
m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__r_last_cache,
m_core->v__DOT__zippy__DOT__thecpu__DOT__instruction,
m_core->v__DOT__zippy__DOT__thecpu__DOT__instruction_pc);
#else
printf(" [PC%08x,R%08x]%s%s%s",
m_core->v__DOT__zippy__DOT__thecpu__DOT__pf_pc,
m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__r_addr,
(m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__w_pc_out_of_bounds)?"OOB":" ",
(m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__w_running_out_of_cache)?"RUN":" ",
(m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__w_ran_off_end_of_cache)?"END":" ");
#endif
*/
 
// Decode Stage debugging
// (nothing)
 
// Op Stage debugging
printf(" Op(%02x,%02x->%02x)",
m_core->v__DOT__zippy__DOT__thecpu__DOT__dcdOp,
m_core->v__DOT__zippy__DOT__thecpu__DOT__opn,
m_core->v__DOT__zippy__DOT__thecpu__DOT__opR);
// printf(" Op(%02x,%02x->%02x)",
// m_core->v__DOT__zippy__DOT__thecpu__DOT__dcdOp,
// m_core->v__DOT__zippy__DOT__thecpu__DOT__opn,
// m_core->v__DOT__zippy__DOT__thecpu__DOT__opR);
 
printf(" %s[%02x]=%08x(%08x)",
m_core->v__DOT__zippy__DOT__thecpu__DOT__wr_reg_ce?"WR":"--",
466,6 → 465,7
m_core->v__DOT__zippy__DOT__thecpu__DOT__mem_wreg);
 
// domem, the pipelined memory unit debugging
/*
printf(" M[%s@0x%08x]",
(m_core->v__DOT__zippy__DOT__thecpu__DOT__opvalid_mem)
?((m_core->v__DOT__zippy__DOT__thecpu__DOT__opn&1)?"W":"R")
476,20 → 476,33
0
#endif
);
*/
 
/*
printf("%s%s",
(m_core->v__DOT__zippy__DOT__thecpu__DOT__domem__DOT__cyc)?"B":"-",
(m_core->v__DOT__zippy__DOT__thecpu__DOT__mem_rdbusy)?"r":"-");
/*
*/
#ifdef XULA25
printf(" %s-%s %04x/%04x",
(m_core->v__DOT__zippy__DOT__genblk10__DOT__pic__DOT__r_any)?"PIC":"pic",
(m_core->v__DOT__zippy__DOT__genblk10__DOT__pic__DOT__r_gie)?"INT":"( )",
m_core->v__DOT__zippy__DOT__genblk10__DOT__pic__DOT__r_int_enable,
m_core->v__DOT__zippy__DOT__genblk10__DOT__pic__DOT__r_int_state);
*/
#else
printf(" %s-%s %04x/%04x",
(m_core->v__DOT__runio__DOT__intcontroller__DOT__r_any)?"PIC":"pic",
(m_core->v__DOT__runio__DOT__intcontroller__DOT__r_gie)?"INT":"( )",
m_core->v__DOT__runio__DOT__intcontroller__DOT__r_int_enable,
m_core->v__DOT__runio__DOT__intcontroller__DOT__r_int_state);
#endif
 
/*
printf(" %s",
(m_core->v__DOT__zippy__DOT__thecpu__DOT__cc_invalid_for_dcd)?"CCI":" ");
*/
 
/*
// Illegal instruction debugging
printf(" ILL[%s%s%s%s%s%s]",
581,12 → 594,16
 
 
/*
printf(" DMAC[%d]: %08x/%08x/%08x(%03x) -- (%d,%d,%c)%c%c:@%08x-[%4d,%4d/%4d,%4d-#%4d]%08x",
printf(" DMAC[%d]: %08x/%08x/%08x(%03x)%d%d%d%d -- (%d,%d,%c)%c%c:@%08x-[%4d,%4d/%4d,%4d-#%4d]%08x",
m_core->v__DOT__zippy__DOT__dma_controller__DOT__dma_state,
m_core->v__DOT__zippy__DOT__dma_controller__DOT__cfg_waddr,
m_core->v__DOT__zippy__DOT__dma_controller__DOT__cfg_raddr,
m_core->v__DOT__zippy__DOT__dma_controller__DOT__cfg_len,
m_core->v__DOT__zippy__DOT__dma_controller__DOT__cfg_blocklen_sub_one,
m_core->v__DOT__zippy__DOT__dma_controller__DOT__last_read_request,
m_core->v__DOT__zippy__DOT__dma_controller__DOT__last_read_ack,
m_core->v__DOT__zippy__DOT__dma_controller__DOT__last_write_request,
m_core->v__DOT__zippy__DOT__dma_controller__DOT__last_write_ack,
m_core->v__DOT__zippy__DOT__dc_cyc,
// m_core->v__DOT__zippy__DOT__dc_stb,
(m_core->v__DOT__zippy__DOT__dma_controller__DOT__dma_state == 2)?1:0,
604,12 → 621,16
m_core->v__DOT__zippy__DOT__dma_controller__DOT__nwacks,
m_core->v__DOT__zippy__DOT__dma_controller__DOT__nwritten,
m_core->v__DOT__zippy__DOT__dc_data);
*/
 
#ifdef OPT_ZIPSYSTEM
printf(" %08x-PIC%08x",
m_core->v__DOT__zippy__DOT__main_int_vector,
m_core->v__DOT__zippy__DOT__pic_data);
*/
#endif
 
printf(" R0 = %08x", m_core->v__DOT__zippy__DOT__thecpu__DOT__regset[0]);
 
printf("\n"); fflush(stdout);
} m_last_writeout = writeout;
 
628,13 → 649,15
#endif // DEBUGGING_OUTPUT
}
 
#ifdef DEBUGGING_OUTPUT
bool dcd_ce(void) {
if (!m_core->v__DOT__zippy__DOT__thecpu__DOT__r_dcdvalid)
return true;
if (!m_core->v__DOT__zippy__DOT__thecpu__DOT__op_stall)
return true;
// if (!m_core->v__DOT__zippy__DOT__thecpu__DOT__op_stall)
// return true;
return false;
}
#endif
 
};
 

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