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URL https://opencores.org/ocsvn/xulalx25soc/xulalx25soc/trunk

Subversion Repositories xulalx25soc

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  • This comparison shows the changes necessary to convert path
    /xulalx25soc/trunk/bench
    from Rev 37 to Rev 47
    Reverse comparison

Rev 37 → Rev 47

/cpp/pipecmdr.h
40,8 → 40,10
//
// At 4MBaud, each bit takes 25 clocks. 10 bits would thus take 250 clocks
//
#define UARTLEN 250 // Minimum ticks per character, 4M Baud
// #define UARTLEN 250 // Minimum ticks per character, 4M Baud
// #define UARTLEN 1000 // Minimum ticks per character, 1M Hz
// #define UARTLEN 8 // Minimum ticks per character
#define UARTLEN 4096 //
 
template <class VA> class PIPECMDR : public TESTB<VA> {
void setup_listener(const int port) {
84,7 → 86,7
public:
int m_skt, m_con;
char m_txbuf[PIPEBUFLEN], m_rxbuf[PIPEBUFLEN];
int m_ilen, m_rxpos, m_txpos, m_uart_wait;
int m_ilen, m_rxpos, m_txpos, m_uart_wait, m_tx_busy;
bool m_started_flag;
 
PIPECMDR(const int port) : TESTB<VA>() {
92,7 → 94,8
setup_listener(port);
m_rxpos = m_txpos = m_ilen = 0;
m_started_flag = false;
m_uart_wait = 0;
m_uart_wait = 0; // Flow control into the FPGA
m_tx_busy = 0; // Flow control out of the FPGA
}
 
virtual void kill(void) {
174,22 → 177,44
*/
TESTB<VA>::tick();
 
if ((TESTB<VA>::m_core->o_tx_stb)&&(m_con > 0)) {
m_txbuf[m_txpos++] = TESTB<VA>::m_core->o_tx_data;
if ((TESTB<VA>::m_core->o_tx_data == '\n')||(m_txpos >= sizeof(m_txbuf))) {
int snt = 0;
snt = send(m_con, m_txbuf, m_txpos, 0);
 
m_txbuf[m_txpos] = '\0';
printf("> %s", m_txbuf);
if (snt < m_txpos) {
fprintf(stderr, "Only sent %d bytes!\n",
snt);
bool tx_accepted = false;
if (m_tx_busy == 0) {
if ((TESTB<VA>::m_core->o_tx_stb)&&(m_con > 0)) {
m_txbuf[m_txpos++] = TESTB<VA>::m_core->o_tx_data;
tx_accepted = true;
if ((TESTB<VA>::m_core->o_tx_data == '\n')||(m_txpos >= sizeof(m_txbuf))) {
int snt = 0;
snt = send(m_con, m_txbuf, m_txpos, 0);
m_txbuf[m_txpos] = '\0';
printf("> %s", m_txbuf);
if (snt < m_txpos) {
fprintf(stderr, "Only sent %d bytes!\n",
snt);
}
m_txpos = 0;
}
m_txpos = 0;
}
} else
m_tx_busy--;
 
if ((TESTB<VA>::m_core->o_tx_stb)&&(TESTB<VA>::m_core->i_tx_busy==0))
m_tx_busy = UARTLEN;
TESTB<VA>::m_core->i_tx_busy = (m_tx_busy != 0);
 
if (0) {
if ((m_tx_busy!=0)||(TESTB<VA>::m_core->i_tx_busy)
||(TESTB<VA>::m_core->o_tx_stb)
||(tx_accepted))
printf("%4d %d %d %02x %s\n",
m_tx_busy,
TESTB<VA>::m_core->i_tx_busy,
TESTB<VA>::m_core->o_tx_stb,
TESTB<VA>::m_core->o_tx_data,
(tx_accepted)?"READ!":"");
}
 
 
/*
if((TESTB<VA>::m_core->o_wb_cyc)||(TESTB<VA>::m_core->o_wb_stb)){
printf("BUS: %d,%d,%d %8x %8x\n",
/cpp/busmaster_tb.cpp
59,9 → 59,12
void tick(void) {
if ((m_tickcount & ((1<<28)-1))==0) {
double ticks_per_second = m_tickcount;
time_t seconds_passed = time(NULL)-m_start_time;
if (seconds_passed != 0) {
ticks_per_second /= (double)(time(NULL) - m_start_time);
printf(" ******** %.6f TICKS PER SECOND\n",
ticks_per_second);
}
}
 
// Set up the bus before any clock tick

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