URL
https://opencores.org/ocsvn/xulalx25soc/xulalx25soc/trunk
Subversion Repositories xulalx25soc
Compare Revisions
- This comparison shows the changes necessary to convert path
/xulalx25soc/trunk/xilinx
- from Rev 6 to Rev 7
- ↔ Reverse comparison
Rev 6 → Rev 7
/Makefile
12,7 → 12,17
## produced via ISE. Still ... for a command line make script, it is a |
## (good) start. |
## |
## Makefile targets: |
## |
## xula.bit The FPGA bitfile or configuration file |
## |
## objdir Makes a directory for temporary build files, which can |
## then be removed later with a clean target. While a |
## great idea in principle, this doesn't work well in |
## practice since Xilinx's ISE never uses it. |
## |
## clean Removes intermediate build files. |
## |
## Creator: Dan Gisselquist, Ph.D. |
## Gisselquist Technology, LLC |
## |
54,7 → 64,8
JTAGBUS := wbufifo.v wbubus.v wbucompactlines.v wbucompress.v \ |
wbudecompress.v wbudeword.v wbuexec.v wbuidleint.v wbuinput.v \ |
wbuoutput.v wbureadcw.v wbusixchar.v wbutohex.v |
PERIPHERALS: wbgpio.v wbpwmaudio.v rxuart.v txuart.v rtcdate.v rtclight.v |
PERIPHERALS: wbgpio.v wbpwmaudio.v rxuart.v txuart.v uartdev.v \ |
rtcdate.v rtclight.v |
CPUSRC := zipsystem.v \ |
busdelay.v wbarbiter.v wbdblpriarb.v \ |
zipcpu.v cpuops.v pfcache.v idecode.v pipemem.v pipefetch.v div.v \ |