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URL https://opencores.org/ocsvn/xulalx25soc/xulalx25soc/trunk

Subversion Repositories xulalx25soc

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /xulalx25soc
    from Rev 104 to Rev 105
    ↔ Reverse comparison
  •

Rev 104 → Rev 105

/trunk/sw/cpuscope.cpp
1,18 → 1,41
////////////////////////////////////////////////////////////////////////////////
//
//
// Filename: cpuscope.cpp
//
// Project: FPGA library development (Basys-3 development board)
// Project: XuLA2-LX25 SoC based upon the ZipCPU
//
// Purpose: To read out, and decompose, the results of the wishbone scope
// as applied to the ICAPE2 interaction.
//
// Creator: Dan Gisselquist
// Gisselquist Tecnology, LLC
// Creator: Dan Gisselquist, Ph.D.
// Gisselquist Technology, LLC
//
// Copyright: 2015
////////////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2015-2016, Gisselquist Technology, LLC
//
// This program is free software (firmware): you can redistribute it and/or
// modify it under the terms of the GNU General Public License as published
// by the Free Software Foundation, either version 3 of the License, or (at
// your option) any later version.
//
// This program is distributed in the hope that it will be useful, but WITHOUT
// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with this program. (It's in the $(ROOT)/doc directory, run make with no
// target there if the PDF file isn't present.) If not, see
// <http://www.gnu.org/licenses/> for a copy.
//
// License: GPL, v3, as defined and found on www.gnu.org,
// http://www.gnu.org/licenses/gpl.html
//
//
////////////////////////////////////////////////////////////////////////////////
//
//
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
55,9 → 78,33
return r;
}
 
void decode(DEVBUS::BUSW val) {
}
int main(int argc, char **argv) {
FPGAOPEN(m_fpga);
int skp=0, port = FPGAPORT;
bool use_usb = true;
 
skp=1;
for(int argn=0; argn<argc-skp; argn++) {
if (argv[argn+skp][0] == '-') {
if (argv[argn+skp][1] == 'u')
use_usb = true;
else if (argv[argn+skp][1] == 'p') {
use_usb = false;
if (isdigit(argv[argn+skp][2]))
port = atoi(&argv[argn+skp][2]);
}
skp++; argn--;
} else
argv[argn] = argv[argn+skp];
} argc -= skp;
 
if (use_usb)
m_fpga = new FPGA(new USBI());
else
m_fpga = new FPGA(new NETCOMMS(FPGAHOST, port));
 
signal(SIGSTOP, closeup);
signal(SIGHUP, closeup);
 
81,7 → 128,10
DEVBUS::BUSW *buf;
buf = new DEVBUS::BUSW[scoplen];
 
if (false) {
bool compressed = false, vector_read = true;
DEVBUS::BUSW addrv = 0;
 
if (vector_read) {
m_fpga->readz(WBSCOPEDATA, scoplen, buf);
} else {
for(unsigned int i=0; i<scoplen; i++)
88,72 → 138,27
buf[i] = m_fpga->readio(WBSCOPEDATA);
}
 
for(unsigned int i=0; i<scoplen; i++) {
char sbuf[64];
 
if ((i>0)&&(buf[i] == buf[i-1])&&
(i<scoplen-1)&&(buf[i] == buf[i+1]))
continue;
printf("%6d %08x:", i, buf[i]);
 
unsigned addr = (buf[i]>>24)&0x0ff;
zipi_to_string(m_fpga->readio(0x02000+addr),sbuf);
printf(" %2x %-24s", (buf[i]>>24)&0x0ff, sbuf);
printf(" %s%s%s%s%s %s%s%s",
((buf[i]>>23)&1)?"P":" ",
((buf[i]>>22)&1)?"D":" ",
((buf[i]>>21)&1)?"O":" ",
((buf[i]>>20)&1)?"A":" ",
((buf[i]>>19)&1)?"M":" ",
((buf[i]>>18)&1)?"o":" ",
((buf[i]>>17)&1)?"a":" ",
((buf[i]>>16)&1)?"m":" ");
printf(" A=%02x ", (buf[i]>>8)&0x0ff);
printf(" %s%02x ",
(((buf[i]>>16)&3)!=0)?"W->":"(w)",
(buf[i]&0x0ff));
/*
printf("%s", ((buf[i]>>31)&1)?"OpV":" ");
printf("%s", ((buf[i]>>30)&1)?"opA":" ");
printf("%s", ((buf[i]>>29)&1)?"AlV":" ");
printf("%s", ((buf[i]>>28)&1)?"AlW":" ");
printf("%s", ((buf[i]>>27)&1)?"opM":" ");
printf("%s", ((buf[i]>>26)&1)?"MmV":" ");
if (true) {
int op = (buf[i]>>22)&0x0f;
switch(op) {
case 0: printf("CMP "); break;
case 1: printf("TST "); break;
case 2: printf("MOV "); break;
case 3: printf("LDI "); break;
case 4: printf("AUX "); break;
case 5: printf("ROL "); break;
case 6: printf("LOD "); break;
case 7: printf("STO "); break;
case 8: printf("SUB "); break;
case 9: printf("AND "); break;
case 10: printf("ADD "); break;
case 11: printf(" OR "); break;
case 12: printf("XOR "); break;
case 13: printf("LSL "); break;
case 14: printf("ASR "); break;
case 15: printf("LSR "); break;
default: printf("ILL "); break;
if(compressed) {
for(int i=0; i<(int)scoplen; i++) {
if ((buf[i]>>31)&1) {
addrv += (buf[i]&0x7fffffff);
printf(" ** \n");
continue;
}
} else
printf("%x", (buf[i]>>22)&0x0f);
printf(" %s", ((buf[i]>>21)&1)?"W":" ");
if ((buf[i]>>21)&1)
printf("[%X]", ((buf[i]>>17)&0x0f));
else
printf("(%x)", ((buf[i]>>17)&0x0f));
printf("D[%X]", ((buf[i]>>13)&0x0f));
printf(" r_opA=..%02x", (buf[i]>>7)&0x3f);
printf(" opA=..%02x", (buf[i]>>1)&0x3f);
printf(" ALU=..%d", buf[i]&1);
*/
 
printf("\n");
printf("%10d %08x: ", addrv++, buf[i]);
decode(buf[i]);
printf("\n");
}
} else {
for(int i=0; i<(int)scoplen; i++) {
if ((i>0)&&(buf[i] == buf[i-1])&&(i<(int)(scoplen-1))) {
if ((i>2)&&(buf[i] != buf[i-2]))
printf(" **** ****\n");
continue;
} printf("%9d %08x: ", i, buf[i]);
decode(buf[i]);
printf("\n");
}
}
 
if (m_fpga->poll()) {
161,6 → 166,8
m_fpga->clear();
m_fpga->writeio(R_ICONTROL, SCOPEN);
}
 
delete[] buf;
delete m_fpga;
}
 
/trunk/sw/dumpflash.cpp
71,7 → 71,7
 
// SPI flash testing
// Enable the faster (vector) reads
bool vector_read = false;
bool vector_read = true;
unsigned sz;
 
if (vector_read) {
/trunk/sw/cfgscope.cpp
13,7 → 13,7
//
////////////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2015, Gisselquist Technology, LLC
// Copyright (C) 2015-2016, Gisselquist Technology, LLC
//
// This program is free software (firmware): you can redistribute it and/or
// modify it under the terms of the GNU General Public License as published
120,7 → 120,7
DEVBUS::BUSW *buf;
buf = new DEVBUS::BUSW[scoplen];
 
if (false) {
if (true) {
m_fpga->readz(WBSCOPEDATA, scoplen, buf);
} else {
for(unsigned int i=0; i<scoplen; i++)
/trunk/sw/dumpsdram.cpp
12,7 → 12,7
//
////////////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2015, Gisselquist Technology, LLC
// Copyright (C) 2015-2016, Gisselquist Technology, LLC
//
// This program is free software (firmware): you can redistribute it and/or
// modify it under the terms of the GNU General Public License as published
93,6 → 93,7
m_fpga = new FPGA(new NETCOMMS(FPGAHOST, port));
 
 
// Read our file and copy it into memory
try {
int nr;
pos = SDRAMBASE;
132,6 → 133,7
 
unsigned mmaddr[65536], mmval[65536], mmidx = 0;
 
// Read it back from memory
try {
pos = SDRAMBASE;
const unsigned int MAXRAM = SDRAMBASE*2;
/trunk/sw/Makefile
12,7 → 12,7
##
################################################################################
##
## Copyright (C) 2015, Gisselquist Technology, LLC
## Copyright (C) 2015-2016, Gisselquist Technology, LLC
##
## This program is free software (firmware): you can redistribute it and/or
## modify it under the terms of the GNU General Public License as published
33,7 → 33,8
##
.PHONY: all
PROGRAMS := $(OBJDIR) usbtst wbregs netusb wbsettime dumpflash \
dumpsdram ziprun ramscope zipstate zipdbg cfgscope
dumpsdram ziprun ramscope zipstate zipdbg cfgscope loadmem \
sdcardscop uartscope
all: $(PROGRAMS)
CXX := g++
LIBUSBINC := -I/usr/include/libusb-1.0/
42,15 → 43,13
ZIPD := /home/dan/work/rnd/zipcpu/trunk/sw/zasm
BUSSRCS := ttybus.cpp llcomms.cpp regdefs.cpp usbi.cpp
SOURCES := ziprun.cpp zipdbg.cpp dumpsdram.cpp wbregs.cpp netusb.cpp \
flashdrvr.cpp $(BUSSRCS)
flashdrvr.cpp loadmem.cpp $(BUSSRCS)
HEADERS := llcomms.h ttybus.h devbus.h regdefs.h usbi.h flashdrvr.h
OBJECTS := $(addprefix $(OBJDIR)/,$(subst .cpp,.o,$(SOURCES)))
BUSOBJS := $(addprefix $(OBJDIR)/,$(subst .cpp,.o,$(BUSSRCS)))
CFLAGS := -g -Wall $(LIBUSBINC) -I. -I../../fpgalib/sw
CFLAGS := -g -Wall $(LIBUSBINC) -I.
LIBS := -lusb-1.0
 
all: $(PROGRAMS)
 
%.o: $(OBJDIR)/ $(OBJDIR)/%.o
$(OBJDIR)/%.o: %.cpp
$(CXX) $(CFLAGS) -c $< -o $@
70,6 → 69,8
$(CXX) $(CFLAGS) $^ $(LIBS) -o $@
wbsettime: $(OBJDIR)/wbsettime.o $(BUSOBJS)
$(CXX) $(CFLAGS) $^ $(LIBS) -o $@
bustest: $(OBJDIR)/bustest.o $(BUSOBJS)
$(CXX) $(CFLAGS) $^ $(LIBS) -o $@
wbregs: $(OBJDIR)/wbregs.o $(BUSOBJS)
$(CXX) $(CFLAGS) $^ $(LIBS) -o $@
dumpflash: $(OBJDIR)/dumpflash.o $(BUSOBJS)
76,18 → 77,24
$(CXX) $(CFLAGS) $^ $(LIBS) -o $@
cfgscope: $(OBJDIR)/cfgscope.o $(BUSOBJS)
$(CXX) $(CFLAGS) $^ $(LIBS) -o $@
sdcardscop: $(OBJDIR)/sdcardscop.o $(BUSOBJS)
$(CXX) $(CFLAGS) $^ $(LIBS) -o $@
uartscope: $(OBJDIR)/uartscope.o $(BUSOBJS)
$(CXX) $(CFLAGS) $^ $(LIBS) -o $@
ramscope: $(OBJDIR)/ramscope.o $(BUSOBJS)
$(CXX) $(CFLAGS) $^ $(LIBS) -o $@
dumpsdram: $(OBJDIR)/dumpsdram.o $(BUSOBJS)
$(CXX) $(CFLAGS) $^ $(LIBS) -o $@
loadmem: $(OBJDIR)/loadmem.o $(BUSOBJS)
$(CXX) $(CFLAGS) $^ $(LIBS) -o $@
ziprun: $(OBJDIR)/ziprun.o $(OBJDIR)/flashdrvr.o $(BUSOBJS)
$(CXX) $(CFLAGS) $^ $(LIBS) -lelf -o $@
zipstate: $(OBJDIR)/zipstate.o $(BUSOBJS)
$(CXX) $(CFLAGS) $^ $(LIBS) -o $@
ZIPSRCS := $(addprefix $(ZIPD)/,twoc.cpp zparser.cpp zopcodes.cpp)
ZIPSRCS := $(addprefix $(ZIPD)/,zparser.cpp zopcodes.cpp)
ZIPOBJS := twoc.o zparser.o zopcodes.o
ZIPOBJS := $(addprefix $(ZIPD)/$(OBJDIR)/,$(ZIPOBJS_RAW))
zipdbg: $(OBJDIR)/zipdbg.o $(BUSOBJS) $(ZIPSRCS)
# ZIPOBJS := $(addprefix $(ZIPD)/$(OBJDIR)/,$(ZIPOBJS_RAW))
zipdbg: $(OBJDIR)/zipdbg.o $(BUSOBJS) $(ZIPSRCS) $(OBJDIR)/twoc.o
$(CXX) $(CFLAGS) $^ $(LIBS) -lncurses -o $@
cpuscope: $(OBJDIR)/cpuscope.o $(BUSOBJS) $(ZIPOBJS)
$(CXX) $(CFLAGS) $^ $(LIBS) -o $@

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