URL
https://opencores.org/ocsvn/yacc/yacc/trunk
Subversion Repositories yacc
Compare Revisions
- This comparison shows the changes necessary to convert path
/yacc/trunk/bench/c_src/calculator
- from Rev 2 to Rev 4
- ↔ Reverse comparison
Rev 2 → Rev 4
/code2.hex
0,0 → 1,50
:10000000008b000b000c003f0018ff00020000fff7 |
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/code3.hex
0,0 → 1,50
:100000000070008800180080002afd043d000effeb |
:100010002e00010008000800ff0800ff000301fc9b |
:1000200000080000000f00fc000000fc00000000c1 |
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/test2.exe
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
test2.exe
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: code.txt
===================================================================
--- code.txt (nonexistent)
+++ code.txt (revision 4)
@@ -0,0 +1,775 @@
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Index: uart_echo_test.c
===================================================================
--- uart_echo_test.c (nonexistent)
+++ uart_echo_test.c (revision 4)
@@ -0,0 +1,470 @@
+//Apr.4.2005 Rewritten for RAM16K and Engilish
+//RTL Simulation use Only
+//By using uart echo technique, UART interrupt routine and h/w are checked.
+//YACC Project on CYCLONE 4KRAM
+//Jul.15.2004 Simple 32bit calculator
+//
+
+
+#define print_port 0x3ff0
+#define print_char_port 0x3ff1
+#define print_int_port 0x3ff2
+#define print_long_port 0x3ff4
+
+
+#define uart_port 0x03ffc //for 16KRAM
+#define uart_wport uart_port
+#define uart_rport uart_port
+#define int_set_address 0x03ff8 //for 16KRAM
+
+
+
+#define BUFFER_SIZE 120
+unsigned char * read_ptr;
+char buffer[BUFFER_SIZE];//
+char result_buffer[8];//8+1
+unsigned char sym;
+unsigned char* char_ptr;
+long term(void);
+long factor(void);
+long expression(void);
+void calculator();
+int volatile int_flag=0;//volatile is must. Without it,No calculation will be done because of Compiler Optimization.
+char buf[2];
+#define DEBUG //For RTL Simulation USE
+void print_uart(unsigned char* ptr)//
+{
+ #define WRITE_BUSY 0x0100
+ unsigned uport;
+ while (*ptr) {
+ do {
+ uport=*(volatile unsigned*) uart_port;
+ } while (uport & WRITE_BUSY);
+ *(volatile unsigned char*)uart_wport=*(ptr++);
+ }
+}
+
+
+void putc_uart(unsigned char c)//
+{
+ unsigned uport;
+
+ do {
+ uport=*(volatile unsigned*) uart_port;
+ } while (uport & WRITE_BUSY);
+
+ *(volatile unsigned char*)uart_wport=c;
+}
+
+void print_char(unsigned char val)//
+{
+ #ifdef DOS
+ printf("%x ",val);
+ #else
+ *(volatile unsigned char*)print_char_port=(unsigned char)val ;
+ #endif
+
+}
+unsigned char read_uart()//Apr.4.2005 changed 32 bits port
+{
+ unsigned uport=*(volatile unsigned*)uart_port;
+// print_char(uport);
+ return uport;
+}
+
+void print(unsigned char* ptr)//Verilog Test Bench Use
+{
+ #ifdef DOS
+ printf("%s ",ptr);
+ #else
+
+ while (*ptr) {
+
+ *(volatile unsigned char*)print_port=*(ptr++);
+ }
+
+ *(volatile unsigned char*)print_port=0x00;//Write Done
+ #endif
+}
+
+void print_short(short val)//Little Endian write out 16bit number
+{
+ #ifdef DOS
+ printf("%x",val);
+ #else
+ *(volatile unsigned short*)print_int_port=val ;
+ #endif
+
+
+}
+
+void print_long(unsigned long val)//Little Endian write out 32bit number
+{
+ #ifdef DOS
+ printf("%x",val);
+ #else
+ *(volatile unsigned long*)print_long_port=val;
+
+ #endif
+
+}
+
+
+//Interrupt Service Routine.
+//If 0D/0A comes then,
+//{write 0 at the end of buffer.
+// Parse Analysis by hand,
+//}else increment READ_PTR
+//if Overflow MessageOUT
+ void interrupt(void)
+{
+ char c;
+#define SAVE_REGISTERS (13*4)
+ asm("addiu $sp,$sp,-52 ;");//SAVE_REGISTERS
+
+ asm(" sw $a0,($sp)");//Save registers@
+ asm(" sw $v0,4($sp)");
+ asm(" sw $v1,8($sp)");
+ asm(" sw $a1,12($sp)");
+ asm(" sw $s0,16($sp)");
+ asm(" sw $s1,20($sp)");
+ asm(" sw $s2,24($sp)");
+
+ asm(" sw $a3,28($sp)");
+ asm(" sw $s4,32($sp)");
+ asm(" sw $s5,36($sp)");
+ asm(" sw $s6,40($sp)");
+ asm(" sw $s7,44($sp)");
+ asm(" sw $a2,48($sp)");
+
+
+
+ c=read_uart();//read 1Byte from uart read port.
+
+
+ if ( c == 0x0a || c==0x0d )
+ {
+ *read_ptr = 0;//string end
+ read_ptr=buffer;//Initialization of read_ptr
+
+
+ putc_uart(0x0a);
+ putc_uart(0x0d);
+
+ if (int_flag) print("PError!\n");
+ else int_flag=1;
+
+ } else if ( c == '\b' && read_ptr > buffer ){//Backspace
+
+ putc_uart('\b');
+
+
+ read_ptr--;
+ }else if ( read_ptr>= buffer+BUFFER_SIZE){// overflow
+ //
+ *read_ptr = 0;//string end
+ read_ptr=buffer;//Initialization of read_ptr
+ print_uart("Sorry Overflow..!\n");
+
+ }else {//post increment
+
+ putc_uart(c);
+
+ *(read_ptr++) = c;
+ }
+
+#ifdef DEBUG
+// print(buffer);
+// print("\n\n");
+#endif
+
+//Restore Saved Registers.
+
+ asm(" lw $a0,($sp)");
+ asm(" lw $v0,4($sp)");
+ asm(" lw $v1,8($sp)");
+ asm(" lw $a1,12($sp)");
+ asm(" lw $s0,16($sp)");
+ asm(" lw $s1,20($sp)");
+ asm(" lw $s2,24($sp)");
+
+ asm(" lw $a3,28($sp)");
+ asm(" lw $s4,32($sp)");
+ asm(" lw $s5,36($sp)");
+ asm(" lw $s6,40($sp)");
+ asm(" lw $s7,44($sp)");
+ asm(" lw $a2,48($sp)");
+
+ asm("addiu $sp,$sp,52 ;");//SAVE_REGISTERS
+ //Adjust!
+ asm("lw $ra,20($sp);");//Adjust! See dis-assemble list
+ asm("addiu $sp,$sp,24 ;");//Adjust.
+ asm("jr $26");//Return Interrupt
+ asm("nop");//Delayed Slot
+//
+
+}
+
+inline void set_interrupt_address()
+{
+ *(volatile unsigned long*)int_set_address=(unsigned long)interrupt;
+ read_ptr=buffer;
+}
+
+
+void print_longlong(long long val)//Little Endian write out 32bit number
+{
+ #ifdef DOS
+ printf("%x",val);
+ #else
+ *(volatile unsigned long*)print_long_port=val>>32;
+ *(volatile unsigned long*)print_long_port=val;
+
+ #endif
+
+}
+
+
+ void getsym()
+{
+
+
+ while ( *char_ptr==' ' ||
+ *char_ptr=='\n' ||
+ *char_ptr=='\r' ) char_ptr++;
+ if (*char_ptr ==0) {
+ sym=0;
+ }else {
+ sym=*(char_ptr++);
+
+ }
+}
+
+inline void init_parser()
+{
+ char_ptr=buffer;
+ getsym();
+
+}
+
+
+long evaluate_number(void)
+{
+
+ long x ;
+
+ x=sym-'0';
+ while(*char_ptr >='0' && *char_ptr <='9') {
+ x = x * 10 + *char_ptr - '0';
+ char_ptr++;
+ }
+ getsym();
+
+ return x;
+}
+long expression(void)
+{
+ long term1,term2;
+ unsigned char op;
+
+ op=sym;
+
+ if (sym=='+' || sym=='-') getsym();
+ term1=term();
+
+ if (op=='-') term1=-term1;
+
+ while (sym=='+' || sym=='-') {
+ op=sym;
+ getsym();
+ term2=term();
+ if (op=='+') term1= term1+term2;
+ else term1= term1-term2;
+ }
+
+ return term1;
+}
+
+long term(void)
+{
+ unsigned char op;
+ long factor1,factor2;
+
+ factor1=factor();
+ while ( sym=='*' || sym=='/' || sym=='%'){
+ op=sym;
+ getsym();
+ factor2=factor();
+
+ switch (op) {
+ case '*': factor1= factor1*factor2;
+ break;
+ case '/': factor1= factor1/factor2;
+ break;
+ case '%': factor1= factor1%factor2;
+ break;
+ }
+ }
+
+ return factor1;
+}
+
+inline long parse_error()
+{
+ print_uart("\n parse error occurred\n");
+ return 0;
+}
+
+long factor(void)
+{
+ int i;
+
+ if (sym>='0' && sym <='9') return evaluate_number();
+ else if (sym=='('){
+
+ getsym();
+ i= expression();
+
+ if (sym !=')'){
+ parse_error();
+ }
+ getsym();
+ return i;
+ }else if (sym==0) return 0;
+ else return parse_error();
+}
+
+
+
+
+
+char *strrev(char *s) {
+ char *ret = s;
+ char *t = s;
+ char c;
+
+ while( *t != '\0' )t++;
+ t--;
+
+ while(t > s) {
+ c = *s;
+ *s = *t;
+ *t = c;
+ s++;
+ t--;
+ }
+
+ return ret;
+}
+
+
+void itoa(int val, char *s) {
+ char *t;
+ int mod;
+
+ if(val < 0) {
+ *s++ = '-';
+ val = -val;
+ }
+ t = s;
+
+ while(val) {
+ mod = val % 10;
+ *t++ = (char)mod + '0';
+ val /= 10;
+
+ }
+
+ if(s == t)
+ *t++ = '0';
+
+ *t = '\0';
+
+
+ strrev(s);
+}
+void calculator()
+{
+ long result;
+
+//Parser Initialization
+ init_parser();
+
+//Calculation
+ result=expression();
+
+//
+ #ifdef DEBUG
+ print("\n");
+ print(buffer);
+ print("=");
+ print_long(result);
+ print("[Hex] ");
+ itoa(result,result_buffer);
+ print(result_buffer);
+ print("[Dec]\n");
+
+ #else
+ print_uart(buffer);
+ putc_uart('=');
+ print_uart(result_buffer);
+ putc_uart(0x0a);
+ putc_uart(0x0a);
+ putc_uart(0x0d);
+
+ #endif
+
+
+}
+
+void strcpy(char* dest,char* source)
+{
+
+ char* dest_ptr;
+ dest_ptr=dest;
+
+ while(*source) {
+
+ *(dest++) =*(source++);
+ } ;
+
+ *dest=0;//Write Done
+
+
+}
+void calculator_test(char* ptr)
+{
+ strcpy(buffer,ptr);
+ calculator();
+
+}
+
+void main()
+{
+ unsigned counter=0;
+
+
+ set_interrupt_address();//Set Interrupt Service Address
+
+ print_uart("5*3\n");//Send UART PORT TXD, then echo backed to RXD in verilog test bench.
+ print_uart("100*31\n");//Don't care overflow,Altera Imprementation has UART FIFO 512bytes
+ print_uart("(-31050)/(-31)\n");
+ print_uart("(-1053333)/(231)\n");
+ print_uart("(10503)/(-314)\n");
+ print_uart("3333*3333\n");
+ print_uart("533*443\n");
+ print_uart("10*314\n");
+ print_uart("(-350)/(-231)\n");
+ print_uart("(-10533333)/(1231)\n");
+ print_uart("(105034)/(-3134)\n");
+ print_uart("3363*33333\n");
+ label:
+ if (int_flag){//if interrupt service routine reports end of string,
+ int_flag=0;
+ calculator();//then parse the string,calculates, and report the result to debug port.
+ counter++;
+ if (counter>=12) print("$finish");
+ }
+ goto label;
+
+}
Index: list.txt
===================================================================
--- list.txt (nonexistent)
+++ list.txt (revision 4)
@@ -0,0 +1,672 @@
+
+test.exe: file format elf32-bigmips
+
+No symbols in "test.exe".
+Disassembly of section .text:
+
+00000000 <.text>:
+ 0: 3c1c0000 lui $gp,0x0
+ 4: 379c0000 ori $gp,$gp,0x0
+ 8: 3c040000 lui $a0,0x0
+ c: 34840000 ori $a0,$a0,0x0
+ 10: 3c050000 lui $a1,0x0
+ 14: 34a50000 ori $a1,$a1,0x0
+ 18: 3c1d0000 lui $sp,0x0
+ 1c: 37bdfff0 ori $sp,$sp,0xfff0
+ 20: ac800000 sw $zero,0($a0)
+ 24: 0085182a slt $v1,$a0,$a1
+ 28: 1460fffd bnez $v1,0x20
+ 2c: 24840004 addiu $a0,$a0,4
+ 30: 0c00023d jal 0x8f4
+ 34: 00000000 nop
+ 38: 0800000e j 0x38
+ 3c: 341affff li $k0,0xffff
+ 40: 341b002e li $k1,0x2e
+ 44: a35b0000 sb $k1,0($k0)
+ 48: 341a0001 li $k0,0x1
+ 4c: 401b7000 mfc0 $k1,$epc
+ 50: 03600008 jr $k1
+ 54: 409a6000 mtc0 $k0,$status
+ 58: 03e00008 jr $ra
+ 5c: 40846000 mtc0 $a0,$status
+ 60: 3405ffff li $a1,0xffff
+ 64: 03e00008 jr $ra
+ 68: a0a40000 sb $a0,0($a1)
+ 6c: 3405ffff li $a1,0xffff
+ 70: 80860000 lb $a2,0($a0)
+ 74: 10c00003 beqz $a2,0x84
+ 78: 24840001 addiu $a0,$a0,1
+ 7c: 1000fffc b 0x70
+ 80: a0a60000 sb $a2,0($a1)
+ 84: 03e00008 jr $ra
+ 88: 34020000 li $v0,0x0
+ 8c: 90820000 lbu $v0,0($a0)
+ 90: 00000000 nop
+ 94: 1040000f beqz $v0,0xd4
+ 98: 00000000 nop
+ 9c: 24033ffc li $v1,16380
+ a0: 8c620000 lw $v0,0($v1)
+ a4: 00000000 nop
+ a8: 30420100 andi $v0,$v0,0x100
+ ac: 1440fffc bnez $v0,0xa0
+ b0: 00000000 nop
+ b4: 90820000 lbu $v0,0($a0)
+ b8: 00000000 nop
+ bc: a0620000 sb $v0,0($v1)
+ c0: 24840001 addiu $a0,$a0,1
+ c4: 90820000 lbu $v0,0($a0)
+ c8: 00000000 nop
+ cc: 1440fff4 bnez $v0,0xa0
+ d0: 00000000 nop
+ d4: 03e00008 jr $ra
+ d8: 00000000 nop
+ dc: 308400ff andi $a0,$a0,0xff
+ e0: 24033ffc li $v1,16380
+ e4: 8c620000 lw $v0,0($v1)
+ e8: 00000000 nop
+ ec: 30420100 andi $v0,$v0,0x100
+ f0: 1440fffc bnez $v0,0xe4
+ f4: 24023ffc li $v0,16380
+ f8: a0440000 sb $a0,0($v0)
+ fc: 03e00008 jr $ra
+ 100: 00000000 nop
+ 104: 308400ff andi $a0,$a0,0xff
+ 108: 24023ff1 li $v0,16369
+ 10c: 03e00008 jr $ra
+ 110: a0440000 sb $a0,0($v0)
+ 114: 24023ffc li $v0,16380
+ 118: 8c420000 lw $v0,0($v0)
+ 11c: 03e00008 jr $ra
+ 120: 304200ff andi $v0,$v0,0xff
+ 124: 90820000 lbu $v0,0($a0)
+ 128: 00000000 nop
+ 12c: 10400009 beqz $v0,0x154
+ 130: 00401825 move $v1,$v0
+ 134: 24053ff0 li $a1,16368
+ 138: 00601025 move $v0,$v1
+ 13c: a0a20000 sb $v0,0($a1)
+ 140: 24840001 addiu $a0,$a0,1
+ 144: 90830000 lbu $v1,0($a0)
+ 148: 00000000 nop
+ 14c: 1460fffb bnez $v1,0x13c
+ 150: 00601025 move $v0,$v1
+ 154: 24023ff0 li $v0,16368
+ 158: 03e00008 jr $ra
+ 15c: a0400000 sb $zero,0($v0)
+ 160: 00042400 sll $a0,$a0,0x10
+ 164: 00042403 sra $a0,$a0,0x10
+ 168: 24023ff2 li $v0,16370
+ 16c: 03e00008 jr $ra
+ 170: a4440000 sh $a0,0($v0)
+ 174: 24023ff4 li $v0,16372
+ 178: 03e00008 jr $ra
+ 17c: ac440000 sw $a0,0($v0)
+ 180: 27bdffe8 addiu $sp,$sp,-24
+ 184: afbf0014 sw $ra,20($sp)
+ 188: afb00010 sw $s0,16($sp)
+ 18c: 27bdffcc addiu $sp,$sp,-52
+ 190: afa40000 sw $a0,0($sp)
+ 194: afa20004 sw $v0,4($sp)
+ 198: afa30008 sw $v1,8($sp)
+ 19c: afa5000c sw $a1,12($sp)
+ 1a0: afb00010 sw $s0,16($sp)
+ 1a4: afb10014 sw $s1,20($sp)
+ 1a8: afb20018 sw $s2,24($sp)
+ 1ac: afa7001c sw $a3,28($sp)
+ 1b0: afb40020 sw $s4,32($sp)
+ 1b4: afb50024 sw $s5,36($sp)
+ 1b8: afb60028 sw $s6,40($sp)
+ 1bc: afb7002c sw $s7,44($sp)
+ 1c0: 0c000045 jal 0x114
+ 1c4: afa60030 sw $a2,48($sp)
+ 1c8: 00408025 move $s0,$v0
+ 1cc: 3a03000a xori $v1,$s0,0xa
+ 1d0: 2c630001 sltiu $v1,$v1,1
+ 1d4: 3a02000d xori $v0,$s0,0xd
+ 1d8: 2c420001 sltiu $v0,$v0,1
+ 1dc: 00621825 or $v1,$v1,$v0
+ 1e0: 10600017 beqz $v1,0x240
+ 1e4: 24020008 li $v0,8
+ 1e8: 8f828028 lw $v0,-32728($gp)
+ 1ec: 00000000 nop
+ 1f0: a0400000 sb $zero,0($v0)
+ 1f4: 3c020000 lui $v0,0x0
+ 1f8: 24420ba0 addiu $v0,$v0,2976
+ 1fc: af828028 sw $v0,-32728($gp)
+ 200: 0c000037 jal 0xdc
+ 204: 2404000a li $a0,10
+ 208: 0c000037 jal 0xdc
+ 20c: 2404000d li $a0,13
+ 210: 8f828010 lw $v0,-32752($gp)
+ 214: 00000000 nop
+ 218: 10400005 beqz $v0,0x230
+ 21c: 3c040000 lui $a0,0x0
+ 220: 0c000049 jal 0x124
+ 224: 24840a7c addiu $a0,$a0,2684
+ 228: 10000025 b 0x2c0
+ 22c: 00000000 nop
+ 230: 24020001 li $v0,1
+ 234: af828010 sw $v0,-32752($gp)
+ 238: 10000021 b 0x2c0
+ 23c: 00000000 nop
+ 240: 1602000b bne $s0,$v0,0x270
+ 244: 3c020000 lui $v0,0x0
+ 248: 8f838028 lw $v1,-32728($gp)
+ 24c: 24420ba0 addiu $v0,$v0,2976
+ 250: 0043102b sltu $v0,$v0,$v1
+ 254: 10400007 beqz $v0,0x274
+ 258: 00000000 nop
+ 25c: 0c000037 jal 0xdc
+ 260: 24040008 li $a0,8
+ 264: 8f828028 lw $v0,-32728($gp)
+ 268: 10000014 b 0x2bc
+ 26c: 2442ffff addiu $v0,$v0,-1
+ 270: 8f838028 lw $v1,-32728($gp)
+ 274: 3c020000 lui $v0,0x0
+ 278: 24440c18 addiu $a0,$v0,3096
+ 27c: 0064102b sltu $v0,$v1,$a0
+ 280: 14400008 bnez $v0,0x2a4
+ 284: 2482ff88 addiu $v0,$a0,-120
+ 288: a0600000 sb $zero,0($v1)
+ 28c: af828028 sw $v0,-32728($gp)
+ 290: 3c040000 lui $a0,0x0
+ 294: 0c000023 jal 0x8c
+ 298: 24840a88 addiu $a0,$a0,2696
+ 29c: 10000008 b 0x2c0
+ 2a0: 00000000 nop
+ 2a4: 0c000037 jal 0xdc
+ 2a8: 02002025 move $a0,$s0
+ 2ac: 8f828028 lw $v0,-32728($gp)
+ 2b0: 00000000 nop
+ 2b4: a0500000 sb $s0,0($v0)
+ 2b8: 24420001 addiu $v0,$v0,1
+ 2bc: af828028 sw $v0,-32728($gp)
+ 2c0: 8fa40000 lw $a0,0($sp)
+ 2c4: 8fa20004 lw $v0,4($sp)
+ 2c8: 8fa30008 lw $v1,8($sp)
+ 2cc: 8fa5000c lw $a1,12($sp)
+ 2d0: 8fb00010 lw $s0,16($sp)
+ 2d4: 8fb10014 lw $s1,20($sp)
+ 2d8: 8fb20018 lw $s2,24($sp)
+ 2dc: 8fa7001c lw $a3,28($sp)
+ 2e0: 8fb40020 lw $s4,32($sp)
+ 2e4: 8fb50024 lw $s5,36($sp)
+ 2e8: 8fb60028 lw $s6,40($sp)
+ 2ec: 8fb7002c lw $s7,44($sp)
+ 2f0: 8fa60030 lw $a2,48($sp)
+ 2f4: 27bd0034 addiu $sp,$sp,52
+ 2f8: 8fbf0014 lw $ra,20($sp)
+ 2fc: 03400008 jr $k0
+ 300: 27bd0018 addiu $sp,$sp,24
+ 304: 00000000 nop
+ 308: 8fbf0014 lw $ra,20($sp)
+ 30c: 8fb00010 lw $s0,16($sp)
+ 310: 03e00008 jr $ra
+ 314: 27bd0018 addiu $sp,$sp,24
+ 318: 24063ff4 li $a2,16372
+ 31c: 00041803 sra $v1,$a0,0x0
+ 320: 000417c3 sra $v0,$a0,0x1f
+ 324: acc30000 sw $v1,0($a2)
+ 328: 03e00008 jr $ra
+ 32c: acc50000 sw $a1,0($a2)
+ 330: 8f828020 lw $v0,-32736($gp)
+ 334: 00000000 nop
+ 338: 90440000 lbu $a0,0($v0)
+ 33c: 10000008 b 0x360
+ 340: 38830020 xori $v1,$a0,0x20
+ 344: 8f838020 lw $v1,-32736($gp)
+ 348: 00000000 nop
+ 34c: 24620001 addiu $v0,$v1,1
+ 350: af828020 sw $v0,-32736($gp)
+ 354: 90640001 lbu $a0,1($v1)
+ 358: 00000000 nop
+ 35c: 38830020 xori $v1,$a0,0x20
+ 360: 2c630001 sltiu $v1,$v1,1
+ 364: 3882000a xori $v0,$a0,0xa
+ 368: 2c420001 sltiu $v0,$v0,1
+ 36c: 00621825 or $v1,$v1,$v0
+ 370: 1460fff4 bnez $v1,0x344
+ 374: 2402000d li $v0,13
+ 378: 1082fff2 beq $a0,$v0,0x344
+ 37c: 00000000 nop
+ 380: 8f828020 lw $v0,-32736($gp)
+ 384: 00000000 nop
+ 388: 90420000 lbu $v0,0($v0)
+ 38c: 00000000 nop
+ 390: 14400004 bnez $v0,0x3a4
+ 394: 00000000 nop
+ 398: a380802c sb $zero,-32724($gp)
+ 39c: 10000008 b 0x3c0
+ 3a0: 00000000 nop
+ 3a4: 8f828020 lw $v0,-32736($gp)
+ 3a8: 00000000 nop
+ 3ac: 90430000 lbu $v1,0($v0)
+ 3b0: 00000000 nop
+ 3b4: a383802c sb $v1,-32724($gp)
+ 3b8: 24420001 addiu $v0,$v0,1
+ 3bc: af828020 sw $v0,-32736($gp)
+ 3c0: 03e00008 jr $ra
+ 3c4: 00000000 nop
+ 3c8: 27bdffe8 addiu $sp,$sp,-24
+ 3cc: afbf0014 sw $ra,20($sp)
+ 3d0: afb00010 sw $s0,16($sp)
+ 3d4: 9390802c lbu $s0,-32724($gp)
+ 3d8: 8f828020 lw $v0,-32736($gp)
+ 3dc: 00000000 nop
+ 3e0: 00401825 move $v1,$v0
+ 3e4: 90420000 lbu $v0,0($v0)
+ 3e8: 1000000d b 0x420
+ 3ec: 2610ffd0 addiu $s0,$s0,-48
+ 3f0: 00501021 addu $v0,$v0,$s0
+ 3f4: 00021040 sll $v0,$v0,0x1
+ 3f8: 00602025 move $a0,$v1
+ 3fc: 90830000 lbu $v1,0($a0)
+ 400: 00000000 nop
+ 404: 00431021 addu $v0,$v0,$v1
+ 408: 2450ffd0 addiu $s0,$v0,-48
+ 40c: 24820001 addiu $v0,$a0,1
+ 410: af828020 sw $v0,-32736($gp)
+ 414: 00401825 move $v1,$v0
+ 418: 90820001 lbu $v0,1($a0)
+ 41c: 00000000 nop
+ 420: 2442ffd0 addiu $v0,$v0,-48
+ 424: 2c42000a sltiu $v0,$v0,10
+ 428: 1440fff1 bnez $v0,0x3f0
+ 42c: 00101080 sll $v0,$s0,0x2
+ 430: 0c0000cc jal 0x330
+ 434: 00000000 nop
+ 438: 02001025 move $v0,$s0
+ 43c: 8fbf0014 lw $ra,20($sp)
+ 440: 8fb00010 lw $s0,16($sp)
+ 444: 03e00008 jr $ra
+ 448: 27bd0018 addiu $sp,$sp,24
+ 44c: 27bdffe0 addiu $sp,$sp,-32
+ 450: afbf001c sw $ra,28($sp)
+ 454: afb20018 sw $s2,24($sp)
+ 458: afb10014 sw $s1,20($sp)
+ 45c: afb00010 sw $s0,16($sp)
+ 460: 9390802c lbu $s0,-32724($gp)
+ 464: 00000000 nop
+ 468: 3a03002b xori $v1,$s0,0x2b
+ 46c: 2c630001 sltiu $v1,$v1,1
+ 470: 3a02002d xori $v0,$s0,0x2d
+ 474: 2c420001 sltiu $v0,$v0,1
+ 478: 00621825 or $v1,$v1,$v0
+ 47c: 10600003 beqz $v1,0x48c
+ 480: 00000000 nop
+ 484: 0c0000cc jal 0x330
+ 488: 00000000 nop
+ 48c: 0c00014f jal 0x53c
+ 490: 00000000 nop
+ 494: 00408825 move $s1,$v0
+ 498: 2402002d li $v0,45
+ 49c: 16020002 bne $s0,$v0,0x4a8
+ 4a0: 00000000 nop
+ 4a4: 00118823 negu $s1,$s1
+ 4a8: 9382802c lbu $v0,-32724($gp)
+ 4ac: 00000000 nop
+ 4b0: 00402025 move $a0,$v0
+ 4b4: 304200ff andi $v0,$v0,0xff
+ 4b8: 3843002b xori $v1,$v0,0x2b
+ 4bc: 2c630001 sltiu $v1,$v1,1
+ 4c0: 3842002d xori $v0,$v0,0x2d
+ 4c4: 2c420001 sltiu $v0,$v0,1
+ 4c8: 00621825 or $v1,$v1,$v0
+ 4cc: 10600014 beqz $v1,0x520
+ 4d0: 2412002b li $s2,43
+ 4d4: 0c0000cc jal 0x330
+ 4d8: 00808025 move $s0,$a0
+ 4dc: 0c00014f jal 0x53c
+ 4e0: 00000000 nop
+ 4e4: 16120003 bne $s0,$s2,0x4f4
+ 4e8: 00000000 nop
+ 4ec: 10000002 b 0x4f8
+ 4f0: 02228821 addu $s1,$s1,$v0
+ 4f4: 02228823 subu $s1,$s1,$v0
+ 4f8: 9384802c lbu $a0,-32724($gp)
+ 4fc: 00000000 nop
+ 500: 308200ff andi $v0,$a0,0xff
+ 504: 3843002b xori $v1,$v0,0x2b
+ 508: 2c630001 sltiu $v1,$v1,1
+ 50c: 3842002d xori $v0,$v0,0x2d
+ 510: 2c420001 sltiu $v0,$v0,1
+ 514: 00621825 or $v1,$v1,$v0
+ 518: 1460ffee bnez $v1,0x4d4
+ 51c: 00000000 nop
+ 520: 02201025 move $v0,$s1
+ 524: 8fbf001c lw $ra,28($sp)
+ 528: 8fb20018 lw $s2,24($sp)
+ 52c: 8fb10014 lw $s1,20($sp)
+ 530: 8fb00010 lw $s0,16($sp)
+ 534: 03e00008 jr $ra
+ 538: 27bd0020 addiu $sp,$sp,32
+ 53c: 27bdffe0 addiu $sp,$sp,-32
+ 540: afbf0018 sw $ra,24($sp)
+ 544: afb10014 sw $s1,20($sp)
+ 548: 0c000194 jal 0x650
+ 54c: afb00010 sw $s0,16($sp)
+ 550: 1000002f b 0x610
+ 554: 00408825 move $s1,$v0
+ 558: 9390802c lbu $s0,-32724($gp)
+ 55c: 0c0000cc jal 0x330
+ 560: 00000000 nop
+ 564: 0c000194 jal 0x650
+ 568: 00000000 nop
+ 56c: 00401825 move $v1,$v0
+ 570: 2402002a li $v0,42
+ 574: 1202000c beq $s0,$v0,0x5a8
+ 578: 2a02002b slti $v0,$s0,43
+ 57c: 10400005 beqz $v0,0x594
+ 580: 24020025 li $v0,37
+ 584: 12020018 beq $s0,$v0,0x5e8
+ 588: 00000000 nop
+ 58c: 10000020 b 0x610
+ 590: 00000000 nop
+ 594: 2402002f li $v0,47
+ 598: 12020007 beq $s0,$v0,0x5b8
+ 59c: 00000000 nop
+ 5a0: 1000001b b 0x610
+ 5a4: 00000000 nop
+ 5a8: 02230018 mult $s1,$v1
+ 5ac: 00008812 mflo $s1
+ 5b0: 10000017 b 0x610
+ 5b4: 00000000 nop
+ 5b8: 14600002 bnez $v1,0x5c4
+ 5bc: 0223001a div $zero,$s1,$v1
+ 5c0: 0007000d break 0x7
+ 5c4: 2401ffff li $at,-1
+ 5c8: 14610004 bne $v1,$at,0x5dc
+ 5cc: 3c018000 lui $at,0x8000
+ 5d0: 16210002 bne $s1,$at,0x5dc
+ 5d4: 00000000 nop
+ 5d8: 0006000d break 0x6
+ 5dc: 00008812 mflo $s1
+ 5e0: 1000000b b 0x610
+ 5e4: 00000000 nop
+ 5e8: 14600002 bnez $v1,0x5f4
+ 5ec: 0223001a div $zero,$s1,$v1
+ 5f0: 0007000d break 0x7
+ 5f4: 2401ffff li $at,-1
+ 5f8: 14610004 bne $v1,$at,0x60c
+ 5fc: 3c018000 lui $at,0x8000
+ 600: 16210002 bne $s1,$at,0x60c
+ 604: 00000000 nop
+ 608: 0006000d break 0x6
+ 60c: 00008810 mfhi $s1
+ 610: 9384802c lbu $a0,-32724($gp)
+ 614: 00000000 nop
+ 618: 3883002a xori $v1,$a0,0x2a
+ 61c: 2c630001 sltiu $v1,$v1,1
+ 620: 3882002f xori $v0,$a0,0x2f
+ 624: 2c420001 sltiu $v0,$v0,1
+ 628: 00621825 or $v1,$v1,$v0
+ 62c: 1460ffca bnez $v1,0x558
+ 630: 24020025 li $v0,37
+ 634: 1082ffc8 beq $a0,$v0,0x558
+ 638: 02201025 move $v0,$s1
+ 63c: 8fbf0018 lw $ra,24($sp)
+ 640: 8fb10014 lw $s1,20($sp)
+ 644: 8fb00010 lw $s0,16($sp)
+ 648: 03e00008 jr $ra
+ 64c: 27bd0020 addiu $sp,$sp,32
+ 650: 27bdffe8 addiu $sp,$sp,-24
+ 654: afbf0014 sw $ra,20($sp)
+ 658: afb00010 sw $s0,16($sp)
+ 65c: 9382802c lbu $v0,-32724($gp)
+ 660: 00000000 nop
+ 664: 2442ffd0 addiu $v0,$v0,-48
+ 668: 2c42000a sltiu $v0,$v0,10
+ 66c: 10400005 beqz $v0,0x684
+ 670: 24020028 li $v0,40
+ 674: 0c0000f2 jal 0x3c8
+ 678: 00000000 nop
+ 67c: 1000001c b 0x6f0
+ 680: 00000000 nop
+ 684: 9383802c lbu $v1,-32724($gp)
+ 688: 00000000 nop
+ 68c: 14620010 bne $v1,$v0,0x6d0
+ 690: 00000000 nop
+ 694: 0c0000cc jal 0x330
+ 698: 00000000 nop
+ 69c: 0c000113 jal 0x44c
+ 6a0: 00000000 nop
+ 6a4: 00408025 move $s0,$v0
+ 6a8: 9383802c lbu $v1,-32724($gp)
+ 6ac: 24020029 li $v0,41
+ 6b0: 10620003 beq $v1,$v0,0x6c0
+ 6b4: 3c040000 lui $a0,0x0
+ 6b8: 0c000023 jal 0x8c
+ 6bc: 24840a9c addiu $a0,$a0,2716
+ 6c0: 0c0000cc jal 0x330
+ 6c4: 00000000 nop
+ 6c8: 10000009 b 0x6f0
+ 6cc: 02001025 move $v0,$s0
+ 6d0: 9382802c lbu $v0,-32724($gp)
+ 6d4: 00000000 nop
+ 6d8: 10400005 beqz $v0,0x6f0
+ 6dc: 00001025 move $v0,$zero
+ 6e0: 3c040000 lui $a0,0x0
+ 6e4: 0c000023 jal 0x8c
+ 6e8: 24840a9c addiu $a0,$a0,2716
+ 6ec: 00001025 move $v0,$zero
+ 6f0: 8fbf0014 lw $ra,20($sp)
+ 6f4: 8fb00010 lw $s0,16($sp)
+ 6f8: 03e00008 jr $ra
+ 6fc: 27bd0018 addiu $sp,$sp,24
+ 700: 00803025 move $a2,$a0
+ 704: 90820000 lbu $v0,0($a0)
+ 708: 00000000 nop
+ 70c: 1040000f beqz $v0,0x74c
+ 710: 00802825 move $a1,$a0
+ 714: 24a50001 addiu $a1,$a1,1
+ 718: 90a20000 lbu $v0,0($a1)
+ 71c: 00000000 nop
+ 720: 1440fffd bnez $v0,0x718
+ 724: 24a50001 addiu $a1,$a1,1
+ 728: 24a5ffff addiu $a1,$a1,-1
+ 72c: 10000008 b 0x750
+ 730: 24a5ffff addiu $a1,$a1,-1
+ 734: 90c20000 lbu $v0,0($a2)
+ 738: 90a30000 lbu $v1,0($a1)
+ 73c: 00000000 nop
+ 740: a0c30000 sb $v1,0($a2)
+ 744: a0a20000 sb $v0,0($a1)
+ 748: 24c60001 addiu $a2,$a2,1
+ 74c: 24a5ffff addiu $a1,$a1,-1
+ 750: 00c5102b sltu $v0,$a2,$a1
+ 754: 1440fff7 bnez $v0,0x734
+ 758: 00000000 nop
+ 75c: 03e00008 jr $ra
+ 760: 00801025 move $v0,$a0
+ 764: 27bdffe8 addiu $sp,$sp,-24
+ 768: 04810005 bgez $a0,0x780
+ 76c: afbf0010 sw $ra,16($sp)
+ 770: 2402002d li $v0,45
+ 774: a0a20000 sb $v0,0($a1)
+ 778: 24a50001 addiu $a1,$a1,1
+ 77c: 00042023 negu $a0,$a0
+ 780: 10800012 beqz $a0,0x7cc
+ 784: 00a03825 move $a3,$a1
+ 788: 3c086666 lui $t0,0x6666
+ 78c: 35086667 ori $t0,$t0,0x6667
+ 790: 00880018 mult $a0,$t0
+ 794: 00004810 mfhi $t1
+ 798: 00091883 sra $v1,$t1,0x2
+ 79c: 000417c3 sra $v0,$a0,0x1f
+ 7a0: 00623023 subu $a2,$v1,$v0
+ 7a4: 00c01825 move $v1,$a2
+ 7a8: 00061080 sll $v0,$a2,0x2
+ 7ac: 00461021 addu $v0,$v0,$a2
+ 7b0: 00021040 sll $v0,$v0,0x1
+ 7b4: 00823023 subu $a2,$a0,$v0
+ 7b8: 24c20030 addiu $v0,$a2,48
+ 7bc: a0e20000 sb $v0,0($a3)
+ 7c0: 00602025 move $a0,$v1
+ 7c4: 1480fff2 bnez $a0,0x790
+ 7c8: 24e70001 addiu $a3,$a3,1
+ 7cc: 14a70003 bne $a1,$a3,0x7dc
+ 7d0: 24020030 li $v0,48
+ 7d4: a0a20000 sb $v0,0($a1)
+ 7d8: 24a70001 addiu $a3,$a1,1
+ 7dc: a0e00000 sb $zero,0($a3)
+ 7e0: 0c0001c0 jal 0x700
+ 7e4: 00a02025 move $a0,$a1
+ 7e8: 8fbf0010 lw $ra,16($sp)
+ 7ec: 00000000 nop
+ 7f0: 03e00008 jr $ra
+ 7f4: 27bd0018 addiu $sp,$sp,24
+ 7f8: 27bdffe0 addiu $sp,$sp,-32
+ 7fc: afbf0018 sw $ra,24($sp)
+ 800: afb10014 sw $s1,20($sp)
+ 804: afb00010 sw $s0,16($sp)
+ 808: 3c100000 lui $s0,0x0
+ 80c: 26100ba0 addiu $s0,$s0,2976
+ 810: af908020 sw $s0,-32736($gp)
+ 814: 0c0000cc jal 0x330
+ 818: 00000000 nop
+ 81c: 0c000113 jal 0x44c
+ 820: 00000000 nop
+ 824: 00408825 move $s1,$v0
+ 828: 3c040000 lui $a0,0x0
+ 82c: 0c000049 jal 0x124
+ 830: 24840ab4 addiu $a0,$a0,2740
+ 834: 0c000049 jal 0x124
+ 838: 02002025 move $a0,$s0
+ 83c: 3c040000 lui $a0,0x0
+ 840: 0c000049 jal 0x124
+ 844: 24840ab8 addiu $a0,$a0,2744
+ 848: 0c00005d jal 0x174
+ 84c: 02202025 move $a0,$s1
+ 850: 3c040000 lui $a0,0x0
+ 854: 0c000049 jal 0x124
+ 858: 24840abc addiu $a0,$a0,2748
+ 85c: 27858018 addiu $a1,$gp,-32744
+ 860: 0c0001d9 jal 0x764
+ 864: 02202025 move $a0,$s1
+ 868: 27848018 addiu $a0,$gp,-32744
+ 86c: 0c000049 jal 0x124
+ 870: 00000000 nop
+ 874: 3c040000 lui $a0,0x0
+ 878: 0c000049 jal 0x124
+ 87c: 24840ac8 addiu $a0,$a0,2760
+ 880: 8fbf0018 lw $ra,24($sp)
+ 884: 8fb10014 lw $s1,20($sp)
+ 888: 8fb00010 lw $s0,16($sp)
+ 88c: 03e00008 jr $ra
+ 890: 27bd0020 addiu $sp,$sp,32
+ 894: 90a20000 lbu $v0,0($a1)
+ 898: 00000000 nop
+ 89c: 10400007 beqz $v0,0x8bc
+ 8a0: 00401825 move $v1,$v0
+ 8a4: a0830000 sb $v1,0($a0)
+ 8a8: 24a50001 addiu $a1,$a1,1
+ 8ac: 90a30000 lbu $v1,0($a1)
+ 8b0: 00000000 nop
+ 8b4: 1460fffb bnez $v1,0x8a4
+ 8b8: 24840001 addiu $a0,$a0,1
+ 8bc: 03e00008 jr $ra
+ 8c0: a0800000 sb $zero,0($a0)
+ 8c4: 27bdffe8 addiu $sp,$sp,-24
+ 8c8: afbf0010 sw $ra,16($sp)
+ 8cc: 00802825 move $a1,$a0
+ 8d0: 3c040000 lui $a0,0x0
+ 8d4: 0c000225 jal 0x894
+ 8d8: 24840ba0 addiu $a0,$a0,2976
+ 8dc: 0c0001fe jal 0x7f8
+ 8e0: 00000000 nop
+ 8e4: 8fbf0010 lw $ra,16($sp)
+ 8e8: 00000000 nop
+ 8ec: 03e00008 jr $ra
+ 8f0: 27bd0018 addiu $sp,$sp,24
+ 8f4: 27bdffe8 addiu $sp,$sp,-24
+ 8f8: afbf0014 sw $ra,20($sp)
+ 8fc: afb00010 sw $s0,16($sp)
+ 900: 00008025 move $s0,$zero
+ 904: 24033ff8 li $v1,16376
+ 908: 3c020000 lui $v0,0x0
+ 90c: 24420180 addiu $v0,$v0,384
+ 910: ac620000 sw $v0,0($v1)
+ 914: 3c020000 lui $v0,0x0
+ 918: 24420ba0 addiu $v0,$v0,2976
+ 91c: af828028 sw $v0,-32728($gp)
+ 920: 3c040000 lui $a0,0x0
+ 924: 0c000023 jal 0x8c
+ 928: 24840ad0 addiu $a0,$a0,2768
+ 92c: 3c040000 lui $a0,0x0
+ 930: 0c000023 jal 0x8c
+ 934: 24840ad8 addiu $a0,$a0,2776
+ 938: 3c040000 lui $a0,0x0
+ 93c: 0c000023 jal 0x8c
+ 940: 24840ae0 addiu $a0,$a0,2784
+ 944: 3c040000 lui $a0,0x0
+ 948: 0c000023 jal 0x8c
+ 94c: 24840af0 addiu $a0,$a0,2800
+ 950: 3c040000 lui $a0,0x0
+ 954: 0c000023 jal 0x8c
+ 958: 24840b04 addiu $a0,$a0,2820
+ 95c: 3c040000 lui $a0,0x0
+ 960: 0c000023 jal 0x8c
+ 964: 24840b14 addiu $a0,$a0,2836
+ 968: 3c040000 lui $a0,0x0
+ 96c: 0c000023 jal 0x8c
+ 970: 24840b20 addiu $a0,$a0,2848
+ 974: 3c040000 lui $a0,0x0
+ 978: 0c000023 jal 0x8c
+ 97c: 24840b2c addiu $a0,$a0,2860
+ 980: 3c040000 lui $a0,0x0
+ 984: 0c000023 jal 0x8c
+ 988: 24840b34 addiu $a0,$a0,2868
+ 98c: 3c040000 lui $a0,0x0
+ 990: 0c000023 jal 0x8c
+ 994: 24840b44 addiu $a0,$a0,2884
+ 998: 3c040000 lui $a0,0x0
+ 99c: 0c000023 jal 0x8c
+ 9a0: 24840b58 addiu $a0,$a0,2904
+ 9a4: 3c040000 lui $a0,0x0
+ 9a8: 0c000023 jal 0x8c
+ 9ac: 24840b6c addiu $a0,$a0,2924
+ 9b0: 8f828010 lw $v0,-32752($gp)
+ 9b4: 00000000 nop
+ 9b8: 1040fffd beqz $v0,0x9b0
+ 9bc: 00000000 nop
+ 9c0: af808010 sw $zero,-32752($gp)
+ 9c4: 0c0001fe jal 0x7f8
+ 9c8: 26100001 addiu $s0,$s0,1
+ 9cc: 2e02000c sltiu $v0,$s0,12
+ 9d0: 1440fff7 bnez $v0,0x9b0
+ 9d4: 00000000 nop
+ 9d8: 3c040000 lui $a0,0x0
+ 9dc: 0c000049 jal 0x124
+ 9e0: 24840b78 addiu $a0,$a0,2936
+ 9e4: 1000fff2 b 0x9b0
+ 9e8: 00000000 nop
+ 9ec: 24023ff8 li $v0,16376
+ 9f0: 3c030000 lui $v1,0x0
+ 9f4: 24630180 addiu $v1,$v1,384
+ 9f8: ac430000 sw $v1,0($v0)
+ 9fc: 3c020000 lui $v0,0x0
+ a00: 24420ba0 addiu $v0,$v0,2976
+ a04: af828028 sw $v0,-32728($gp)
+ a08: 03e00008 jr $ra
+ a0c: 00000000 nop
+ a10: 27bdffe8 addiu $sp,$sp,-24
+ a14: afbf0010 sw $ra,16($sp)
+ a18: 3c020000 lui $v0,0x0
+ a1c: 24420ba0 addiu $v0,$v0,2976
+ a20: af828020 sw $v0,-32736($gp)
+ a24: 0c0000cc jal 0x330
+ a28: 00000000 nop
+ a2c: 8fbf0010 lw $ra,16($sp)
+ a30: 00000000 nop
+ a34: 03e00008 jr $ra
+ a38: 27bd0018 addiu $sp,$sp,24
+ a3c: 27bdffe8 addiu $sp,$sp,-24
+ a40: afbf0010 sw $ra,16($sp)
+ a44: 3c040000 lui $a0,0x0
+ a48: 0c000023 jal 0x8c
+ a4c: 24840a9c addiu $a0,$a0,2716
+ a50: 00001025 move $v0,$zero
+ a54: 8fbf0010 lw $ra,16($sp)
+ a58: 00000000 nop
+ a5c: 03e00008 jr $ra
+ a60: 27bd0018 addiu $sp,$sp,24
Index: test.map
===================================================================
--- test.map (nonexistent)
+++ test.map (revision 4)
@@ -0,0 +1,249 @@
+
+Allocating common symbols
+Common symbol size file
+
+result_buffer 0x8 uart_echo_test.o
+char_ptr 0x4 uart_echo_test.o
+buffer 0x78 uart_echo_test.o
+buf 0x2 uart_echo_test.o
+read_ptr 0x4 uart_echo_test.o
+sym 0x1 uart_echo_test.o
+
+Memory Configuration
+
+Name Origin Length Attributes
+*default* 0x00000000 0xffffffff
+
+Linker script and memory map
+
+Address of section .text set to 0x0
+LOAD boot.o
+LOAD uart_echo_test.o
+
+.text 0x00000000 0xa64
+ 0x00000000 _ftext=.
+ *(.text)
+ .text 0x00000000 0x8c boot.o
+ 0x00000060 putchar
+ 0x00000000 entry
+ 0x0000006c puts
+ 0x00000058 isr_enable
+ .text 0x0000008c 0x9d8 uart_echo_test.o
+ 0x00000894 strcpy
+ 0x00000124 print
+ 0x00000114 read_uart
+ 0x00000104 print_char
+ 0x000008f4 main2
+ 0x00000330 getsym
+ 0x00000a3c parse_error
+ 0x00000700 strrev
+ 0x000007f8 calculator
+ 0x00000764 itoa
+ 0x00000174 print_long
+ 0x000008c4 calculator_test
+ 0x0000044c expression
+ 0x000009ec set_interrupt_address
+ 0x000003c8 evaluate_number
+ 0x00000a10 init_parser
+ 0x0000053c term
+ 0x0000008c print_uart
+ 0x00000180 interrupt
+ 0x00000650 factor
+ 0x000000dc putc_uart
+ 0x00000318 print_longlong
+ 0x00000160 print_short
+ *(.stub)
+ *(.gnu.warning)
+ *(.gnu.linkonce.t*)
+ *(.mips16.fn.*)
+ *(.mips16.call.*)
+
+.init
+ *(.init)
+
+.fini
+ *(.fini)
+ 0x00000a64 _ecode=.
+
+.reginfo 0x00000a64 0x18
+ *(.reginfo)
+ .reginfo 0x00000a64 0x18 boot.o
+ .reginfo 0x00000a7c 0x18 uart_echo_test.o
+
+.ctors
+ *(.ctors)
+
+.dtors
+ *(.dtors)
+
+.eh_frame
+ *(.eh_frame)
+
+.gcc_except_table
+ *(.gcc_except_table)
+
+.sdeinit
+ *(.sdeinit)
+
+.sdefini
+ *(.sdefini)
+
+.rodata 0x00000a7c 0x104
+ *(.rodata)
+ .rodata 0x00000a7c 0x104 uart_echo_test.o
+ *(.rdata)
+ *(.gnu.linkonce.r*)
+
+.rodata1
+ *(.rodata1)
+ 0x00000b80 _etext=.
+ 0x00000b80 PROVIDE (etext, .)
+
+.data 0x00000b80 0x0
+ 0x00000b80 _fdata=.
+ *(.data)
+ *(.gnu.linkonce.d*)
+
+.data1
+ *(.data1)
+ 0x00008b70 _gp=(.+0x7ff0)
+
+.lit8
+ *(.lit8)
+
+.lit4
+ *(.lit4)
+
+.sdata 0x00000b80 0x4
+ *(.sdata)
+ .sdata 0x00000b80 0x4 uart_echo_test.o
+ 0x00000b80 int_flag
+ *(.gnu.linkonce.s*)
+ 0x00000b84 _edata=.
+ 0x00000b84 PROVIDE (edata, .)
+ 0x00000b88 .=ALIGN(0x8)
+ 0x00000b84 __bss_start=.
+ 0x00000b88 _fbss=__bss_start
+
+.sbss 0x00000b88 0x15
+ *(.sbss)
+ *(.scommon)
+ .scommon 0x00000b88 0x15 uart_echo_test.o
+ 0x00000b88 result_buffer
+ 0x00000b90 char_ptr
+ 0x00000b94 buf
+ 0x00000b98 read_ptr
+ 0x00000b9c sym
+
+.bss 0x00000ba0 0x78
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ COMMON 0x00000ba0 0x78 uart_echo_test.o
+ 0x00000ba0 buffer
+ 0x00000c18 _end=.
+ 0x00000c18 PROVIDE (end, .)
+
+.stab
+ *(.stab)
+
+.stabstr
+ *(.stabstr)
+
+.comment
+ *(.comment)
+
+.debug
+ *(.debug)
+
+.line
+ *(.line)
+
+.debug_srcinfo
+ *(.debug_srcinfo)
+
+.debug_sfnames
+ *(.debug_sfnames)
+
+.debug_aranges
+ *(.debug_aranges)
+
+.debug_pubnames
+ *(.debug_pubnames)
+
+.debug_info
+ *(.debug_info)
+
+.debug_abbrev
+ *(.debug_abbrev)
+
+.debug_line
+ *(.debug_line)
+
+.debug_frame
+ *(.debug_frame)
+
+.debug_str
+ *(.debug_str)
+
+.debug_loc
+ *(.debug_loc)
+
+.debug_macinfo
+ *(.debug_macinfo)
+
+.debug_weaknames
+ *(.debug_weaknames)
+
+.debug_funcnames
+ *(.debug_funcnames)
+
+.debug_typenames
+ *(.debug_typenames)
+
+.debug_varnames
+ *(.debug_varnames)
+
+.mdebug
+ *(.mdebug)
+
+.rel.text
+ *(.rel.text)
+ *(.rel.gnu.linkonce.t*)
+
+.rela.text
+ *(.rela.text)
+ *(.rela.gnu.linkonce.t*)
+
+.rel.data
+ *(.rel.data)
+ *(.rel.gnu.linkonce.d*)
+
+.rela.data
+ *(.rela.data)
+ *(.rela.gnu.linkonce.d*)
+
+.rel.sdata
+ *(.rel.sdata)
+ *(.rel.gnu.linkonce.s*)
+
+.rela.sdata
+ *(.rela.sdata)
+ *(.rela.gnu.linkonce.s*)
+
+.rel.rodata
+ *(.rel.rodata)
+ *(.rel.gnu.linkonce.r*)
+
+.rela.rodata
+ *(.rela.rodata)
+ *(.rela.gnu.linkonce.r*)
+
+.gptab.sdata
+ *(.gptab.data)
+ *(.gptab.sdata)
+
+.gptab.sbss
+ *(.gptab.bss)
+ *(.gptab.sbss)
+OUTPUT(test.exe elf32-bigmips)
Index: compile.bat
===================================================================
--- compile.bat (nonexistent)
+++ compile.bat (revision 4)
@@ -0,0 +1,24 @@
+path;
+path=..\..\..\gccmips_elf
+as -o boot.o ..\plasmaboot.asm
+gcc -O2 -O -DRTL_SIM -Dmain=main2 -Wall -S uart_echo_test.c
+gcc -O2 -O -DRTL_SIM -Dmain=main2 -Wall -c -s uart_echo_test.c
+ld.exe -Ttext 0 -eentry -Map test.map -s -N -o test.exe boot.o uart_echo_test.o
+objdump.exe --disassemble test.exe > list.txt
+rem copy test.map
+rem copy count_tak.s
+rem copy list.txt
+convert_mips.exe -sp16k
+copy code0.hex ..\..\..\rtl\altera\*.*
+copy code1.hex ..\..\..\rtl\altera\*.*
+copy code2.hex ..\..\..\rtl\altera\*.*
+copy code3.hex ..\..\..\rtl\altera\*.*
+copy code0.coe ..\..\..\rtl\xilinx\*.*
+copy code1.coe ..\..\..\rtl\xilinx\*.*
+copy code2.coe ..\..\..\rtl\xilinx\*.*
+copy code3.coe ..\..\..\rtl\xilinx\*.*
+rem copy code.txt
+copy ram1k0.mif ..\..\..\rtl\xilinx\*.*
+copy ram1k1.mif ..\..\..\rtl\xilinx\*.*
+copy ram1k2.mif ..\..\..\rtl\xilinx\*.*
+copy ram1k3.mif ..\..\..\rtl\xilinx\*.*
Index: test.exe
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: test.exe
===================================================================
--- test.exe (nonexistent)
+++ test.exe (revision 4)
test.exe
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: code0.coe
===================================================================
--- code0.coe (nonexistent)
+++ code0.coe (revision 4)
@@ -0,0 +1,786 @@
+memory_initialization_radix=16;
+memory_initialization_vector=
+3c,
+37,
+3c,
+34,
+3c,
+34,
+3c,
+37,
+ac,
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+14,
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+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00;
Index: boot.o
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: boot.o
===================================================================
--- boot.o (nonexistent)
+++ boot.o (revision 4)
boot.o
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: code1.coe
===================================================================
--- code1.coe (nonexistent)
+++ code1.coe (revision 4)
@@ -0,0 +1,786 @@
+memory_initialization_radix=16;
+memory_initialization_vector=
+1c,
+9c,
+04,
+84,
+05,
+a5,
+1d,
+bd,
+80,
+85,
+60,
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+bf,
+b0,
+00,
+03,
+02,
+42,
+62,
+02,
+42,
+82,
+04,
+00,
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+04,
+00,
+84,
+04,
+00,
+84,
+04,
+00,
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+84,
+04,
+00,
+84,
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+00,
+84,
+04,
+00,
+84,
+04,
+00,
+84,
+04,
+00,
+84,
+04,
+00,
+84,
+04,
+00,
+84,
+82,
+00,
+40,
+00,
+80,
+00,
+10,
+02,
+40,
+00,
+04,
+00,
+84,
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+00,
+02,
+03,
+63,
+43,
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+42,
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+00,
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+84,
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+bf,
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+29,
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+33,
+33,
+33,
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+73,
+00,
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+00,
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+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00;
Index: code2.coe
===================================================================
--- code2.coe (nonexistent)
+++ code2.coe (revision 4)
@@ -0,0 +1,786 @@
+memory_initialization_radix=16;
+memory_initialization_vector=
+00,
+8b,
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+0b,
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+0b,
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+0b,
+00,
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+0b,
+80,
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+00,
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+00,
+0b,
+80,
+00,
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+00,
+00,
+00,
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+00,
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+10,
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+00,
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+00,
+00,
+00,
+00,
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+72,
+21,
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+66,
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+00,
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+65,
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+65,
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+33,
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+30,
+0a,
+33,
+30,
+2d,
+0a,
+31,
+33,
+2f,
+31,
+00,
+30,
+29,
+33,
+0a,
+33,
+33,
+00,
+33,
+33,
+00,
+2a,
+0a,
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+31,
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+0a,
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+00,
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+00,
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+00,
+00,
+00,
+00,
+00,
+00,
+00,
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+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
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+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00,
+00;
Index: code3.coe
===================================================================
--- code3.coe (nonexistent)
+++ code3.coe (revision 4)
@@ -0,0 +1,786 @@
+memory_initialization_radix=16;
+memory_initialization_vector=
+00,
+70,
+00,
+88,
+00,
+18,
+00,
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+2a,
+fd,
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Index: uart_echo_test.o
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: uart_echo_test.o
===================================================================
--- uart_echo_test.o (nonexistent)
+++ uart_echo_test.o (revision 4)
uart_echo_test.o
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: ram1k0.mif
===================================================================
--- ram1k0.mif (nonexistent)
+++ ram1k0.mif (revision 4)
@@ -0,0 +1,784 @@
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Index: ram1k1.mif
===================================================================
--- ram1k1.mif (nonexistent)
+++ ram1k1.mif (revision 4)
@@ -0,0 +1,784 @@
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Index: ram1k2.mif
===================================================================
--- ram1k2.mif (nonexistent)
+++ ram1k2.mif (revision 4)
@@ -0,0 +1,784 @@
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Index: ram1k3.mif
===================================================================
--- ram1k3.mif (nonexistent)
+++ ram1k3.mif (revision 4)
@@ -0,0 +1,784 @@
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+00001010
+00000000
+00110011
+00000000
+00110101
+00101000
+00110001
+00000000
+00110000
+00110011
+00101111
+00110011
+00000000
+00110101
+00101001
+00110011
+00101001
+00000000
+00110011
+00110011
+00000000
+01101110
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
+00000000
Index: uart_echo_test.s
===================================================================
--- uart_echo_test.s (nonexistent)
+++ uart_echo_test.s (revision 4)
@@ -0,0 +1,1325 @@
+ .file 1 "uart_echo_test.c"
+
+ # -G value = 8, Cpu = 3000, ISA = 1
+ # GNU C version egcs-2.90.23 980102 (egcs-1.0.1 release) (sde) [AL 1.1, MM 40] Algorithmics SDE-MIPS v4.0.5 compiled by GNU C version egcs-2.91.57 19980901 (egcs-1.1 release).
+ # options passed: -O2 -O -Wall
+ # options enabled: -fdefer-pop -fomit-frame-pointer -fthread-jumps
+ # -fpeephole -finline -fkeep-static-consts -fpcc-struct-return
+ # -fdelayed-branch -fcommon -fverbose-asm -fgnu-linker -falias-check
+ # -fargument-alias -msplit-addresses -mgas -mrnames -mgpOPT -mgpopt
+ # -membedded-data -meb -mmad -marg32 -mdebugh -mdebugi -mmadd -mno-gpconst
+ # -mcpu=3000
+
+gcc2_compiled.:
+ .globl int_flag
+ .sdata
+ .align 0
+ .align 2
+int_flag:
+ .size int_flag,4
+ .word 0
+ .rdata
+ .align 0
+ .align 2
+.LC0:
+ .ascii "PError!\n\000"
+ .align 2
+.LC1:
+ .ascii "Sorry Overflow..!\n\000"
+ .rdata
+ .align 0
+ .align 2
+.LC2:
+ .ascii "\n"
+ .ascii " parse error occurred\n\000"
+ .rdata
+ .align 0
+ .align 2
+.LC3:
+ .ascii "\n\000"
+ .align 2
+.LC4:
+ .ascii "=\000"
+ .align 2
+.LC5:
+ .ascii "[Hex] \000"
+ .align 2
+.LC6:
+ .ascii "[Dec]\n\000"
+ .rdata
+ .align 0
+ .align 2
+.LC7:
+ .ascii "5*3\n\000"
+ .align 2
+.LC8:
+ .ascii "100*31\n\000"
+ .align 2
+.LC9:
+ .ascii "(-31050)/(-31)\n\000"
+ .align 2
+.LC10:
+ .ascii "(-1053333)/(231)\n\000"
+ .align 2
+.LC11:
+ .ascii "(10503)/(-314)\n\000"
+ .align 2
+.LC12:
+ .ascii "3333*3333\n\000"
+ .align 2
+.LC13:
+ .ascii "533*443\n\000"
+ .align 2
+.LC14:
+ .ascii "10*314\n\000"
+ .align 2
+.LC15:
+ .ascii "(-350)/(-231)\n\000"
+ .align 2
+.LC16:
+ .ascii "(-10533333)/(1231)\n\000"
+ .align 2
+.LC17:
+ .ascii "(105034)/(-3134)\n\000"
+ .align 2
+.LC18:
+ .ascii "3363*33333\n\000"
+ .align 2
+.LC19:
+ .ascii "$finish\000"
+
+ .comm read_ptr,4
+
+ .comm buffer,120
+
+ .comm result_buffer,8
+
+ .comm sym,1
+
+ .comm char_ptr,4
+
+ .comm buf,2
+
+ .text
+ .text
+ .align 2
+ .globl print_uart
+ .ent print_uart
+print_uart:
+ .frame $sp,0,$ra # vars= 0, regs= 0/0, args= 0, extra= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ lbu $v0,0($a0)
+ beq $v0,$zero,.L3
+ li $v1,16380 # 0x00003ffc
+.L5:
+ #.set volatile
+ lw $v0,0($v1)
+ #.set novolatile
+ andi $v0,$v0,0x0100
+ bne $v0,$zero,.L5
+ lbu $v0,0($a0)
+ #.set volatile
+ sb $v0,0($v1)
+ #.set novolatile
+ addu $a0,$a0,1
+ lbu $v0,0($a0)
+ bne $v0,$zero,.L5
+.L3:
+ j $ra
+ .end print_uart
+ .size print_uart,.-print_uart
+ .align 2
+ .globl putc_uart
+ .ent putc_uart
+putc_uart:
+ .frame $sp,0,$ra # vars= 0, regs= 0/0, args= 0, extra= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ andi $a0,$a0,0x00ff
+ li $v1,16380 # 0x00003ffc
+.L11:
+ #.set volatile
+ lw $v0,0($v1)
+ #.set novolatile
+ andi $v0,$v0,0x0100
+ .set noreorder
+ .set nomacro
+ bne $v0,$zero,.L11
+ li $v0,16380 # 0x00003ffc
+ .set macro
+ .set reorder
+
+ #.set volatile
+ sb $a0,0($v0)
+ #.set novolatile
+ j $ra
+ .end putc_uart
+ .size putc_uart,.-putc_uart
+ .align 2
+ .globl print_char
+ .ent print_char
+print_char:
+ .frame $sp,0,$ra # vars= 0, regs= 0/0, args= 0, extra= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ andi $a0,$a0,0x00ff
+ li $v0,16369 # 0x00003ff1
+ #.set volatile
+ sb $a0,0($v0)
+ #.set novolatile
+ j $ra
+ .end print_char
+ .size print_char,.-print_char
+ .align 2
+ .globl read_uart
+ .ent read_uart
+read_uart:
+ .frame $sp,0,$ra # vars= 0, regs= 0/0, args= 0, extra= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ li $v0,16380 # 0x00003ffc
+ #.set volatile
+ lw $v0,0($v0)
+ #.set novolatile
+ .set noreorder
+ .set nomacro
+ j $ra
+ andi $v0,$v0,0x00ff
+ .set macro
+ .set reorder
+
+ .end read_uart
+ .size read_uart,.-read_uart
+ .align 2
+ .globl print
+ .ent print
+print:
+ .frame $sp,0,$ra # vars= 0, regs= 0/0, args= 0, extra= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ lbu $v0,0($a0)
+ .set noreorder
+ .set nomacro
+ beq $v0,$zero,.L19
+ move $v1,$v0
+ .set macro
+ .set reorder
+
+ li $a1,16368 # 0x00003ff0
+ move $v0,$v1
+.L22:
+ #.set volatile
+ sb $v0,0($a1)
+ #.set novolatile
+ addu $a0,$a0,1
+ lbu $v1,0($a0)
+ .set noreorder
+ .set nomacro
+ bne $v1,$zero,.L22
+ move $v0,$v1
+ .set macro
+ .set reorder
+
+.L19:
+ li $v0,16368 # 0x00003ff0
+ #.set volatile
+ sb $zero,0($v0)
+ #.set novolatile
+ j $ra
+ .end print
+ .size print,.-print
+ .align 2
+ .globl print_short
+ .ent print_short
+print_short:
+ .frame $sp,0,$ra # vars= 0, regs= 0/0, args= 0, extra= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ sll $a0,$a0,16
+ sra $a0,$a0,16
+ li $v0,16370 # 0x00003ff2
+ #.set volatile
+ sh $a0,0($v0)
+ #.set novolatile
+ j $ra
+ .end print_short
+ .size print_short,.-print_short
+ .align 2
+ .globl print_long
+ .ent print_long
+print_long:
+ .frame $sp,0,$ra # vars= 0, regs= 0/0, args= 0, extra= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ li $v0,16372 # 0x00003ff4
+ #.set volatile
+ sw $a0,0($v0)
+ #.set novolatile
+ j $ra
+ .end print_long
+ .size print_long,.-print_long
+ .text
+ .align 2
+ .globl interrupt
+ .ent interrupt
+interrupt:
+ .frame $sp,24,$ra # vars= 0, regs= 2/0, args= 16, extra= 0
+ .mask 0x80010000,-4
+ .fmask 0x00000000,0
+ subu $sp,$sp,24
+ sw $ra,20($sp)
+ sw $s0,16($sp)
+ #APP
+ addiu $sp,$sp,-52 ;
+ sw $a0,($sp)
+ sw $v0,4($sp)
+ sw $v1,8($sp)
+ sw $a1,12($sp)
+ sw $s0,16($sp)
+ sw $s1,20($sp)
+ sw $s2,24($sp)
+ sw $a3,28($sp)
+ sw $s4,32($sp)
+ sw $s5,36($sp)
+ sw $s6,40($sp)
+ sw $s7,44($sp)
+ sw $a2,48($sp)
+ #NO_APP
+ jal read_uart
+ move $s0,$v0
+ xori $v1,$s0,0x000a
+ sltu $v1,$v1,1
+ xori $v0,$s0,0x000d
+ sltu $v0,$v0,1
+ or $v1,$v1,$v0
+ .set noreorder
+ .set nomacro
+ beq $v1,$zero,.L26
+ li $v0,8 # 0x00000008
+ .set macro
+ .set reorder
+
+ lw $v0,read_ptr
+ sb $zero,0($v0)
+ lui $v0,%hi(buffer) # high
+ addiu $v0,$v0,%lo(buffer) # low
+ sw $v0,read_ptr
+ .set noreorder
+ .set nomacro
+ jal putc_uart
+ li $a0,10 # 0x0000000a
+ .set macro
+ .set reorder
+
+ .set noreorder
+ .set nomacro
+ jal putc_uart
+ li $a0,13 # 0x0000000d
+ .set macro
+ .set reorder
+
+ #.set volatile
+ lw $v0,int_flag
+ #.set novolatile
+ .set noreorder
+ .set nomacro
+ beq $v0,$zero,.L27
+ lui $a0,%hi(.LC0) # high
+ .set macro
+ .set reorder
+
+ .set noreorder
+ .set nomacro
+ jal print
+ addiu $a0,$a0,%lo(.LC0) # low
+ .set macro
+ .set reorder
+
+ b .L29
+.L27:
+ li $v0,1 # 0x00000001
+ #.set volatile
+ sw $v0,int_flag
+ #.set novolatile
+ b .L29
+.L26:
+ .set noreorder
+ .set nomacro
+ bne $s0,$v0,.L30
+ lui $v0,%hi(buffer) # high
+ .set macro
+ .set reorder
+
+ lw $v1,read_ptr
+ addiu $v0,$v0,%lo(buffer) # low
+ sltu $v0,$v0,$v1
+ beq $v0,$zero,.L35
+ .set noreorder
+ .set nomacro
+ jal putc_uart
+ li $a0,8 # 0x00000008
+ .set macro
+ .set reorder
+
+ lw $v0,read_ptr
+ .set noreorder
+ .set nomacro
+ b .L34
+ addu $v0,$v0,-1
+ .set macro
+ .set reorder
+
+.L30:
+ lw $v1,read_ptr
+.L35:
+ lui $v0,%hi(buffer+120) # high
+ addiu $a0,$v0,%lo(buffer+120) # low
+ sltu $v0,$v1,$a0
+ .set noreorder
+ .set nomacro
+ bne $v0,$zero,.L32
+ addu $v0,$a0,-120
+ .set macro
+ .set reorder
+
+ sb $zero,0($v1)
+ sw $v0,read_ptr
+ lui $a0,%hi(.LC1) # high
+ .set noreorder
+ .set nomacro
+ jal print_uart
+ addiu $a0,$a0,%lo(.LC1) # low
+ .set macro
+ .set reorder
+
+ b .L29
+.L32:
+ .set noreorder
+ .set nomacro
+ jal putc_uart
+ move $a0,$s0
+ .set macro
+ .set reorder
+
+ lw $v0,read_ptr
+ sb $s0,0($v0)
+ addu $v0,$v0,1
+.L34:
+ sw $v0,read_ptr
+.L29:
+ #APP
+ lw $a0,($sp)
+ lw $v0,4($sp)
+ lw $v1,8($sp)
+ lw $a1,12($sp)
+ lw $s0,16($sp)
+ lw $s1,20($sp)
+ lw $s2,24($sp)
+ lw $a3,28($sp)
+ lw $s4,32($sp)
+ lw $s5,36($sp)
+ lw $s6,40($sp)
+ lw $s7,44($sp)
+ lw $a2,48($sp)
+ addiu $sp,$sp,52 ;
+ lw $ra,20($sp);
+ addiu $sp,$sp,24 ;
+ jr $26
+ nop
+ #NO_APP
+ lw $ra,20($sp)
+ lw $s0,16($sp)
+ .set noreorder
+ .set nomacro
+ j $ra
+ addu $sp,$sp,24
+ .set macro
+ .set reorder
+
+ .end interrupt
+ .size interrupt,.-interrupt
+ .align 2
+ .globl print_longlong
+ .ent print_longlong
+print_longlong:
+ .frame $sp,0,$ra # vars= 0, regs= 0/0, args= 0, extra= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ li $a2,16372 # 0x00003ff4
+ sra $v1,$a0,0
+ sra $v0,$a0,31
+ #.set volatile
+ sw $v1,0($a2)
+ #.set novolatile
+ #.set volatile
+ sw $a1,0($a2)
+ #.set novolatile
+ j $ra
+ .end print_longlong
+ .size print_longlong,.-print_longlong
+ .align 2
+ .globl getsym
+ .ent getsym
+getsym:
+ .frame $sp,0,$ra # vars= 0, regs= 0/0, args= 0, extra= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ lw $v0,char_ptr
+ lbu $a0,0($v0)
+ .set noreorder
+ .set nomacro
+ b .L47
+ xori $v1,$a0,0x0020
+ .set macro
+ .set reorder
+
+.L42:
+ lw $v1,char_ptr
+ addu $v0,$v1,1
+ sw $v0,char_ptr
+ lbu $a0,1($v1)
+ xori $v1,$a0,0x0020
+.L47:
+ sltu $v1,$v1,1
+ xori $v0,$a0,0x000a
+ sltu $v0,$v0,1
+ or $v1,$v1,$v0
+ .set noreorder
+ .set nomacro
+ bne $v1,$zero,.L42
+ li $v0,13 # 0x0000000d
+ .set macro
+ .set reorder
+
+ beq $a0,$v0,.L42
+ lw $v0,char_ptr
+ lbu $v0,0($v0)
+ bne $v0,$zero,.L44
+ sb $zero,sym
+ b .L45
+.L44:
+ lw $v0,char_ptr
+ lbu $v1,0($v0)
+ sb $v1,sym
+ addu $v0,$v0,1
+ sw $v0,char_ptr
+.L45:
+ j $ra
+ .end getsym
+ .size getsym,.-getsym
+ .align 2
+ .globl evaluate_number
+ .ent evaluate_number
+evaluate_number:
+ .frame $sp,24,$ra # vars= 0, regs= 2/0, args= 16, extra= 0
+ .mask 0x80010000,-4
+ .fmask 0x00000000,0
+ subu $sp,$sp,24
+ sw $ra,20($sp)
+ sw $s0,16($sp)
+ lbu $s0,sym
+ lw $v0,char_ptr
+ move $v1,$v0
+ lbu $v0,0($v0)
+ .set noreorder
+ .set nomacro
+ b .L55
+ addu $s0,$s0,-48
+ .set macro
+ .set reorder
+
+.L53:
+ addu $v0,$v0,$s0
+ sll $v0,$v0,1
+ move $a0,$v1
+ lbu $v1,0($a0)
+ addu $v0,$v0,$v1
+ addu $s0,$v0,-48
+ addu $v0,$a0,1
+ sw $v0,char_ptr
+ move $v1,$v0
+ lbu $v0,1($a0)
+.L55:
+ addu $v0,$v0,-48
+ sltu $v0,$v0,10
+ .set noreorder
+ .set nomacro
+ bne $v0,$zero,.L53
+ sll $v0,$s0,2
+ .set macro
+ .set reorder
+
+ jal getsym
+ move $v0,$s0
+ lw $ra,20($sp)
+ lw $s0,16($sp)
+ .set noreorder
+ .set nomacro
+ j $ra
+ addu $sp,$sp,24
+ .set macro
+ .set reorder
+
+ .end evaluate_number
+ .size evaluate_number,.-evaluate_number
+ .align 2
+ .globl expression
+ .ent expression
+expression:
+ .frame $sp,32,$ra # vars= 0, regs= 4/0, args= 16, extra= 0
+ .mask 0x80070000,-4
+ .fmask 0x00000000,0
+ subu $sp,$sp,32
+ sw $ra,28($sp)
+ sw $s2,24($sp)
+ sw $s1,20($sp)
+ sw $s0,16($sp)
+ lbu $s0,sym
+ xori $v1,$s0,0x002b
+ sltu $v1,$v1,1
+ xori $v0,$s0,0x002d
+ sltu $v0,$v0,1
+ or $v1,$v1,$v0
+ beq $v1,$zero,.L57
+ jal getsym
+.L57:
+ jal term
+ move $s1,$v0
+ li $v0,45 # 0x0000002d
+ bne $s0,$v0,.L58
+ subu $s1,$zero,$s1
+.L58:
+ lbu $v0,sym
+ move $a0,$v0
+ andi $v0,$v0,0x00ff
+ xori $v1,$v0,0x002b
+ sltu $v1,$v1,1
+ xori $v0,$v0,0x002d
+ sltu $v0,$v0,1
+ or $v1,$v1,$v0
+ .set noreorder
+ .set nomacro
+ beq $v1,$zero,.L60
+ li $s2,43 # 0x0000002b
+ .set macro
+ .set reorder
+
+.L61:
+ .set noreorder
+ .set nomacro
+ jal getsym
+ move $s0,$a0
+ .set macro
+ .set reorder
+
+ jal term
+ bne $s0,$s2,.L62
+ .set noreorder
+ .set nomacro
+ b .L59
+ addu $s1,$s1,$v0
+ .set macro
+ .set reorder
+
+.L62:
+ subu $s1,$s1,$v0
+.L59:
+ lbu $a0,sym
+ andi $v0,$a0,0x00ff
+ xori $v1,$v0,0x002b
+ sltu $v1,$v1,1
+ xori $v0,$v0,0x002d
+ sltu $v0,$v0,1
+ or $v1,$v1,$v0
+ bne $v1,$zero,.L61
+.L60:
+ move $v0,$s1
+ lw $ra,28($sp)
+ lw $s2,24($sp)
+ lw $s1,20($sp)
+ lw $s0,16($sp)
+ .set noreorder
+ .set nomacro
+ j $ra
+ addu $sp,$sp,32
+ .set macro
+ .set reorder
+
+ .end expression
+ .size expression,.-expression
+ .align 2
+ .globl term
+ .ent term
+term:
+ .frame $sp,32,$ra # vars= 0, regs= 3/0, args= 16, extra= 0
+ .mask 0x80030000,-8
+ .fmask 0x00000000,0
+ subu $sp,$sp,32
+ sw $ra,24($sp)
+ sw $s1,20($sp)
+ .set noreorder
+ .set nomacro
+ jal factor
+ sw $s0,16($sp)
+ .set macro
+ .set reorder
+
+ .set noreorder
+ .set nomacro
+ b .L66
+ move $s1,$v0
+ .set macro
+ .set reorder
+
+.L68:
+ lbu $s0,sym
+ jal getsym
+ jal factor
+ move $v1,$v0
+ li $v0,42 # 0x0000002a
+ .set noreorder
+ .set nomacro
+ beq $s0,$v0,.L70
+ slt $v0,$s0,43
+ .set macro
+ .set reorder
+
+ .set noreorder
+ .set nomacro
+ beq $v0,$zero,.L75
+ li $v0,37 # 0x00000025
+ .set macro
+ .set reorder
+
+ beq $s0,$v0,.L72
+ b .L66
+.L75:
+ li $v0,47 # 0x0000002f
+ beq $s0,$v0,.L71
+ b .L66
+.L70:
+ mult $s1,$v1
+ mflo $s1
+ b .L66
+.L71:
+ div $s1,$s1,$v1
+ b .L66
+.L72:
+ rem $s1,$s1,$v1
+.L66:
+ lbu $a0,sym
+ xori $v1,$a0,0x002a
+ sltu $v1,$v1,1
+ xori $v0,$a0,0x002f
+ sltu $v0,$v0,1
+ or $v1,$v1,$v0
+ .set noreorder
+ .set nomacro
+ bne $v1,$zero,.L68
+ li $v0,37 # 0x00000025
+ .set macro
+ .set reorder
+
+ .set noreorder
+ .set nomacro
+ beq $a0,$v0,.L68
+ move $v0,$s1
+ .set macro
+ .set reorder
+
+ lw $ra,24($sp)
+ lw $s1,20($sp)
+ lw $s0,16($sp)
+ .set noreorder
+ .set nomacro
+ j $ra
+ addu $sp,$sp,32
+ .set macro
+ .set reorder
+
+ .end term
+ .size term,.-term
+ .text
+ .align 2
+ .globl factor
+ .ent factor
+factor:
+ .frame $sp,24,$ra # vars= 0, regs= 2/0, args= 16, extra= 0
+ .mask 0x80010000,-4
+ .fmask 0x00000000,0
+ subu $sp,$sp,24
+ sw $ra,20($sp)
+ sw $s0,16($sp)
+ lbu $v0,sym
+ addu $v0,$v0,-48
+ sltu $v0,$v0,10
+ .set noreorder
+ .set nomacro
+ beq $v0,$zero,.L80
+ li $v0,40 # 0x00000028
+ .set macro
+ .set reorder
+
+ jal evaluate_number
+ b .L89
+.L80:
+ lbu $v1,sym
+ bne $v1,$v0,.L82
+ jal getsym
+ jal expression
+ move $s0,$v0
+ lbu $v1,sym
+ li $v0,41 # 0x00000029
+ .set noreorder
+ .set nomacro
+ beq $v1,$v0,.L83
+ lui $a0,%hi(.LC2) # high
+ .set macro
+ .set reorder
+
+ .set noreorder
+ .set nomacro
+ jal print_uart
+ addiu $a0,$a0,%lo(.LC2) # low
+ .set macro
+ .set reorder
+
+.L83:
+ jal getsym
+ .set noreorder
+ .set nomacro
+ b .L89
+ move $v0,$s0
+ .set macro
+ .set reorder
+
+.L82:
+ lbu $v0,sym
+ .set noreorder
+ .set nomacro
+ beq $v0,$zero,.L89
+ move $v0,$zero
+ .set macro
+ .set reorder
+
+ lui $a0,%hi(.LC2) # high
+ .set noreorder
+ .set nomacro
+ jal print_uart
+ addiu $a0,$a0,%lo(.LC2) # low
+ .set macro
+ .set reorder
+
+ move $v0,$zero
+.L89:
+ lw $ra,20($sp)
+ lw $s0,16($sp)
+ .set noreorder
+ .set nomacro
+ j $ra
+ addu $sp,$sp,24
+ .set macro
+ .set reorder
+
+ .end factor
+ .size factor,.-factor
+ .align 2
+ .globl strrev
+ .ent strrev
+strrev:
+ .frame $sp,0,$ra # vars= 0, regs= 0/0, args= 0, extra= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ move $a2,$a0
+ lbu $v0,0($a0)
+ .set noreorder
+ .set nomacro
+ beq $v0,$zero,.L99
+ move $a1,$a0
+ .set macro
+ .set reorder
+
+ addu $a1,$a1,1
+.L101:
+ lbu $v0,0($a1)
+ .set noreorder
+ .set nomacro
+ bne $v0,$zero,.L101
+ addu $a1,$a1,1
+ .set macro
+ .set reorder
+
+ addu $a1,$a1,-1
+ .set noreorder
+ .set nomacro
+ b .L100
+ addu $a1,$a1,-1
+ .set macro
+ .set reorder
+
+.L97:
+ lbu $v0,0($a2)
+ lbu $v1,0($a1)
+ sb $v1,0($a2)
+ sb $v0,0($a1)
+ addu $a2,$a2,1
+.L99:
+ addu $a1,$a1,-1
+.L100:
+ sltu $v0,$a2,$a1
+ bne $v0,$zero,.L97
+ .set noreorder
+ .set nomacro
+ j $ra
+ move $v0,$a0
+ .set macro
+ .set reorder
+
+ .end strrev
+ .size strrev,.-strrev
+ .align 2
+ .globl itoa
+ .ent itoa
+itoa:
+ .frame $sp,24,$ra # vars= 0, regs= 1/0, args= 16, extra= 0
+ .mask 0x80000000,-8
+ .fmask 0x00000000,0
+ subu $sp,$sp,24
+ .set noreorder
+ .set nomacro
+ bgez $a0,.L103
+ sw $ra,16($sp)
+ .set macro
+ .set reorder
+
+ li $v0,45 # 0x0000002d
+ sb $v0,0($a1)
+ addu $a1,$a1,1
+ subu $a0,$zero,$a0
+.L103:
+ .set noreorder
+ .set nomacro
+ beq $a0,$zero,.L105
+ move $a3,$a1
+ .set macro
+ .set reorder
+
+ li $t0,1717960704 # 0x66660000
+ ori $t0,$t0,0x6667
+.L106:
+ mult $a0,$t0
+ mfhi $t1
+ sra $v1,$t1,2
+ sra $v0,$a0,31
+ subu $a2,$v1,$v0
+ move $v1,$a2
+ sll $v0,$a2,2
+ addu $v0,$v0,$a2
+ sll $v0,$v0,1
+ subu $a2,$a0,$v0
+ addu $v0,$a2,48
+ sb $v0,0($a3)
+ move $a0,$v1
+ .set noreorder
+ .set nomacro
+ bne $a0,$zero,.L106
+ addu $a3,$a3,1
+ .set macro
+ .set reorder
+
+.L105:
+ .set noreorder
+ .set nomacro
+ bne $a1,$a3,.L108
+ li $v0,48 # 0x00000030
+ .set macro
+ .set reorder
+
+ sb $v0,0($a1)
+ addu $a3,$a1,1
+.L108:
+ sb $zero,0($a3)
+ .set noreorder
+ .set nomacro
+ jal strrev
+ move $a0,$a1
+ .set macro
+ .set reorder
+
+ lw $ra,16($sp)
+ .set noreorder
+ .set nomacro
+ j $ra
+ addu $sp,$sp,24
+ .set macro
+ .set reorder
+
+ .end itoa
+ .size itoa,.-itoa
+ .text
+ .align 2
+ .globl calculator
+ .ent calculator
+calculator:
+ .frame $sp,32,$ra # vars= 0, regs= 3/0, args= 16, extra= 0
+ .mask 0x80030000,-8
+ .fmask 0x00000000,0
+ subu $sp,$sp,32
+ sw $ra,24($sp)
+ sw $s1,20($sp)
+ sw $s0,16($sp)
+ lui $s0,%hi(buffer) # high
+ addiu $s0,$s0,%lo(buffer) # low
+ sw $s0,char_ptr
+ jal getsym
+ jal expression
+ move $s1,$v0
+ lui $a0,%hi(.LC3) # high
+ .set noreorder
+ .set nomacro
+ jal print
+ addiu $a0,$a0,%lo(.LC3) # low
+ .set macro
+ .set reorder
+
+ .set noreorder
+ .set nomacro
+ jal print
+ move $a0,$s0
+ .set macro
+ .set reorder
+
+ lui $a0,%hi(.LC4) # high
+ .set noreorder
+ .set nomacro
+ jal print
+ addiu $a0,$a0,%lo(.LC4) # low
+ .set macro
+ .set reorder
+
+ .set noreorder
+ .set nomacro
+ jal print_long
+ move $a0,$s1
+ .set macro
+ .set reorder
+
+ lui $a0,%hi(.LC5) # high
+ .set noreorder
+ .set nomacro
+ jal print
+ addiu $a0,$a0,%lo(.LC5) # low
+ .set macro
+ .set reorder
+
+ la $a1,result_buffer
+ .set noreorder
+ .set nomacro
+ jal itoa
+ move $a0,$s1
+ .set macro
+ .set reorder
+
+ la $a0,result_buffer
+ jal print
+ lui $a0,%hi(.LC6) # high
+ .set noreorder
+ .set nomacro
+ jal print
+ addiu $a0,$a0,%lo(.LC6) # low
+ .set macro
+ .set reorder
+
+ lw $ra,24($sp)
+ lw $s1,20($sp)
+ lw $s0,16($sp)
+ .set noreorder
+ .set nomacro
+ j $ra
+ addu $sp,$sp,32
+ .set macro
+ .set reorder
+
+ .end calculator
+ .size calculator,.-calculator
+ .align 2
+ .globl strcpy
+ .ent strcpy
+strcpy:
+ .frame $sp,0,$ra # vars= 0, regs= 0/0, args= 0, extra= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ lbu $v0,0($a1)
+ .set noreorder
+ .set nomacro
+ beq $v0,$zero,.L113
+ move $v1,$v0
+ .set macro
+ .set reorder
+
+.L114:
+ sb $v1,0($a0)
+ addu $a1,$a1,1
+ lbu $v1,0($a1)
+ .set noreorder
+ .set nomacro
+ bne $v1,$zero,.L114
+ addu $a0,$a0,1
+ .set macro
+ .set reorder
+
+.L113:
+ .set noreorder
+ .set nomacro
+ j $ra
+ sb $zero,0($a0)
+ .set macro
+ .set reorder
+
+ .end strcpy
+ .size strcpy,.-strcpy
+ .align 2
+ .globl calculator_test
+ .ent calculator_test
+calculator_test:
+ .frame $sp,24,$ra # vars= 0, regs= 1/0, args= 16, extra= 0
+ .mask 0x80000000,-8
+ .fmask 0x00000000,0
+ subu $sp,$sp,24
+ sw $ra,16($sp)
+ move $a1,$a0
+ lui $a0,%hi(buffer) # high
+ .set noreorder
+ .set nomacro
+ jal strcpy
+ addiu $a0,$a0,%lo(buffer) # low
+ .set macro
+ .set reorder
+
+ jal calculator
+ lw $ra,16($sp)
+ .set noreorder
+ .set nomacro
+ j $ra
+ addu $sp,$sp,24
+ .set macro
+ .set reorder
+
+ .end calculator_test
+ .size calculator_test,.-calculator_test
+ .text
+ .align 2
+ .globl main2
+ .ent main2
+main2:
+ .frame $sp,24,$ra # vars= 0, regs= 2/0, args= 16, extra= 0
+ .mask 0x80010000,-4
+ .fmask 0x00000000,0
+ subu $sp,$sp,24
+ sw $ra,20($sp)
+ sw $s0,16($sp)
+ move $s0,$zero
+ li $v1,16376 # 0x00003ff8
+ lui $v0,%hi(interrupt) # high
+ addiu $v0,$v0,%lo(interrupt) # low
+ #.set volatile
+ sw $v0,0($v1)
+ #.set novolatile
+ lui $v0,%hi(buffer) # high
+ addiu $v0,$v0,%lo(buffer) # low
+ sw $v0,read_ptr
+ lui $a0,%hi(.LC7) # high
+ .set noreorder
+ .set nomacro
+ jal print_uart
+ addiu $a0,$a0,%lo(.LC7) # low
+ .set macro
+ .set reorder
+
+ lui $a0,%hi(.LC8) # high
+ .set noreorder
+ .set nomacro
+ jal print_uart
+ addiu $a0,$a0,%lo(.LC8) # low
+ .set macro
+ .set reorder
+
+ lui $a0,%hi(.LC9) # high
+ .set noreorder
+ .set nomacro
+ jal print_uart
+ addiu $a0,$a0,%lo(.LC9) # low
+ .set macro
+ .set reorder
+
+ lui $a0,%hi(.LC10) # high
+ .set noreorder
+ .set nomacro
+ jal print_uart
+ addiu $a0,$a0,%lo(.LC10) # low
+ .set macro
+ .set reorder
+
+ lui $a0,%hi(.LC11) # high
+ .set noreorder
+ .set nomacro
+ jal print_uart
+ addiu $a0,$a0,%lo(.LC11) # low
+ .set macro
+ .set reorder
+
+ lui $a0,%hi(.LC12) # high
+ .set noreorder
+ .set nomacro
+ jal print_uart
+ addiu $a0,$a0,%lo(.LC12) # low
+ .set macro
+ .set reorder
+
+ lui $a0,%hi(.LC13) # high
+ .set noreorder
+ .set nomacro
+ jal print_uart
+ addiu $a0,$a0,%lo(.LC13) # low
+ .set macro
+ .set reorder
+
+ lui $a0,%hi(.LC14) # high
+ .set noreorder
+ .set nomacro
+ jal print_uart
+ addiu $a0,$a0,%lo(.LC14) # low
+ .set macro
+ .set reorder
+
+ lui $a0,%hi(.LC15) # high
+ .set noreorder
+ .set nomacro
+ jal print_uart
+ addiu $a0,$a0,%lo(.LC15) # low
+ .set macro
+ .set reorder
+
+ lui $a0,%hi(.LC16) # high
+ .set noreorder
+ .set nomacro
+ jal print_uart
+ addiu $a0,$a0,%lo(.LC16) # low
+ .set macro
+ .set reorder
+
+ lui $a0,%hi(.LC17) # high
+ .set noreorder
+ .set nomacro
+ jal print_uart
+ addiu $a0,$a0,%lo(.LC17) # low
+ .set macro
+ .set reorder
+
+ lui $a0,%hi(.LC18) # high
+ .set noreorder
+ .set nomacro
+ jal print_uart
+ addiu $a0,$a0,%lo(.LC18) # low
+ .set macro
+ .set reorder
+
+.L119:
+ #.set volatile
+ lw $v0,int_flag
+ #.set novolatile
+ beq $v0,$zero,.L119
+ #.set volatile
+ sw $zero,int_flag
+ #.set novolatile
+ .set noreorder
+ .set nomacro
+ jal calculator
+ addu $s0,$s0,1
+ .set macro
+ .set reorder
+
+ sltu $v0,$s0,12
+ bne $v0,$zero,.L119
+ lui $a0,%hi(.LC19) # high
+ .set noreorder
+ .set nomacro
+ jal print
+ addiu $a0,$a0,%lo(.LC19) # low
+ .set macro
+ .set reorder
+
+ b .L119
+ .end main2
+ .size main2,.-main2
+ .align 2
+ .globl set_interrupt_address
+ .ent set_interrupt_address
+set_interrupt_address:
+ .frame $sp,0,$ra # vars= 0, regs= 0/0, args= 0, extra= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ li $v0,16376 # 0x00003ff8
+ lui $v1,%hi(interrupt) # high
+ addiu $v1,$v1,%lo(interrupt) # low
+ #.set volatile
+ sw $v1,0($v0)
+ #.set novolatile
+ lui $v0,%hi(buffer) # high
+ addiu $v0,$v0,%lo(buffer) # low
+ sw $v0,read_ptr
+ j $ra
+ .end set_interrupt_address
+ .size set_interrupt_address,.-set_interrupt_address
+ .align 2
+ .globl init_parser
+ .ent init_parser
+init_parser:
+ .frame $sp,24,$ra # vars= 0, regs= 1/0, args= 16, extra= 0
+ .mask 0x80000000,-8
+ .fmask 0x00000000,0
+ subu $sp,$sp,24
+ sw $ra,16($sp)
+ lui $v0,%hi(buffer) # high
+ addiu $v0,$v0,%lo(buffer) # low
+ sw $v0,char_ptr
+ jal getsym
+ lw $ra,16($sp)
+ .set noreorder
+ .set nomacro
+ j $ra
+ addu $sp,$sp,24
+ .set macro
+ .set reorder
+
+ .end init_parser
+ .size init_parser,.-init_parser
+ .align 2
+ .globl parse_error
+ .ent parse_error
+parse_error:
+ .frame $sp,24,$ra # vars= 0, regs= 1/0, args= 16, extra= 0
+ .mask 0x80000000,-8
+ .fmask 0x00000000,0
+ subu $sp,$sp,24
+ sw $ra,16($sp)
+ lui $a0,%hi(.LC2) # high
+ .set noreorder
+ .set nomacro
+ jal print_uart
+ addiu $a0,$a0,%lo(.LC2) # low
+ .set macro
+ .set reorder
+
+ move $v0,$zero
+ lw $ra,16($sp)
+ .set noreorder
+ .set nomacro
+ j $ra
+ addu $sp,$sp,24
+ .set macro
+ .set reorder
+
+ .end parse_error
+ .size parse_error,.-parse_error
Index: code0.hex
===================================================================
--- code0.hex (nonexistent)
+++ code0.hex (revision 4)
@@ -0,0 +1,50 @@
+:100000003c373c343c343c37ac0014240c000834fe
+:1000100034a33440034003403403a0348010241040
+:10002000a0033490001000248c003014009000a035
+:100030002490001400030030248c00301424a0030a
+:1000400000302403a0248c0330900010002400a072
+:1000500024900014002403a000002403a42403ac73
+:1000600027afaf27afafafafafafafafafafafafb0
+:100070000caf003a2c3a2c0010248f00a03c24af87
+:100080000c240c248f00103c0c24100024af100012
+:10009000163c8f240010000c248f10248f3c240069
+:1000a0001424a0af3c0c2410000c028f00a024af3d
+:1000b0008f8f8f8f8f8f8f8f8f8f8f8f8f278f0344
+:1000c00027008f8f0327240000ac03ac8f00901013
+:1000d000388f0024af9000382c382c0014241000e6
+:1000e0008f0090001400a310008f009000a324af95
+:1000f000030027afaf938f00009010260000009000
+:1001000000002424af009000242c14000c00028f67
+:100110008f032727afafafaf93003a2c3a2c0010d4
+:10012000000c000c00002416000093000030382c56
+:10013000382c0010240c000c001600100202930052
+:1001400030382c382c001400028f8f8f8f03272714
+:10015000afaf0caf1000930c000c000024122a105b
+:1001600024120010002412001000020010001402db
+:100170000024143c16000000100014020024143c5b
+:10018000160000009300382c382c00142410028f25
+:100190008f8f032727afaf9300242c10240c00105f
+:1001a00000930014000c000c00009324103c0c245d
+:1001b0000c001002930010003c0c24008f8f0327ca
+:1001c000009000100024900014242410249090002b
+:1001d000a0a0242400140003002704af24a02400be
+:1001e00010003c350000000000000000000024a0ca
+:1001f0000014241424a024a00c008f00032727af90
+:10020000afaf3c26af0c000c00003c0c240c023cb1
+:100210000c240c023c0c24270c02270c003c0c2460
+:100220008f8f8f032790001000a0249000142403c8
+:10023000a027af003c0c240c008f00032727afaf92
+:1002400000243c24ac3c24af3c0c243c0c243c0c4f
+:10025000243c0c243c0c243c0c243c0c243c0c245e
+:100260003c0c243c0c243c0c243c0c248f0010003f
+:10027000af0c262e14003c0c241000243c24ac3c73
+:1002800024af030027af3c24af0c008f00032727c7
+:10029000af3c0c24008f000327000000000000503a
+:1002a0006f005379656f210a72657263650a3d5b61
+:1002b0005d005b5d3500313328302f312835333216
+:1002c0000a28302834332a33353400313128302d90
+:1002d00029283533283128302f310a332a3324692d
+:1002e000000000000000000000000000000000000e
+:1002f00000000000000000000000000000000000fe
+:1003000000000000000000000000000000000000ed
+:00000001ff
Index: code1.hex
===================================================================
--- code1.hex (nonexistent)
+++ code1.hex (revision 4)
@@ -0,0 +1,50 @@
+:100000001c9c048405a51dbd808560840000001a29
+:100010001b5b1a1b609ae08405e0a40586c084007f
+:10002000a6e00282004000036200424000820062bb
+:100030008482004000e0008403620042400244e009
+:10004000008402e0440242e042820040400560a297
+:10005000848300606002e040040402e04402e04463
+:10006000bdbfb0bda4a2a3a5b0b1b2a7b4b5b6b789
+:1000700000a64003630242626002820040024282a4
+:10008000000400048200400400840000028200009a
+:10009000020283424340000004820042830244641f
+:1000a000408260820400840000000082005042828e
+:1000b000a4a2a3a5b0b1b2a7b4b5b6b7a6bdbf40c0
+:1000c000bd00bfb0e0bd060404c3e0c5820044002b
+:1000d00083830062826400836382426260028200e2
+:1000e0008200420040008000008200430083428280
+:1000f000e000bdbfb090820040420010500260831b
+:10010000004350828240820042424010000000bf03
+:10011000b0e0bdbdbfb2b1b0900003630242626007
+:1001200000000000004002020011820040424363d0
+:10013000424262601200800000120000222284000d
+:10014000824363424262600020bfb2b1b0e0bdbdf5
+:10015000bfb100b000409000000000400202024029
+:1001600002020000000202000000230000006023e1
+:100170000701610121000600000060230701610101
+:10018000210006008400836382426260028220bff5
+:10019000b1b0e0bdbdbfb0820042424002000000ed
+:1001a00000830062000000000040830262040084bb
+:1001b000000000008200400004008400bfb0e0bde9
+:1001c0008082004080a5a20040a5a500a5c2a30092
+:1001d000c3a2c6a5c54000e080bd81bf02a2a504a0
+:1001e00080a008088800090462c006460282c2e2b4
+:1001f0006080e7a702a2a7e000a0bf00e0bdbdbfee
+:10020000b1b0101090000000004004008400000411
+:100210000084002004008485002084000004008401
+:10022000bfb1b0e0bda200404083a5a3006084e060
+:1002300080bdbf800400840000bf00e0bdbdbfb032
+:10024000000302426202428204008404008404002b
+:100250008404008404008404008404008404008472
+:1002600004008404008404008404008482004000ac
+:100270008000100240000400840000020363430277
+:100280004282e000bdbf0242820000bf00e0bdbd6f
+:10029000bf04008400bf00e0bd0000000000004576
+:1002a00072006f2072770a20737220756400004814
+:1002b0002000440a2a0030312d3528292d332933d6
+:1002c0000031332d2933330a33340030342d2932b1
+:1002d0000a2d3333312931332833003333336673f6
+:1002e000000000000000000000000000000000000e
+:1002f00000000000000000000000000000000000fe
+:1003000000000000000000000000000000000000ed
+:00000001ff