URL
https://opencores.org/ocsvn/zipcpu/zipcpu/trunk
Subversion Repositories zipcpu
Compare Revisions
- This comparison shows the changes necessary to convert path
/zipcpu/trunk/bench
- from Rev 27 to Rev 34
- ↔ Reverse comparison
Rev 27 → Rev 34
/cpp/zippy_tb.cpp
59,6 → 59,8
#define CMD_INT (1<<7) |
#define CMD_RESET (1<<6) |
|
#define KEY_ESCAPE 27 |
#define KEY_RETURN 10 |
|
// No particular "parameters" need definition or redefinition here. |
class ZIPPY_TB : public TESTB<Vzipsystem> { |
68,12 → 70,14
// QSPIFLASHSIM m_flash; |
FILE *dbg_fp; |
bool dbg_flag, bomb; |
int m_cursor; |
|
ZIPPY_TB(void) : m_mem_size(1<<20), m_mem(m_mem_size) { |
//dbg_fp = fopen("dbg.txt", "w"); |
// dbg_fp = fopen("dbg.txt", "w"); |
dbg_fp = NULL; |
dbg_flag = false; |
bomb = false; |
m_cursor = 0; |
} |
|
void reset(void) { |
86,29 → 90,38
return true; |
} |
|
void showval(int y, int x, const char *lbl, unsigned int v) { |
mvprintw(y,x, "%s: 0x%08x", lbl, v); |
void showval(int y, int x, const char *lbl, unsigned int v, bool c) { |
if (c) |
mvprintw(y,x, ">%s> 0x%08x<", lbl, v); |
else |
mvprintw(y,x, " %s: 0x%08x ", lbl, v); |
} |
|
void dispreg(int y, int x, const char *n, unsigned int v) { |
void dispreg(int y, int x, const char *n, unsigned int v, bool c) { |
// 4,4,8,1 = 17 of 20, +3 = 19 |
mvprintw(y, x, "%s: 0x%08x", n, v); |
if (c) |
mvprintw(y, x, ">%s> 0x%08x<", n, v); |
else |
mvprintw(y, x, " %s: 0x%08x ", n, v); |
} |
|
void showreg(int y, int x, const char *n, int r) { |
void showreg(int y, int x, const char *n, int r, bool c) { |
// 4,4,8,1 = 17 of 20, +3 = 19 |
mvprintw(y, x, "%s: 0x%08x", n, m_core->v__DOT__thecpu__DOT__regset[r]); |
if (c) |
mvprintw(y, x, ">%s> 0x%08x", n, m_core->v__DOT__thecpu__DOT__regset[r]); |
else |
mvprintw(y, x, " %s: 0x%08x", n, m_core->v__DOT__thecpu__DOT__regset[r]); |
addch( ((r == m_core->v__DOT__thecpu__DOT__dcdA) |
&&(m_core->v__DOT__thecpu__DOT__dcdvalid) |
&&(m_core->v__DOT__thecpu__DOT__dcdA_rd)) |
?'a':' '); |
?'a':((c)?'<':' ')); |
addch( ((r == m_core->v__DOT__thecpu__DOT__dcdB) |
&&(m_core->v__DOT__thecpu__DOT__dcdvalid) |
&&(m_core->v__DOT__thecpu__DOT__dcdB_rd)) |
?'b':' '); |
?'b':((c)?'<':' ')); |
addch( ((r == m_core->v__DOT__thecpu__DOT__wr_reg_id) |
&&(m_core->v__DOT__thecpu__DOT__wr_reg_ce)) |
?'W':' '); |
?'W':((c)?'<':' ')); |
} |
|
void showins(int y, const char *lbl, const int ce, const int valid, |
174,22 → 187,22
&&(m_core->v__DOT__sys_addr == 0))?"W":" ", |
(m_core->v__DOT__trap_int)?"I":" "); |
*/ |
showval(ln, 1, "PIC ", m_core->v__DOT__pic_data); |
showval(ln,21, "WDT ", m_core->v__DOT__watchdog__DOT__r_value); |
showval(ln,41, "CACH", m_core->v__DOT__manualcache__DOT__cache_base); |
showval(ln,61, "PIC2", m_core->v__DOT__ctri__DOT__r_int_state); |
showval(ln, 0, "PIC ", m_core->v__DOT__pic_data, (m_cursor==0)); |
showval(ln,20, "WDT ", m_core->v__DOT__watchdog__DOT__r_value, (m_cursor==1)); |
showval(ln,40, "CACH", m_core->v__DOT__manualcache__DOT__cache_base, (m_cursor==2)); |
showval(ln,60, "PIC2", m_core->v__DOT__ctri__DOT__r_int_state, (m_cursor==3)); |
|
ln++; |
showval(ln, 1, "TMRA", m_core->v__DOT__timer_a__DOT__r_value); |
showval(ln,21, "TMRB", m_core->v__DOT__timer_b__DOT__r_value); |
showval(ln,41, "TMRB", m_core->v__DOT__timer_c__DOT__r_value); |
showval(ln,61, "JIF ", m_core->v__DOT__jiffies__DOT__r_counter); |
showval(ln, 0, "TMRA", m_core->v__DOT__timer_a__DOT__r_value, (m_cursor==4)); |
showval(ln,20, "TMRB", m_core->v__DOT__timer_b__DOT__r_value, (m_cursor==5)); |
showval(ln,40, "TMRB", m_core->v__DOT__timer_c__DOT__r_value, (m_cursor==6)); |
showval(ln,60, "JIF ", m_core->v__DOT__jiffies__DOT__r_counter, (m_cursor==7)); |
|
ln++; |
showval(ln, 1, "UTSK", m_core->v__DOT__utc_data); |
showval(ln,21, "UOST", m_core->v__DOT__uoc_data); |
showval(ln,41, "UPST", m_core->v__DOT__upc_data); |
showval(ln,61, "UICT", m_core->v__DOT__uic_data); |
showval(ln, 0, "UTSK", m_core->v__DOT__utc_data, (m_cursor==8)); |
showval(ln,20, "UOST", m_core->v__DOT__uoc_data, (m_cursor==9)); |
showval(ln,40, "UPST", m_core->v__DOT__upc_data, (m_cursor==10)); |
showval(ln,60, "UICT", m_core->v__DOT__uic_data, (m_cursor==11)); |
|
ln++; |
mvprintw(ln, 40, "%s %s", |
207,24 → 220,24
mvprintw(ln, 0, "Supervisor Registers"); |
ln++; |
|
showreg(ln, 1, "sR0 ", 0); |
showreg(ln,21, "sR1 ", 1); |
showreg(ln,41, "sR2 ", 2); |
showreg(ln,61, "sR3 ", 3); ln++; |
showreg(ln, 0, "sR0 ", 0, (m_cursor==12)); |
showreg(ln,20, "sR1 ", 1, (m_cursor==13)); |
showreg(ln,40, "sR2 ", 2, (m_cursor==14)); |
showreg(ln,60, "sR3 ", 3, (m_cursor==15)); ln++; |
|
showreg(ln, 1, "sR4 ", 4); |
showreg(ln,21, "sR5 ", 5); |
showreg(ln,41, "sR6 ", 6); |
showreg(ln,61, "sR7 ", 7); ln++; |
showreg(ln, 0, "sR4 ", 4, (m_cursor==16)); |
showreg(ln,20, "sR5 ", 5, (m_cursor==17)); |
showreg(ln,40, "sR6 ", 6, (m_cursor==18)); |
showreg(ln,60, "sR7 ", 7, (m_cursor==19)); ln++; |
|
showreg(ln, 1, "sR8 ", 8); |
showreg(ln,21, "sR9 ", 9); |
showreg(ln,41, "sR10", 10); |
showreg(ln,61, "sR11", 11); ln++; |
showreg(ln, 0, "sR8 ", 8, (m_cursor==20)); |
showreg(ln,20, "sR9 ", 9, (m_cursor==21)); |
showreg(ln,40, "sR10", 10, (m_cursor==22)); |
showreg(ln,60, "sR11", 11, (m_cursor==23)); ln++; |
|
showreg(ln, 1, "sR12", 12); |
showreg(ln,21, "sSP ", 13); |
mvprintw(ln,41, "sCC :%s%s%s%s%s%s%s%s", |
showreg(ln, 0, "sR12", 12, (m_cursor==24)); |
showreg(ln,20, "sSP ", 13, (m_cursor==25)); |
mvprintw(ln,40, "sCC :%s%s%s%s%s%s%s%s", |
(m_core->v__DOT__thecpu__DOT__trap)?"TRP":" ", |
(m_core->v__DOT__thecpu__DOT__step)?"STP":" ", |
(m_core->v__DOT__thecpu__DOT__sleep)?"SLP":" ", |
233,7 → 246,7
(m_core->v__DOT__thecpu__DOT__iflags&4)?"N":" ", |
(m_core->v__DOT__thecpu__DOT__iflags&2)?"C":" ", |
(m_core->v__DOT__thecpu__DOT__iflags&1)?"Z":" "); |
mvprintw(ln,61, "sPC : 0x%08x", m_core->v__DOT__thecpu__DOT__ipc); |
showval(ln,60, "sPC ", m_core->v__DOT__thecpu__DOT__ipc, (m_cursor==27)); |
ln++; |
|
if (m_core->v__DOT__thecpu__DOT__gie) |
241,24 → 254,24
else |
attroff(A_BOLD); |
mvprintw(ln, 0, "User Registers"); ln++; |
showreg(ln, 1, "uR0 ", 16); |
showreg(ln,21, "uR1 ", 17); |
showreg(ln,41, "uR2 ", 18); |
showreg(ln,61, "uR3 ", 19); ln++; |
showreg(ln, 0, "uR0 ", 16, (m_cursor==28)); |
showreg(ln,20, "uR1 ", 17, (m_cursor==29)); |
showreg(ln,40, "uR2 ", 18, (m_cursor==30)); |
showreg(ln,60, "uR3 ", 19, (m_cursor==31)); ln++; |
|
showreg(ln, 1, "uR4 ", 20); |
showreg(ln,21, "uR5 ", 21); |
showreg(ln,41, "uR6 ", 22); |
showreg(ln,61, "uR7 ", 23); ln++; |
showreg(ln, 0, "uR4 ", 20, (m_cursor==32)); |
showreg(ln,20, "uR5 ", 21, (m_cursor==33)); |
showreg(ln,40, "uR6 ", 22, (m_cursor==34)); |
showreg(ln,60, "uR7 ", 23, (m_cursor==35)); ln++; |
|
showreg(ln, 1, "uR8 ", 24); |
showreg(ln,21, "uR9 ", 25); |
showreg(ln,41, "uR10", 26); |
showreg(ln,61, "uR11", 27); ln++; |
showreg(ln, 0, "uR8 ", 24, (m_cursor==36)); |
showreg(ln,20, "uR9 ", 25, (m_cursor==37)); |
showreg(ln,40, "uR10", 26, (m_cursor==38)); |
showreg(ln,60, "uR11", 27, (m_cursor==39)); ln++; |
|
showreg(ln, 1, "uR12", 28); |
showreg(ln,21, "uSP ", 29); |
mvprintw(ln,41, "uCC :%s%s%s%s%s%s%s%s", |
showreg(ln, 0, "uR12", 28, (m_cursor==40)); |
showreg(ln,20, "uSP ", 29, (m_cursor==41)); |
mvprintw(ln,40, "uCC :%s%s%s%s%s%s%s%s", |
(m_core->v__DOT__thecpu__DOT__trap)?"TRP":" ", |
(m_core->v__DOT__thecpu__DOT__step)?"STP":" ", |
(m_core->v__DOT__thecpu__DOT__sleep)?"SLP":" ", |
267,7 → 280,7
(m_core->v__DOT__thecpu__DOT__flags&4)?"N":" ", |
(m_core->v__DOT__thecpu__DOT__flags&2)?"C":" ", |
(m_core->v__DOT__thecpu__DOT__flags&1)?"Z":" "); |
mvprintw(ln,61, "uPC : 0x%08x", m_core->v__DOT__thecpu__DOT__upc); |
showval(ln,60, "uPC ", m_core->v__DOT__thecpu__DOT__upc, (m_cursor==43)); |
|
attroff(A_BOLD); |
ln+=1; |
397,6 → 410,17
return v; |
} |
|
void cmd_write(unsigned int a, int v) { |
if ((a&0x0f)==0x0f) |
dbg_flag = true; |
wb_write(CMD_REG, CMD_HALT|(a&0x3f)); |
while((wb_read(CMD_REG) & CMD_STALL) == 0) |
; |
if (dbg_flag) |
fprintf(dbg_fp, "CMD-WRITE(%d) <= 0x%08x\n", a, v); |
wb_write(CMD_DATA, v); |
} |
|
bool halted(void) { |
return (m_core->v__DOT__cmd_halt != 0); |
} |
403,23 → 427,46
|
void read_state(void) { |
int ln= 0; |
bool gie; |
|
mvprintw(ln,0, "Peripherals-RS"); ln++; |
showval(ln, 1, "PIC ", cmd_read(32+ 0)); |
showval(ln,21, "WDT ", cmd_read(32+ 1)); |
showval(ln,41, "CACH", cmd_read(32+ 2)); |
showval(ln,61, "PIC2", cmd_read(32+ 3)); |
if (m_cursor < 0) |
m_cursor = 0; |
else if (m_cursor >= 44) |
m_cursor = 43; |
|
mvprintw(ln,0, "Peripherals-RS"); |
mvprintw(ln,40,"%-40s", "CPU State: "); |
{ |
unsigned int v = wb_read(CMD_REG); |
mvprintw(ln,51, ""); |
if (v & 0x010000) |
printw("EXT-INT "); |
if ((v & 0x003000) == 0x03000) |
printw("Halted "); |
else if (v & 0x001000) |
printw("Sleeping "); |
else if (v & 0x002000) |
printw("Supervisor Mod "); |
if (v & 0x008000) |
printw("Break-Enabled "); |
if (v & 0x000080) |
printw("PIC Enabled "); |
} ln++; |
showval(ln, 0, "PIC ", cmd_read(32+ 0), (m_cursor==0)); |
showval(ln,20, "WDT ", cmd_read(32+ 1), (m_cursor==1)); |
showval(ln,40, "CACH", cmd_read(32+ 2), (m_cursor==2)); |
showval(ln,60, "PIC2", cmd_read(32+ 3), (m_cursor==3)); |
ln++; |
showval(ln, 1, "TMRA", cmd_read(32+ 4)); |
showval(ln,21, "TMRB", cmd_read(32+ 5)); |
showval(ln,41, "TMRC", cmd_read(32+ 6)); |
showval(ln,61, "JIF ", cmd_read(32+ 7)); |
showval(ln, 0, "TMRA", cmd_read(32+ 4), (m_cursor==4)); |
showval(ln,20, "TMRB", cmd_read(32+ 5), (m_cursor==5)); |
showval(ln,40, "TMRC", cmd_read(32+ 6), (m_cursor==6)); |
showval(ln,60, "JIF ", cmd_read(32+ 7), (m_cursor==7)); |
|
ln++; |
showval(ln, 1, "UTSK", cmd_read(32+12)); |
showval(ln,21, "UMST", cmd_read(32+13)); |
showval(ln,41, "UPST", cmd_read(32+14)); |
showval(ln,61, "UAST", cmd_read(32+15)); |
showval(ln, 0, "UTSK", cmd_read(32+12), (m_cursor==8)); |
showval(ln,20, "UMST", cmd_read(32+13), (m_cursor==9)); |
showval(ln,40, "UPST", cmd_read(32+14), (m_cursor==10)); |
showval(ln,60, "UICT", cmd_read(32+15), (m_cursor==11)); |
|
ln++; |
ln++; |
426,7 → 473,8
unsigned int cc = cmd_read(14); |
if (dbg_fp) fprintf(dbg_fp, "CC = %08x, gie = %d\n", cc, |
m_core->v__DOT__thecpu__DOT__gie); |
if (cc & 0x020) |
gie = (cc & 0x020); |
if (gie) |
attroff(A_BOLD); |
else |
attron(A_BOLD); |
433,67 → 481,71
mvprintw(ln, 0, "Supervisor Registers"); |
ln++; |
|
dispreg(ln, 1, "sR0 ", cmd_read(0)); |
dispreg(ln,21, "sR1 ", cmd_read(1)); |
dispreg(ln,41, "sR2 ", cmd_read(2)); |
dispreg(ln,61, "sR3 ", cmd_read(3)); ln++; |
dispreg(ln, 0, "sR0 ", cmd_read(0), (m_cursor==12)); |
dispreg(ln,20, "sR1 ", cmd_read(1), (m_cursor==13)); |
dispreg(ln,40, "sR2 ", cmd_read(2), (m_cursor==14)); |
dispreg(ln,60, "sR3 ", cmd_read(3), (m_cursor==15)); ln++; |
|
dispreg(ln, 1, "sR4 ", cmd_read(4)); |
dispreg(ln,21, "sR5 ", cmd_read(5)); |
dispreg(ln,41, "sR6 ", cmd_read(6)); |
dispreg(ln,61, "sR7 ", cmd_read(7)); ln++; |
dispreg(ln, 0, "sR4 ", cmd_read(4), (m_cursor==16)); |
dispreg(ln,20, "sR5 ", cmd_read(5), (m_cursor==17)); |
dispreg(ln,40, "sR6 ", cmd_read(6), (m_cursor==18)); |
dispreg(ln,60, "sR7 ", cmd_read(7), (m_cursor==19)); ln++; |
|
dispreg(ln, 1, "sR8 ", cmd_read( 8)); |
dispreg(ln,21, "sR9 ", cmd_read( 9)); |
dispreg(ln,41, "sR10", cmd_read(10)); |
dispreg(ln,61, "sR11", cmd_read(11)); ln++; |
dispreg(ln, 0, "sR8 ", cmd_read( 8), (m_cursor==20)); |
dispreg(ln,20, "sR9 ", cmd_read( 9), (m_cursor==21)); |
dispreg(ln,40, "sR10", cmd_read(10), (m_cursor==22)); |
dispreg(ln,60, "sR11", cmd_read(11), (m_cursor==23)); ln++; |
|
dispreg(ln, 1, "sR12", cmd_read(12)); |
dispreg(ln,21, "sSP ", cmd_read(13)); |
dispreg(ln, 0, "sR12", cmd_read(12), (m_cursor==24)); |
dispreg(ln,20, "sSP ", cmd_read(13), (m_cursor==25)); |
|
mvprintw(ln,41, "sCC :%s%s%s%s%s%s%s", |
(cc & 0x040)?"STP":" ", |
(cc & 0x020)?"GIE":" ", |
(cc & 0x010)?"SLP":" ", |
mvprintw(ln,40, "%ssCC :%s%s%s%s%s%s%s%s", |
(m_cursor==26)?">":" ", |
(cc & 0x100)?"TP":" ", |
(cc & 0x040)?"ST":" ", |
(cc & 0x020)?"IE":" ", |
(cc & 0x010)?"SL":" ", |
(cc&8)?"V":" ", |
(cc&4)?"N":" ", |
(cc&2)?"C":" ", |
(cc&1)?"Z":" "); |
mvprintw(ln,61, "sPC : 0x%08x", cmd_read(15)); |
dispreg(ln,60, "sPC ", cmd_read(15), (m_cursor==27)); |
ln++; |
|
if (cc & 0x020) |
if (gie) |
attron(A_BOLD); |
else |
attroff(A_BOLD); |
mvprintw(ln, 0, "User Registers"); ln++; |
dispreg(ln, 1, "uR0 ", cmd_read(16)); |
dispreg(ln,21, "uR1 ", cmd_read(17)); |
dispreg(ln,41, "uR2 ", cmd_read(18)); |
dispreg(ln,61, "uR3 ", cmd_read(19)); ln++; |
dispreg(ln, 0, "uR0 ", cmd_read(16), (m_cursor==28)); |
dispreg(ln,20, "uR1 ", cmd_read(17), (m_cursor==29)); |
dispreg(ln,40, "uR2 ", cmd_read(18), (m_cursor==30)); |
dispreg(ln,60, "uR3 ", cmd_read(19), (m_cursor==31)); ln++; |
|
dispreg(ln, 1, "uR4 ", cmd_read(20)); |
dispreg(ln,21, "uR5 ", cmd_read(21)); |
dispreg(ln,41, "uR6 ", cmd_read(22)); |
dispreg(ln,61, "uR7 ", cmd_read(23)); ln++; |
dispreg(ln, 0, "uR4 ", cmd_read(20), (m_cursor==32)); |
dispreg(ln,20, "uR5 ", cmd_read(21), (m_cursor==33)); |
dispreg(ln,40, "uR6 ", cmd_read(22), (m_cursor==34)); |
dispreg(ln,60, "uR7 ", cmd_read(23), (m_cursor==35)); ln++; |
|
dispreg(ln, 1, "uR8 ", cmd_read(24)); |
dispreg(ln,21, "uR9 ", cmd_read(25)); |
dispreg(ln,41, "uR10", cmd_read(26)); |
dispreg(ln,61, "uR11", cmd_read(27)); ln++; |
dispreg(ln, 0, "uR8 ", cmd_read(24), (m_cursor==36)); |
dispreg(ln,20, "uR9 ", cmd_read(25), (m_cursor==37)); |
dispreg(ln,40, "uR10", cmd_read(26), (m_cursor==38)); |
dispreg(ln,60, "uR11", cmd_read(27), (m_cursor==39)); ln++; |
|
dispreg(ln, 1, "uR12", cmd_read(28)); |
dispreg(ln,21, "uSP ", cmd_read(29)); |
dispreg(ln, 0, "uR12", cmd_read(28), (m_cursor==40)); |
dispreg(ln,20, "uSP ", cmd_read(29), (m_cursor==41)); |
cc = cmd_read(30); |
mvprintw(ln,41, "uCC :%s%s%s%s%s%s%s", |
(cc&0x040)?"STP":" ", |
(cc&0x020)?"GIE":" ", |
(cc&0x010)?"SLP":" ", |
mvprintw(ln,40, "%cuCC :%s%s%s%s%s%s%s%s", |
(m_cursor == 42)?">":" ", |
(cc&0x100)?"TP":" ", |
(cc&0x040)?"ST":" ", |
(cc&0x020)?"IE":" ", |
(cc&0x010)?"SL":" ", |
(cc&8)?"V":" ", |
(cc&4)?"N":" ", |
(cc&2)?"C":" ", |
(cc&1)?"Z":" "); |
mvprintw(ln,61, "uPC : 0x%08x", cmd_read(31)); |
dispreg(ln,60, "uPC ", cmd_read(31), (m_cursor==43)); |
|
attroff(A_BOLD); |
ln+=2; |
625,6 → 677,13
m_core->v__DOT__thecpu__DOT__op_break); |
} |
|
if (dbg_fp) { |
if(m_core->v__DOT__thecpu__DOT__clear_pipeline) |
fprintf(dbg_fp, "\tClear Pipeline\n"); |
if(m_core->v__DOT__thecpu__DOT__new_pc) |
fprintf(dbg_fp, "\tNew PC\n"); |
} |
|
TESTB<Vzipsystem>::tick(); |
if ((dbg_fp)&&(gie != m_core->v__DOT__thecpu__DOT__gie)) { |
fprintf(dbg_fp, "SWITCH FROM %s to %s: sPC = 0x%08x uPC = 0x%08x pf_pc = 0x%08x\n", |
714,8 → 773,141
return v; |
} |
|
void cursor_up(void) { |
if (m_cursor > 3) |
m_cursor -= 4; |
} void cursor_down(void) { |
if (m_cursor < 40) |
m_cursor += 4; |
} void cursor_left(void) { |
if (m_cursor > 0) |
m_cursor--; |
else m_cursor = 43; |
} void cursor_right(void) { |
if (m_cursor < 43) |
m_cursor++; |
else m_cursor = 0; |
} |
|
int cursor(void) { return m_cursor; } |
}; |
|
void get_value(ZIPPY_TB *tb) { |
int wy, wx, ra; |
int c = tb->cursor(); |
|
wx = (c & 0x03) * 20 + 9; |
wy = (c>>2); |
if (wy >= 3+4) |
wy++; |
if (wy > 3) |
wy += 2; |
wy++; |
|
if (c >= 12) |
ra = c - 12; |
else |
ra = c + 32; |
|
bool done = false; |
char str[16]; |
int pos = 0; str[pos] = '\0'; |
while(!done) { |
int chv = getch(); |
switch(chv) { |
case KEY_ESCAPE: |
pos = 0; str[pos] = '\0'; done = true; |
break; |
case KEY_RETURN: case KEY_ENTER: case KEY_UP: case KEY_DOWN: |
done = true; |
break; |
case KEY_LEFT: case KEY_BACKSPACE: |
if (pos > 0) pos--; |
break; |
case KEY_CLEAR: |
pos = 0; |
break; |
case '0': case ' ': str[pos++] = '0'; break; |
case '1': str[pos++] = '1'; break; |
case '2': str[pos++] = '2'; break; |
case '3': str[pos++] = '3'; break; |
case '4': str[pos++] = '4'; break; |
case '5': str[pos++] = '5'; break; |
case '6': str[pos++] = '6'; break; |
case '7': str[pos++] = '7'; break; |
case '8': str[pos++] = '8'; break; |
case '9': str[pos++] = '9'; break; |
case 'A': case 'a': str[pos++] = 'A'; break; |
case 'B': case 'b': str[pos++] = 'B'; break; |
case 'C': case 'c': str[pos++] = 'C'; break; |
case 'D': case 'd': str[pos++] = 'D'; break; |
case 'E': case 'e': str[pos++] = 'E'; break; |
case 'F': case 'f': str[pos++] = 'F'; break; |
} |
|
if (pos > 8) |
pos = 8; |
str[pos] = '\0'; |
|
attron(A_NORMAL | A_UNDERLINE); |
mvprintw(wy, wx, "%-8s", str); |
if (pos > 0) { |
attron(A_NORMAL | A_UNDERLINE | A_BLINK); |
mvprintw(wy, wx+pos-1, "%c", str[pos-1]); |
} |
attrset(A_NORMAL); |
} |
|
if (pos > 0) { |
int v; |
v = strtoul(str, NULL, 16); |
if (!tb->halted()) { |
switch(ra) { |
case 15: |
tb->m_core->v__DOT__thecpu__DOT__ipc = v; |
if (!tb->m_core->v__DOT__thecpu__DOT__gie) { |
tb->m_core->v__DOT__thecpu__DOT__pf_pc = v; |
tb->m_core->v__DOT__thecpu__DOT__new_pc = 1; |
tb->m_core->v__DOT__thecpu__DOT__clear_pipeline = 1; |
tb->m_core->v__DOT__thecpu__DOT__alu_pc_valid = 0; |
tb->m_core->v__DOT__thecpu__DOT__dcd_ce = 0; |
tb->m_core->v__DOT__thecpu__DOT__dcdvalid = 0; |
tb->m_core->v__DOT__thecpu__DOT__opvalid = 0; |
} |
break; |
case 31: |
tb->m_core->v__DOT__thecpu__DOT__upc = v; |
if (tb->m_core->v__DOT__thecpu__DOT__gie) { |
tb->m_core->v__DOT__thecpu__DOT__pf_pc = v; |
tb->m_core->v__DOT__thecpu__DOT__new_pc = 1; |
tb->m_core->v__DOT__thecpu__DOT__clear_pipeline = 1; |
tb->m_core->v__DOT__thecpu__DOT__alu_pc_valid = 0; |
tb->m_core->v__DOT__thecpu__DOT__dcd_ce = 0; |
tb->m_core->v__DOT__thecpu__DOT__dcdvalid = 0; |
tb->m_core->v__DOT__thecpu__DOT__opvalid = 0; |
} |
break; |
case 32: tb->m_core->v__DOT__pic_data = v; break; |
case 33: tb->m_core->v__DOT__watchdog__DOT__r_value = v; break; |
case 34: tb->m_core->v__DOT__manualcache__DOT__cache_base = v; break; |
case 35: tb->m_core->v__DOT__ctri__DOT__r_int_state = v; break; |
case 36: tb->m_core->v__DOT__timer_a__DOT__r_value = v; break; |
case 37: tb->m_core->v__DOT__timer_b__DOT__r_value = v; break; |
case 38: tb->m_core->v__DOT__timer_c__DOT__r_value = v; break; |
case 39: tb->m_core->v__DOT__jiffies__DOT__r_counter = v; break; |
case 44: tb->m_core->v__DOT__utc_data = v; break; |
case 45: tb->m_core->v__DOT__uoc_data = v; break; |
case 46: tb->m_core->v__DOT__upc_data = v; break; |
case 47: tb->m_core->v__DOT__uic_data = v; break; |
default: |
tb->m_core->v__DOT__thecpu__DOT__regset[ra] = v; |
break; |
} |
} else |
tb->cmd_write(ra, v); |
} |
} |
|
void usage(void) { |
printf("USAGE: zippy_tb [-a] <testfile.out>\n"); |
printf("\n"); |
793,10 → 985,12
// tb->m_core->v__DOT__cmd_halt = 0; |
// tb->m_core->v__DOT__cmd_step = 0; |
|
/* |
printf("PC = %08x:%08x (%08x)\n", |
tb->m_core->v__DOT__thecpu__DOT__ipc, |
tb->m_core->v__DOT__thecpu__DOT__upc, |
tb->m_core->v__DOT__thecpu__DOT__alu_pc); |
*/ |
|
done = (tb->test_success())||(tb->test_failure()); |
} |
845,21 → 1039,30
erase(); |
break; |
case 's': case 'S': |
if (manual) |
if (!halted) |
erase(); |
tb->wb_write(CMD_REG, CMD_STEP); |
manual = false; |
halted = true; |
break; |
case 't': case 'T': |
if (!manual) |
if ((!manual)||(halted)) |
erase(); |
manual = true; |
halted = false; |
// tb->m_core->v__DOT__thecpu__DOT__step = 0; |
// tb->m_core->v__DOT__cmd_halt = 0; |
// tb->m_core->v__DOT__cmd_step = 0; |
tb->tick(); |
break; |
case ERR: |
case KEY_IC: case KEY_ENTER: case KEY_RETURN: |
get_value(tb); |
break; |
case KEY_UP: tb->cursor_up(); break; |
case KEY_DOWN: tb->cursor_down(); break; |
case KEY_LEFT: tb->cursor_left(); break; |
case KEY_RIGHT: tb->cursor_right(); break; |
case ERR: case KEY_CLEAR: |
default: |
if (!manual) |
tb->tick(); |