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https://opencores.org/ocsvn/zipcpu/zipcpu/trunk
Subversion Repositories zipcpu
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/zipcpu/trunk/doc
- from Rev 78 to Rev 79
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Rev 78 → Rev 79
/iset.html
412,7 → 412,7
<TR><TD>5'h1f</TD></TR> |
</TABLE> |
This leaves three instructions left: NOOP, BREAK, and LOCK. These have opcodes |
of <TT>5'h19</TT>, <TT>5'h1a</TT>, and <TT>5'h1c</TT> respectively. They |
of <TT>5'h18</TT>, <TT>5'h19</TT>, and <TT>5'h1a</TT> respectively. They |
are carved out of the floating point units opcodes, and differentiated by the |
fact that their resulting register is either the CC or PC register. (It never |
made sense to do a floating point instruction into the CC or PC register |