OpenCores
URL https://opencores.org/ocsvn/a-z80/a-z80/trunk

Subversion Repositories a-z80

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /a-z80/trunk
    from Rev 17 to Rev 18
    ↔ Reverse comparison
  •

Rev 17 → Rev 18

/cpu/control/memory_ifc.bdf
370,7 → 370,7
(pt 48 16)
(output)
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 46 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(line (pt 39 16)(pt 48 16))
)
(drawing
402,7 → 402,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 52 24)(pt 64 24))
)
(drawing
428,7 → 428,7
(pt 16 48)
(output)
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 13 32 25 46)(font "Courier New" (bold))(vertical)(invisible))
(text "OUT" (rect 13 32 25 49)(font "Courier New" (bold))(vertical)(invisible))
(line (pt 16 39)(pt 16 48))
)
(drawing
454,7 → 454,7
(pt 48 16)
(output)
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 46 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(line (pt 39 16)(pt 48 16))
)
(drawing
486,7 → 486,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 52 24)(pt 64 24))
)
(drawing
519,7 → 519,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 56 24)(pt 64 24))
)
(drawing
562,7 → 562,7
(pt 64 24)
(output)
(text "OUT" (rect 47 15 64 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 47 15 61 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 47 15 64 27)(font "Courier New" (bold))(invisible))
(line (pt 49 24)(pt 64 24))
)
(drawing
595,7 → 595,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 54 24)(pt 64 24))
)
(drawing
629,7 → 629,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 54 24)(pt 64 24))
)
(drawing
670,7 → 670,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 54 24)(pt 64 24))
)
(drawing
711,7 → 711,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 54 24)(pt 64 24))
)
(drawing
745,7 → 745,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 48 24)(pt 64 24))
)
(drawing
778,7 → 778,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 54 24)(pt 64 24))
)
(drawing
812,7 → 812,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 48 24)(pt 64 24))
)
(drawing
845,7 → 845,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 54 24)(pt 64 24))
)
(drawing
879,7 → 879,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 42 24)(pt 64 24))
)
(drawing
911,7 → 911,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 42 24)(pt 64 24))
)
(drawing
964,7 → 964,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
1021,7 → 1021,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
1078,7 → 1078,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
1135,7 → 1135,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
1192,7 → 1192,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
1249,7 → 1249,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
1306,7 → 1306,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
1363,7 → 1363,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
1420,7 → 1420,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
1477,7 → 1477,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
1534,7 → 1534,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
1591,7 → 1591,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
1648,7 → 1648,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
1705,7 → 1705,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
1762,7 → 1762,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
1819,7 → 1819,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
1876,7 → 1876,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
1933,7 → 1933,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
1990,7 → 1990,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
2026,7 → 2026,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 48 24)(pt 64 24))
)
(drawing
2073,7 → 2073,7
(pt 64 40)
(output)
(text "OUT" (rect 48 31 65 43)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 31 62 43)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 31 65 43)(font "Courier New" (bold))(invisible))
(line (pt 48 40)(pt 64 40))
)
(drawing
2129,7 → 2129,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
2165,7 → 2165,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 48 24)(pt 64 24))
)
(drawing
2191,7 → 2191,7
(pt 48 16)
(output)
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 46 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(line (pt 39 16)(pt 48 16))
)
(drawing
2201,6 → 2201,39
(circle (rect 31 12 39 20))
)
)
(symbol
(rect 688 1344 752 1392)
(text "OR2" (rect 1 0 19 10)(font "Arial" (font_size 6)))
(text "inst4" (rect 3 37 26 49)(font "Arial" ))
(port
(pt 0 32)
(input)
(text "IN2" (rect 2 23 19 35)(font "Courier New" (bold))(invisible))
(text "IN2" (rect 2 23 19 35)(font "Courier New" (bold))(invisible))
(line (pt 0 32)(pt 15 32))
)
(port
(pt 0 16)
(input)
(text "IN1" (rect 2 7 19 19)(font "Courier New" (bold))(invisible))
(text "IN1" (rect 2 7 19 19)(font "Courier New" (bold))(invisible))
(line (pt 0 16)(pt 15 16))
)
(port
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 48 24)(pt 64 24))
)
(drawing
(line (pt 14 36)(pt 25 36))
(line (pt 14 13)(pt 25 13))
(arc (pt 7 29)(pt 7 19)(rect -14 8 19 41))
(arc (pt 49 24)(pt 25 13)(rect -6 13 57 76))
(arc (pt 25 35)(pt 49 24)(rect -6 -27 57 36))
)
)
(connector
(pt 704 112)
(pt 720 112)
2412,10 → 2445,6
(pt 512 1056)
)
(connector
(pt 624 1072)
(pt 736 1072)
)
(connector
(pt 624 1112)
(pt 624 1072)
)
2653,15 → 2682,6
(pt 408 1416)
)
(connector
(pt 384 1376)
(pt 488 1376)
)
(connector
(text "wait_iorq" (rect 635 1360 677 1372)(font "Arial" ))
(pt 488 1376)
(pt 672 1376)
)
(connector
(text "iorq" (rect 408 1296 425 1308)(font "Arial" ))
(pt 400 1312)
(pt 480 1312)
3173,6 → 3193,70
(color 250 0 0)
)
(connector
(pt 752 1832)
(pt 768 1832)
)
(connector
(text "wait_mwr" (rect 532 1808 576 1820)(font "Arial" ))
(pt 528 1824)
(pt 688 1824)
)
(connector
(text "wait_mrd" (rect 612 1792 655 1804)(font "Arial" ))
(pt 608 1808)
(pt 688 1808)
)
(connector
(pt 784 192)
(pt 800 192)
)
(connector
(pt 720 184)
(pt 704 184)
)
(connector
(pt 704 88)
(pt 704 112)
)
(connector
(pt 704 112)
(pt 704 184)
)
(connector
(pt 592 200)
(pt 640 200)
)
(connector
(pt 592 184)
(pt 592 200)
)
(connector
(pt 592 200)
(pt 592 232)
)
(connector
(pt 688 200)
(pt 720 200)
)
(connector
(pt 512 480)
(pt 624 480)
)
(connector
(text "wait_m1" (rect 752 464 792 476)(font "Arial" ))
(pt 624 480)
(pt 800 480)
)
(connector
(text "wait_m1" (rect 377 1840 417 1852)(font "Arial" ))
(pt 376 1856)
(pt 688 1856)
)
(connector
(pt 208 1504)
(pt 392 1504)
)
(connector
(pt 560 160)
(pt 544 160)
(color 76 152 0)
3473,74 → 3557,48
(color 76 152 0)
)
(connector
(pt 752 1832)
(pt 768 1832)
(pt 224 1216)
(pt 224 1448)
(color 76 152 0)
)
(connector
(text "wait_iorq" (rect 455 1824 497 1836)(font "Arial" ))
(pt 448 1840)
(pt 688 1840)
(pt 224 1448)
(pt 296 1448)
(color 76 152 0)
)
(connector
(text "wait_mwr" (rect 532 1808 576 1820)(font "Arial" ))
(pt 528 1824)
(pt 688 1824)
(pt 624 1072)
(pt 736 1072)
)
(connector
(text "wait_mrd" (rect 612 1792 655 1804)(font "Arial" ))
(pt 608 1808)
(pt 688 1808)
(text "wait_iorq" (rect 865 1056 907 1068)(font "Arial" ))
(pt 736 1072)
(pt 904 1072)
)
(connector
(pt 784 192)
(pt 800 192)
(text "wait_io" (rect 447 1824 480 1836)(font "Arial" ))
(pt 448 1840)
(pt 688 1840)
)
(connector
(pt 720 184)
(pt 704 184)
(pt 384 1376)
(pt 488 1376)
)
(connector
(pt 704 88)
(pt 704 112)
(text "wait_iorqinta" (rect 619 1360 679 1372)(font "Arial" ))
(pt 488 1376)
(pt 688 1376)
)
(connector
(pt 704 112)
(pt 704 184)
(text "wait_io" (rect 793 1352 826 1364)(font "Arial" ))
(pt 752 1368)
(pt 824 1368)
)
(connector
(pt 592 200)
(pt 640 200)
(text "wait_iorq" (rect 619 1344 661 1356)(font "Arial" ))
(pt 616 1360)
(pt 688 1360)
)
(connector
(pt 592 184)
(pt 592 200)
)
(connector
(pt 592 200)
(pt 592 232)
)
(connector
(pt 688 200)
(pt 720 200)
)
(connector
(pt 512 480)
(pt 624 480)
)
(connector
(text "wait_m1" (rect 752 464 792 476)(font "Arial" ))
(pt 624 480)
(pt 800 480)
)
(connector
(text "wait_m1" (rect 377 1840 417 1852)(font "Arial" ))
(pt 376 1856)
(pt 688 1856)
)
(connector
(pt 208 1504)
(pt 392 1504)
)
(junction (pt 248 144))
(junction (pt 272 320))
(junction (pt 416 304))
3605,6 → 3663,8
(junction (pt 624 880))
(junction (pt 704 112))
(junction (pt 592 200))
(junction (pt 224 1216))
(junction (pt 736 1072))
(text "MREQ DURING REFRESH" (rect 640 248 780 262)(font "Arial" (font_size 8)))
(text "STANDARD MEM REQ" (rect 712 408 837 422)(font "Arial" (font_size 8)))
(text "Refresh generator logic, USPTO 4,332,008 by Shima et al. FIG. 9A" (rect 40 32 506 48)(font "Arial" (font_size 10))(border))
/cpu/control/memory_ifc.v
14,7 → 14,7
 
// PROGRAM "Quartus II 64-Bit"
// VERSION "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition"
// CREATED "Sat Dec 10 09:02:54 2016"
// CREATED "Mon Dec 04 20:31:24 2017"
 
module memory_ifc(
clk,
75,7 → 75,9
wire nq2;
reg q1;
reg q2;
wire wait_io;
reg wait_iorq;
reg wait_iorqinta;
reg wait_m_ALTERA_SYNTHESIZED1;
reg wait_mrd;
reg wait_mwr;
82,16 → 84,15
wire SYNTHESIZED_WIRE_0;
reg DFFE_m1_ff3;
wire SYNTHESIZED_WIRE_1;
reg DFFE_iorq_ff4;
reg SYNTHESIZED_WIRE_15;
reg DFFE_iorq_ff4;
reg SYNTHESIZED_WIRE_16;
reg DFFE_mrd_ff3;
reg DFFE_intr_ff3;
wire SYNTHESIZED_WIRE_2;
reg SYNTHESIZED_WIRE_16;
wire SYNTHESIZED_WIRE_3;
reg SYNTHESIZED_WIRE_17;
wire SYNTHESIZED_WIRE_3;
reg SYNTHESIZED_WIRE_18;
wire SYNTHESIZED_WIRE_19;
wire SYNTHESIZED_WIRE_18;
reg DFFE_iorq_ff1;
reg DFFE_m1_ff1;
reg DFFE_mrd_ff1;
109,11 → 110,11
 
assign m1_mreq = ~(in_intr | SYNTHESIZED_WIRE_1);
 
assign iorq = SYNTHESIZED_WIRE_15 | DFFE_iorq_ff4 | SYNTHESIZED_WIRE_16;
assign iorq = wait_iorq | DFFE_iorq_ff4 | SYNTHESIZED_WIRE_15;
 
assign ioWrite = iorq & fIOWrite;
 
assign latch_wait = wait_mrd | wait_iorq | wait_m_ALTERA_SYNTHESIZED1 | wait_mwr;
assign latch_wait = wait_mrd | wait_io | wait_m_ALTERA_SYNTHESIZED1 | wait_mwr;
 
assign nMEMRQ_int = ~(m1_mreq | mrd_mreq | mwr_mreq);
 
127,24 → 128,27
 
assign nIORQ_out = ~(intr_iorq | iorq);
 
assign intr_iorq = DFFE_intr_ff3 | wait_iorq;
assign wait_io = wait_iorqinta | wait_iorq;
 
assign nM1_out = SYNTHESIZED_WIRE_2 | SYNTHESIZED_WIRE_17;
assign intr_iorq = DFFE_intr_ff3 | wait_iorqinta;
 
assign SYNTHESIZED_WIRE_0 = ~(SYNTHESIZED_WIRE_3 & SYNTHESIZED_WIRE_18);
assign nM1_out = SYNTHESIZED_WIRE_2 | SYNTHESIZED_WIRE_16;
 
assign nRFSH_out = ~(nq2 & SYNTHESIZED_WIRE_17);
assign SYNTHESIZED_WIRE_0 = ~(SYNTHESIZED_WIRE_3 & SYNTHESIZED_WIRE_17);
 
assign nRFSH_out = ~(nq2 & SYNTHESIZED_WIRE_16);
 
always@(posedge SYNTHESIZED_WIRE_19 or negedge nreset)
 
always@(posedge SYNTHESIZED_WIRE_18 or negedge nreset)
begin
if (!nreset)
begin
wait_iorq <= 0;
wait_iorqinta <= 0;
end
else
if (timings_en)
begin
wait_iorq <= iorq_Tw;
wait_iorqinta <= iorq_Tw;
end
end
 
158,7 → 162,7
else
if (nhold_clk_wait)
begin
DFFE_intr_ff3 <= wait_iorq;
DFFE_intr_ff3 <= wait_iorqinta;
end
end
 
181,31 → 185,31
begin
if (!nreset)
begin
SYNTHESIZED_WIRE_16 <= 0;
SYNTHESIZED_WIRE_15 <= 0;
end
else
if (timings_en)
begin
SYNTHESIZED_WIRE_16 <= DFFE_iorq_ff1;
SYNTHESIZED_WIRE_15 <= DFFE_iorq_ff1;
end
end
 
 
always@(posedge SYNTHESIZED_WIRE_19 or negedge nreset)
always@(posedge SYNTHESIZED_WIRE_18 or negedge nreset)
begin
if (!nreset)
begin
SYNTHESIZED_WIRE_15 <= 0;
wait_iorq <= 0;
end
else
if (timings_en)
begin
SYNTHESIZED_WIRE_15 <= SYNTHESIZED_WIRE_16;
wait_iorq <= SYNTHESIZED_WIRE_15;
end
end
 
 
always@(posedge SYNTHESIZED_WIRE_19 or negedge nreset)
always@(posedge SYNTHESIZED_WIRE_18 or negedge nreset)
begin
if (!nreset)
begin
214,7 → 218,7
else
if (timings_en)
begin
DFFE_iorq_ff4 <= SYNTHESIZED_WIRE_15;
DFFE_iorq_ff4 <= wait_iorq;
end
end
 
223,17 → 227,17
begin
if (!nreset)
begin
SYNTHESIZED_WIRE_17 <= 0;
SYNTHESIZED_WIRE_16 <= 0;
end
else
if (timings_en)
begin
SYNTHESIZED_WIRE_17 <= nM1_int;
SYNTHESIZED_WIRE_16 <= nM1_int;
end
end
 
 
always@(posedge SYNTHESIZED_WIRE_19 or negedge nreset)
always@(posedge SYNTHESIZED_WIRE_18 or negedge nreset)
begin
if (!nreset)
begin
247,7 → 251,7
end
 
 
always@(posedge SYNTHESIZED_WIRE_19 or negedge nreset)
always@(posedge SYNTHESIZED_WIRE_18 or negedge nreset)
begin
if (!nreset)
begin
289,7 → 293,7
end
 
 
always@(posedge SYNTHESIZED_WIRE_19 or negedge nreset)
always@(posedge SYNTHESIZED_WIRE_18 or negedge nreset)
begin
if (!nreset)
begin
303,7 → 307,7
end
 
 
always@(posedge SYNTHESIZED_WIRE_19 or negedge nreset)
always@(posedge SYNTHESIZED_WIRE_18 or negedge nreset)
begin
if (!nreset)
begin
317,21 → 321,21
end
 
 
always@(posedge SYNTHESIZED_WIRE_19 or negedge nreset)
always@(posedge SYNTHESIZED_WIRE_18 or negedge nreset)
begin
if (!nreset)
begin
SYNTHESIZED_WIRE_18 <= 0;
SYNTHESIZED_WIRE_17 <= 0;
end
else
if (timings_en)
begin
SYNTHESIZED_WIRE_18 <= SYNTHESIZED_WIRE_17;
SYNTHESIZED_WIRE_17 <= SYNTHESIZED_WIRE_16;
end
end
 
 
always@(posedge SYNTHESIZED_WIRE_19 or negedge nreset)
always@(posedge SYNTHESIZED_WIRE_18 or negedge nreset)
begin
if (!nreset)
begin
340,7 → 344,7
else
if (timings_en)
begin
DFFE_mreq_ff2 <= SYNTHESIZED_WIRE_18;
DFFE_mreq_ff2 <= SYNTHESIZED_WIRE_17;
end
end
 
359,7 → 363,7
end
 
 
always@(posedge SYNTHESIZED_WIRE_19 or negedge nreset)
always@(posedge SYNTHESIZED_WIRE_18 or negedge nreset)
begin
if (!nreset)
begin
373,7 → 377,7
end
 
 
always@(posedge SYNTHESIZED_WIRE_19 or negedge nreset)
always@(posedge SYNTHESIZED_WIRE_18 or negedge nreset)
begin
if (!nreset)
begin
386,7 → 390,7
end
end
 
assign SYNTHESIZED_WIRE_19 = ~clk;
assign SYNTHESIZED_WIRE_18 = ~clk;
 
assign nq2 = ~q2;
 
404,7 → 408,7
else
if (timings_en)
begin
q1 <= SYNTHESIZED_WIRE_17;
q1 <= SYNTHESIZED_WIRE_16;
end
end
 
/cpu/readme.txt
0,0 → 1,33
A-Z80 Logic Design
==================
Each functional block contains a Quartus project file:
./<block>/test_<block>.qpf
 
Quartus projects are only used as containers for files within individual
modules; complete and working top-level solutions that use A-Z80 are in the
"host" folder.
 
Majority of sub-modules are designed in the Quartus schematic editor and then
exported to Verilog for simulation and top-level integration.
 
Simulation
==========
Before you can load and simulate any module through Modelsim, you need to set up
the environment by running 'modelsim_setup.py'. The script creates relative file
path mapping to source files in all module project folders.
 
Each functional block, including the top level, contains a Modelsim simulation
profile: ./<block>/simulation/modelsim/test_<block>.mpf
 
After opening a Modelsim session, create a library and compile sources:
ModelSim> vlib work
Compile->Compile All
Run a simulation through one of the defined configurations.
 
If you get a message "Unable to compile", you likely forgot to run 'modelsim_setup.py'.
Exit ModelSim, revert changes to ".mpf" file, delete "work" folder and run
'modelsim_setup.py'.
 
Each project contains a set of predefined waveform scripts which you can
load before running a simulation:
./<block>/simulation/modelsim/wave_<test>.do
/cpu/top-level-files.txt
1,6 → 1,6
# This is a list of A-Z80 files and their dependencies used by several scripts.
# If you simply want to copy the CPU files into your project, run "export.py"
# instead of reading this list.
# This is a list of A-Z80 files and their dependencies. It is used by several scripts.
# To copy A-Z80 files into your project, run "export.py" script instead of reading
# this list or, even worse, copying everything.
 
------ Control block -------
control/clk_delay.v
/readme.txt
5,21 → 5,29
 
This project is described in more details at www.baltazarstudios.com
 
Prerequisites:
For additional information, read 'Quick Start' and 'Users Guide' documents
in the 'docs' folder. Also read a 'readme.txt' file in each of the folders.
 
Prerequisites
=============
* Altera Quartus and Modelsim (free web editions) OR
* Xilinx ISE (free Webpack edition) OR
* Lattice ICECube toolchain from Synopsis (Lattice tested by JuanS)
* Python 3.5.x
 
Description of Folders
======================
"cpu" folder contains A-Z80 CPU functional blocks and top-level modules:
alu contains ALU block, ALU control and flags logic
bus contains data bus switches, pin logic, address latch and the
address incrementer
control contains PLA decoder, the sequencer and other control blocks
registers contains CPU register file and the register control logic
control contains PLA, the sequencer and other control blocks
toplevel A-Z80 top level core, interfaces and test code
 
When exporting CPU files to use in your own project, run "export.py" script.
IMPORTANT:
If you want to use A-Z80 in your own project, run "export.py" script which
will copy only files that are needed (so, don't copy everything yourself).
 
"host" folder integrates the A-Z80 CPU into several fully functional designs:
"basic_de1" contains a simplified board consisting of A-Z80 CPU, memory
28,67 → 36,16
"zxspectrum_de1" contains an implementation of the Sinclair ZX Spectrum
for Altera DE1 board
 
You may want to start by loading one of those designs.
"tools", "resources" contain various tools related to the project; reverse
engineering Z80, design verification and testing.
 
"tools", "resources" contain various tools related to the project, reverse
engineering Z80 and testing.
Email me if you have any questions, issues or you want to use A-Z80 or any of
the files herein; I'd like to hear from you,
 
Read the 'readme.txt' files in each of the folders for additional information.
Read 'Quick Start' and 'Users Guide' documents in the 'docs' folder.
 
A-Z80 Logic Design
==================
Each functional block contains a Quartus project file:
./<block>/test_<block>.qpf
 
Quartus projects are only used as containers for files within individual
modules; complete and working top-level solutions that use A-Z80 are in the
"host" folder.
 
Majority of sub-modules are designed in the Quartus schematic editor and then
exported to Verilog for simulation and top-level integration.
 
Simulation
==========
Before you can load and simulate any module through Modelsim, you need to set up
the environment by running 'modelsim_setup.py'. The script creates relative file
path mapping to source files in all module project folders.
 
Each functional block, including the top level, contains a Modelsim simulation
profile: ./<block>/simulation/modelsim/test_<block>.mpf
 
After opening a Modelsim session, create a library and compile sources:
ModelSim> vlib work
Compile->Compile All
Run a simulation through one of the defined configurations.
 
If you get a message "Unable to compile", you likely forgot to run 'modelsim_setup.py'.
Exit ModelSim, revert changes to ".mpf" file, delete "work" folder and run
'modelsim_setup.py'.
 
Each project contains a set of predefined waveform scripts which you can
load before running a simulation:
./<block>/simulation/modelsim/wave_<test>.do
 
Email me if you have any questions,
Goran Devic
gdevic@yahoo.com
 
----------------------------------------------------------------------------------
This complete project and each file therein is covered under the GNU GPL2.0 license.
This project and each file therein is covered under the GNU GPL2.0 license.
It basically states that anyone is free to use it and distribute it, but the full
source needs to be available under the same terms:
 
This program is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the Free
Software Foundation; either version 2 of the License, or (at your option)
any later version.
 
This program is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details.
 
You should have received a copy of the GNU General Public License along
with this program; if not, write to the Free Software Foundation, Inc.,
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
source needs to be available under the same terms.

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