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URL https://opencores.org/ocsvn/a-z80/a-z80/trunk

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    /a-z80/trunk
    from Rev 3 to Rev 5
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Rev 3 → Rev 5

/docs/A-Z80_UsersGuide.pdf Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
/docs/A-Z80_UsersGuide.docx Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
/host/zxspectrum/ula/clocks.sv
5,7 → 5,7
//
// TODO: Video RAM contention would cause a clock gating which would be
// implemented in this module. RAM contention is not implemented since we are
// using a dual-port RAM.
// using FPGA RAM cells configured in dual-port mode.
//
// Copyright (C) 2014 Goran Devic
//
26,6 → 26,7
module clocks
(
input wire clk_ula, // Input ULA clock of 14 MHz
input wire turbo, // Turbo speed (3.5 MHz x 2 = 7.0 MHz)
output reg clk_cpu // Output 3.5 MHz CPU clock
);
 
34,11 → 35,13
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
reg [0:0] counter;
 
// Note: In order to test at 3.5 MHz, the PLL needs to be set to generate 14 MHz
// Note: In order to get to 3.5 MHz, the PLL needs to be set to generate 14 MHz
// and then this divider-by-4 brings the effective clock down to 3.5 MHz
// 1. always block at positive edge of clk_ula divides by 2
// 2. counter flop further divides it by 2 unless the turbo mode is set
always @(posedge clk_ula)
begin
if (counter=='0)
if (counter=='0 | turbo)
clk_cpu <= ~clk_cpu;
counter <= counter - 1'b1;
end
/host/zxspectrum/ula/ula.sv
22,6 → 22,7
//-------- Clocks and reset -----------------
input wire CLOCK_27, // Input clock 27 MHz
input wire CLOCK_24, // Input clock 24 MHz
input wire turbo, // Turbo speed (3.5 MHz x 2 = 7.0 MHz)
output wire clk_vram,
input wire reset, // KEY0 is reset
output wire locked, // PLL is locked signal
42,6 → 43,7
//-------- PS/2 Keyboard --------------------
input wire PS2_CLK,
input wire PS2_DAT,
output wire pressed,
 
//-------- Audio (Tape player) --------------
inout wire I2C_SCLK,
52,6 → 54,7
output wire AUD_BCLK,
output wire AUD_DACDAT,
input wire AUD_ADCDAT,
output reg beeper,
 
//-------- VGA connector --------------------
output wire [3:0] VGA_R,
90,6 → 93,8
// Let us hear the tape loading!
pcm_outl[12] <= pcm_inl[14] | pcm_inr[14];
pcm_outr[12] <= pcm_inl[14] | pcm_inr[14];
// Let us see the tape loading!
beep <= (pcm_inl[14] | pcm_inr[14]) ^ D[4] ^ D[3];
end
end
 
111,6 → 116,15
.PCM_INL(pcm_inl[15:0]), .PCM_INR(pcm_inr[15:0]), .PCM_OUTL(pcm_outl[15:0]), .PCM_OUTR(pcm_outr[15:0]),
.I2S_MCLK(AUD_XCK), .I2S_LRCLK(AUD_ADCLRCK), .I2S_BCLK(AUD_BCLK), .I2S_DOUT(AUD_DACDAT), .I2S_DIN(AUD_ADCDAT) );
 
// Show the beeper visually by dividing the frequency with some factor to generate blinks
reg beep; // Beeper latch
reg [6:0] beepcnt; // Beeper counter
always @(posedge beep)
begin
beepcnt <= beepcnt - '1;
if (beepcnt==0) beeper <= ~beeper;
end
 
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
// Instantiate ULA's video subsystem
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/host/zxspectrum/ula/zx_kbd.sv
46,7 → 46,8
// Input key scan codes from the PS/2 keyboard
input wire [7:0] scan_code, // PS/2 scan-code
input wire scan_code_ready, // Active for 1 clock: a scan code is ready
input wire scan_code_error // Error receiving PS/2 keyboard data
input wire scan_code_error, // Error receiving PS/2 keyboard data
output wire pressed // Signal that a key is pressed
);
 
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
58,6 → 59,9
reg extended; // Tracks "extended" scan code (E0)
reg shifted; // Tracks local "shifted" state
 
// Calculate a "key is pressed" signal
assign pressed = ~(&keys[7] & &keys[6] & &keys[5] & &keys[4] & &keys[3] & &keys[2] & &keys[1] & &keys[0]);
 
// Output requested row of keys continously
always_comb
begin
/host/zxspectrum/zxspectrum_board.sv
70,8 → 70,10
//-------- Misc and debug -------------------
input wire SW0, // ROM selection
input wire SW1, // Enable/disable interrupts
output wire [1:0] LEDR, // Shows the switch selection
inout wire [31:0] GPIO_1
input wire SW2, // Turbo speed (3.5 MHz x 2 = 7.0 MHz)
output wire [2:0] LEDR, // Shows the switch selection
inout wire [31:0] GPIO_1,
output wire [2:0] LEDGTOP // Show additional information visually
);
`default_nettype none
 
85,6 → 87,11
assign GPIO_1[31:24] = {nM1,nMREQ,nIORQ,nRD,nWR,nRFSH,nHALT,nBUSACK};
//assign GPIO_1[] = {nWAIT,nINT,nNMI,nRESET,nBUSRQ,CLK};
 
// Top 3 green LEDs show various states:
assign LEDGTOP[2] = 0; // Reserved for future use
assign LEDGTOP[1] = beeper; // Show the beeper state
assign LEDGTOP[0] = pressed; // Show when a key is being pressed
 
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
// Internal buses and address map selection logic
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
183,11 → 190,14
// Instantiate ULA
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
wire clk_cpu; // Global CPU clock of 3.5 MHz
assign LEDR[2] = SW2; // Glow red when in turbo mode (7.0 MHz)
wire [12:0] vram_address; // ULA video block requests a byte from the video RAM
wire [7:0] vram_data; // ULA video block reads a byte from the video RAM
wire vs_nintr; // Generates a vertical retrace interrupt
wire pressed; // Show that a key is being pressed
wire beeper; // Show the beeper state
 
ula ula_( .*, .clk_cpu(clk_cpu) );
ula ula_( .*, .turbo(SW2), .clk_cpu(clk_cpu) );
 
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
// Instantiate A-Z80 CPU
203,7 → 213,7
 
wire nWAIT = 1;
wire nINT = (SW1==0)? vs_nintr : '1;// SW1 disables interrupts and, hence, keyboard
assign LEDR[1] = SW1; // Glow red when keyboard is *disabled*
assign LEDR[1] = SW1; // Glow red when interrupts are *disabled*
wire nNMI = KEY1; // Pressing KEY1 issues a NMI
wire nBUSRQ = 1;
 
212,10 → 222,10
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
// Lit green LEDs to show activity on a Kempston compatible joystick
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
assign LEDG[0] = !kempston[5]; // UP
assign LEDG[1] = !kempston[4]; // DOWN
assign LEDG[2] = !kempston[0]; // LEFT
assign LEDG[3] = !kempston[2]; // RIGHT
assign LEDG[4] = !kempston[3]; // BUTTON
assign LEDG[0] = !kempston[5]; // UP
assign LEDG[1] = !kempston[4]; // DOWN
assign LEDG[2] = !kempston[0]; // LEFT
assign LEDG[3] = !kempston[2]; // RIGHT
assign LEDG[4] = !kempston[3] | !kempston[1]; // BUTTON
 
endmodule
/host/zxspectrum/zxspectrum_board.qsf
105,9 → 105,9
set_location_assignment PIN_V22 -to LEDG[2]
set_location_assignment PIN_V21 -to LEDG[3]
set_location_assignment PIN_W22 -to LEDG[4]
set_location_assignment PIN_W21 -to LEDG[5]
set_location_assignment PIN_Y22 -to LEDG[6]
set_location_assignment PIN_Y21 -to LEDG[7]
set_location_assignment PIN_W21 -to LEDGTOP[0]
set_location_assignment PIN_Y22 -to LEDGTOP[1]
set_location_assignment PIN_Y21 -to LEDGTOP[2]
set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[0]
set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[1]
set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[2]
123,9 → 123,9
set_instance_assignment -name IO_STANDARD LVTTL -to LEDG[2]
set_instance_assignment -name IO_STANDARD LVTTL -to LEDG[3]
set_instance_assignment -name IO_STANDARD LVTTL -to LEDG[4]
set_instance_assignment -name IO_STANDARD LVTTL -to LEDG[5]
set_instance_assignment -name IO_STANDARD LVTTL -to LEDG[6]
set_instance_assignment -name IO_STANDARD LVTTL -to LEDG[7]
set_instance_assignment -name IO_STANDARD LVTTL -to LEDGTOP[0]
set_instance_assignment -name IO_STANDARD LVTTL -to LEDGTOP[1]
set_instance_assignment -name IO_STANDARD LVTTL -to LEDGTOP[2]
 
###########################################################################
# 7-Segment displays
/host/zxspectrum/zxspectrum_board.sdc
29,6 → 29,7
 
# Create false clocks
create_clock -name KEY1 -period 10.000 [get_ports {KEY1}]
create_clock -name beep -period 10.000 [get_registers {ula:ula_|beep}]
 
# Set independent clock groups that don't interfere with each other:
set_clock_groups -asynchronous \
36,6 → 37,7
-group [get_clocks {CLOCK_27}] \
-group [get_clocks {clk_cpu}] \
-group [get_clocks {KEY1}] \
-group [get_clocks {beep}] \
-group ula_|pll_|altpll_component|pll|clk[0] \
-group ula_|pll_|altpll_component|pll|clk[1]
 
/host/zxspectrum/rom/readme.txt
9,3 → 9,5
 
Flash the "combined.bin" into the flash of your DE1 board at the address 0.
SW0 selects which ROM image (which 16K block) is used.
 
See the User's Guide for more information on this design.

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