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Subversion Repositories a-z80

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Rev 9 → Rev 10

/trunk/host/zxspectrum_de1/ula/video.sv
1,5 → 1,5
//============================================================================
// Implementation of the Sinclair ZX Spectrum ULA
// Sinclair ZX Spectrum ULA
//
// This module contains video support.
//
/trunk/host/zxspectrum_de1/ula/test_ula.sv
1,5 → 1,5
//============================================================================
// Test the implementation of the Sinclair ZX Spectrum ULA
// Test Sinclair ZX Spectrum ULA
//
// Copyright (C) 2014-2016 Goran Devic
//
/trunk/host/zxspectrum_de1/ula/ula.sv
1,5 → 1,5
//============================================================================
// The implementation of the Sinclair ZX Spectrum ULA
// Sinclair ZX Spectrum ULA
//
// Copyright (C) 2014-2016 Goran Devic
//
24,7 → 24,7
input wire CLOCK_24, // Input clock 24 MHz
input wire turbo, // Turbo speed (3.5 MHz x 2 = 7.0 MHz)
output wire clk_vram,
input wire reset, // KEY0 is reset
input wire nreset, // Active low reset
output wire locked, // PLL is locked signal
 
//-------- CPU control ----------------------
104,7 → 104,7
wire audio_done;
wire audio_error;
 
i2c_loader i2c_loader_( .CLK(CLOCK_24), .nRESET(reset), .I2C_SCL(I2C_SCLK), .I2C_SDA(I2C_SDAT), .IS_DONE(audio_done), .IS_ERROR(audio_error) );
i2c_loader i2c_loader_( .CLK(CLOCK_24), .nRESET(nreset), .I2C_SCL(I2C_SCLK), .I2C_SDA(I2C_SDAT), .IS_DONE(audio_done), .IS_ERROR(audio_error) );
 
assign AUD_DACLRCK = AUD_ADCLRCK;
wire [15:0] pcm_inl;
112,11 → 112,11
reg [15:0] pcm_outl;
reg [15:0] pcm_outr;
 
i2s_intf i2s_intf_( .CLK(CLOCK_24), .nRESET(reset),
i2s_intf i2s_intf_( .CLK(CLOCK_24), .nRESET(nreset),
.PCM_INL(pcm_inl[15:0]), .PCM_INR(pcm_inr[15:0]), .PCM_OUTL(pcm_outl[15:0]), .PCM_OUTR(pcm_outr[15:0]),
.I2S_MCLK(AUD_XCK), .I2S_LRCLK(AUD_ADCLRCK), .I2S_BCLK(AUD_BCLK), .I2S_DOUT(AUD_DACDAT), .I2S_DIN(AUD_ADCDAT) );
 
// Show the beeper visually by dividing the frequency with some factor to generate blinks
// Show the beeper visually by dividing the frequency with some factor to generate LED blinks
reg beep; // Beeper latch
reg [6:0] beepcnt; // Beeper counter
always @(posedge beep)
142,7 → 142,7
wire [4:0] key_row;
zx_keyboard zx_keyboard_( .*, .clk(clk_cpu) );
 
always @(*) // always_comb
always_comb
begin
ula_data = 8'hFF;
// Regular IO at every odd address: line-in and keyboard
/trunk/host/zxspectrum_de1/ula/zx_kbd.sv
1,15 → 1,16
//============================================================================
// Implementation of the ZX Spectrum keyboard input generator
// This module takes scan-codes from the PS/2 keyboard input and sets
// corresponding ZX key bitfields which are read by IN (FE) instructions.
// ZX Spectrum keyboard input
//
// This module takes scan-codes from the attached PS/2 keyboard and sets
// corresponding ZX key bitfields which are read by the 'IN' instructions.
//
// PS/2 | ZX Spectrum
// ----------+-----------------
// CTRL | CAPS SHIFT
// ALT | SYMBOL SHIFT
//
// In addition to regular alpha-numeric keys, this code simulates many standard
// symbols on the PS/2 keyboard for convenience.
// For convenience, in addition to regular alpha-numeric keys, this code
// simulates several other standard symbols on the PS/2 keyboard.
//
// PS/2 | ZX Spectrum
// ----------+-----------------
16,7 → 17,7
// BACKSPACE | DELETE
// Arrows Left, Right, Up, Down
// ESC | BREAK (CAPS+SPACE)
// SHIFT => PS/2 shift for these separate additional keys: -_ += ;: "' <, >. ?/
// SHIFT => PS/2 shift for additional keys: -_ += ;: "' <, >. ?/
//
// Copyright (C) 2014-2016 Goran Devic
//
37,7 → 38,7
module zx_keyboard
(
input wire clk,
input wire reset, // Reset (negative logic)
input wire nreset, // Active low reset
 
// Output ZX-specific keyboard codes when requested by the ULA access
input wire [15:0] A, // Address bus
63,25 → 64,19
assign pressed = ~(&keys[7] & &keys[6] & &keys[5] & &keys[4] & &keys[3] & &keys[2] & &keys[1] & &keys[0]);
 
// Output requested row of keys continously
always @(*) // always_comb
begin
case (A[15:8])
8'b11111110: key_row = keys[0];
8'b11111101: key_row = keys[1];
8'b11111011: key_row = keys[2];
8'b11110111: key_row = keys[3];
8'b11101111: key_row = keys[4];
8'b11011111: key_row = keys[5];
8'b10111111: key_row = keys[6];
8'b01111111: key_row = keys[7];
default:
key_row = 5'b11111;
endcase
end
assign key_row =
(~A[8] ? keys[0] : 5'b11111) &
(~A[9] ? keys[1] : 5'b11111) &
(~A[10] ? keys[2] : 5'b11111) &
(~A[11] ? keys[3] : 5'b11111) &
(~A[12] ? keys[4] : 5'b11111) &
(~A[13] ? keys[5] : 5'b11111) &
(~A[14] ? keys[6] : 5'b11111) &
(~A[15] ? keys[7] : 5'b11111);
 
always @(posedge clk or negedge reset)
always @(posedge clk or negedge nreset)
begin
if (!reset) begin
if (!nreset) begin
released <= 0;
extended <= 0;
shifted <= 0;
/trunk/host/zxspectrum_de1/ula/ps2_kbd.sv
1,5 → 1,5
//============================================================================
// Implementation of the PS/2 keyboard scan-code reader
// PS/2 keyboard scan-code reader
//
// Copyright (C) 2014-2016 Goran Devic
//
20,7 → 20,7
module ps2_keyboard
(
input wire clk,
input wire reset, // Reset (negative logic)
input wire nreset, // Active low reset
input wire PS2_CLK, // PS/2 keyboard clock line
input wire PS2_DAT, // PS/2 keyboard data line
 
47,9 → 47,9
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
// Filter the PS/2 clock signal since it might have a noise (false '1')
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
always @(posedge clk or negedge reset)
always @(posedge clk or negedge nreset)
begin
if (!reset) begin
if (!nreset) begin
ps2_clk_in <= 1;
clk_filter <= 8'b1;
clk_edge <= 0;
73,9 → 73,9
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
// State machine to process bits of PS/2 data
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
always @(posedge clk or negedge reset)
always @(posedge clk or negedge nreset)
begin
if (!reset) begin
if (!nreset) begin
bit_count <= '0;
shiftreg <= '0;
scan_code_ready <= 0;
/trunk/host/zxspectrum_de1/zxspectrum_de1.sv
22,7 → 22,7
//-------- Clocks and reset -----------------
input wire CLOCK_27, // Input clock 27 MHz
input wire CLOCK_24, // Input clock 24 MHz
input wire KEY0, // RESET button
input wire KEY0, // RESET button; on DE1, keys are active low!
input wire KEY1, // NMI button
 
//-------- PS/2 Keyboard --------------------
202,7 → 202,7
.CLOCK_24 (CLOCK_24), // Input clock 24 MHz
.turbo (SW2), // Turbo speed (3.5 MHz x 2 = 7.0 MHz)
.clk_vram (clk_vram),
.reset (reset), // KEY0 is reset
.nreset (reset), // KEY0 is reset; on DE1, keys are active low!
.locked (locked), // PLL is locked signal
 
//-------- CPU control ----------------------

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