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sw/rtos/kernel Property changes : Deleted: bugtraq:number ## -1 +0,0 ## -true \ No newline at end of property Index: sw/rtos/arch/altor32/cpu_interrupts.c =================================================================== --- sw/rtos/arch/altor32/cpu_interrupts.c (revision 21) +++ sw/rtos/arch/altor32/cpu_interrupts.c (nonexistent) @@ -1,69 +0,0 @@ -//----------------------------------------------------------------------------- -// AltOR32 -// Alternative Lightweight OpenRISC -// Ultra-Embedded.com -// Copyright 2011 - 2012 -// -// Email: admin@ultra-embedded.com -// -// License: GPL -// Please contact the above address if you would like a version of this -// software with a more permissive license for use in closed source commercial -// applications. -//----------------------------------------------------------------------------- -// -// This file is part of AltOR32 Alternative Lightweight OpenRISC project. -// -// AltOR32 is free software; you can redistribute it and/or modify it under -// the terms of the GNU General Public License as published by the Free Software -// Foundation; either version 2 of the License, or (at your option) any later -// version. -// -// AltOR32 is distributed in the hope that it will be useful, but WITHOUT ANY -// WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS -// FOR A PARTICULAR PURPOSE. See the GNU General Public License for more -// details. -// -// You should have received a copy of the GNU General Public License -// along with AltOR32; if not, write to the Free Software Foundation, Inc., -// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -//----------------------------------------------------------------------------- -#include "kernel/rtos.h" -#include "cpu_interrupts.h" -#include "irq.h" - -//----------------------------------------------------------------- -// cpu_int_register: -//----------------------------------------------------------------- -void cpu_int_register(int interrupt, void (*func)(int interrupt)) -{ - irq_register(interrupt, func); -} -//----------------------------------------------------------------- -// cpu_int_enable: -//----------------------------------------------------------------- -void cpu_int_enable(int interrupt) -{ - irq_enable(interrupt); -} -//----------------------------------------------------------------- -// cpu_int_disable: -//----------------------------------------------------------------- -void cpu_int_disable(int interrupt) -{ - irq_disable(interrupt); -} -//----------------------------------------------------------------- -// cpu_int_acknowledge: -//----------------------------------------------------------------- -void cpu_int_acknowledge(int interrupt) -{ - irq_acknowledge(interrupt); -} -//----------------------------------------------------------------- -// cpu_wfi_sleep: -//----------------------------------------------------------------- -void cpu_wfi_sleep(void) -{ - // Not supported -} Index: sw/rtos/arch/altor32/cpu_interrupts.h =================================================================== --- sw/rtos/arch/altor32/cpu_interrupts.h (revision 21) +++ sw/rtos/arch/altor32/cpu_interrupts.h (nonexistent) @@ -1,29 +0,0 @@ -#ifndef __CPU_INTERRUPTS_H__ -#define __CPU_INTERRUPTS_H__ - -//----------------------------------------------------------------- -// Defines -//----------------------------------------------------------------- -#define CPU_MAX_INTERRUPTS 32 - -//----------------------------------------------------------------- -// Prototypes -//----------------------------------------------------------------- - -// Register interrupt handler with interrupt/exception -void cpu_int_register(int interrupt, void (*func)(int interrupt)); - -// Enable interrupt/exception -void cpu_int_enable(int interrupt); - -// Disable interrupt/exception -void cpu_int_disable(int interrupt); - -// Acknowledge interrupt source -void cpu_int_acknowledge(int interrupt); - -// Put CPU into sleep mode & wait for interrupts -void cpu_wfi_sleep(void); - -#endif // __CPU_INTERRUPTS_H__ - Index: sw/rtos/arch/altor32/cpu_thread.c =================================================================== --- sw/rtos/arch/altor32/cpu_thread.c (revision 21) +++ sw/rtos/arch/altor32/cpu_thread.c (nonexistent) @@ -1,334 +0,0 @@ -//----------------------------------------------------------------------------- -// AltOR32 -// Alternative Lightweight OpenRISC -// Ultra-Embedded.com -// Copyright 2011 - 2012 -// -// Email: admin@ultra-embedded.com -// -// License: GPL -// Please contact the above address if you would like a version of this -// software with a more permissive license for use in closed source commercial -// applications. -//----------------------------------------------------------------------------- -// -// This file is part of AltOR32 Alternative Lightweight OpenRISC project. -// -// AltOR32 is free software; you can redistribute it and/or modify it under -// the terms of the GNU General Public License as published by the Free Software -// Foundation; either version 2 of the License, or (at your option) any later -// version. -// -// AltOR32 is distributed in the hope that it will be useful, but WITHOUT ANY -// WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS -// FOR A PARTICULAR PURPOSE. See the GNU General Public License for more -// details. -// -// You should have received a copy of the GNU General Public License -// along with AltOR32; if not, write to the Free Software Foundation, Inc., -// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -//----------------------------------------------------------------------------- -#include "kernel/rtos.h" -#include "kernel/os_assert.h" -#include "cpu_interrupts.h" -#include "mem_map.h" -#include "printf.h" -#include "irq.h" - -//----------------------------------------------------------------- -// Defines: -//----------------------------------------------------------------- - -// Macro used to stop profiling functions being called -#define NO_PROFILE __attribute__((__no_instrument_function__)) - -// SR Register -#define SPR_SR (17) - -// SR_IEE - Interrupt Exception Enable -#define SPR_SR_IEE 0x00000004 - -#define STACK_REDZONE_SIZE 128 - -//----------------------------------------------------------------- -// Globals: -//----------------------------------------------------------------- -volatile tTaskBlock * _currentTCB = NULL; -volatile unsigned _in_interrupt = 0; - -//----------------------------------------------------------------- -// cpu_thread_init_tcb: -//----------------------------------------------------------------- -void cpu_thread_init_tcb( tTaskBlock *tcb, void (*func)(void *), void *funcArg, unsigned long *stack, unsigned int stack_size ) -{ - unsigned long *stack_pointer; - int i; - - OS_ASSERT(stack != NULL); - - // Record end of stack (start of stack array) - stack_pointer = stack; - tcb->StackSize = stack_size; - tcb->StackAlloc = stack_pointer; - - // Set default check byte - for (i=0;iStackSize;i++) - tcb->StackAlloc[i] = STACK_CHK_BYTE; - - // Set current stack pointer to start (top) of stack - stack_pointer += (tcb->StackSize-1); - - // MARKER - *stack_pointer = ( unsigned long ) 0xFEADC0ED; - stack_pointer--; - - // MARKER 2 - *stack_pointer = ( unsigned long ) 0xFEADC0ED; - stack_pointer--; - - // Make space for redzone... - stack_pointer -= STACK_REDZONE_SIZE; - - // Setup registers - for (i=31;i>=2;i--) - { - // R3 = Arg - if (i == 3) - *stack_pointer = ( unsigned long ) funcArg; - else - *stack_pointer = ( unsigned long ) i; - stack_pointer--; - } - - // 4: ESR (start with interrupts enabled) - *stack_pointer = ( unsigned long ) SPR_SR_IEE; - stack_pointer--; - - // 0: EPC - *stack_pointer = ( unsigned long ) func; - - // Critical depth = 0 so not in critical section (ints enabled) - tcb->critical_depth = 0; - - /* Record new stack pointer */ - tcb->StackPointer = stack_pointer; -} -//----------------------------------------------------------------- -// mtspr: Write to SPR -//----------------------------------------------------------------- -static inline void mtspr(unsigned long spr, unsigned long value) -{ - asm volatile ("l.mtspr\t\t%0,%1,0": : "r" (spr), "r" (value)); -} -//----------------------------------------------------------------- -// mfspr: Read from SPR -//----------------------------------------------------------------- -static inline unsigned long mfspr(unsigned long spr) -{ - unsigned long value; - asm volatile ("l.mfspr\t\t%0,%1,0" : "=r" (value) : "r" (spr)); - return value; -} -//----------------------------------------------------------------- -// cpu_critical_start: Force interrupts to be disabled -//----------------------------------------------------------------- -int NO_PROFILE cpu_critical_start(void) -{ - // Don't do anything to the interrupt status if already within IRQ - if (_in_interrupt || _currentTCB == NULL) - return 0; - - // Disable interrupts - mtspr(SPR_SR, 0); - - // Increase critical depth - _currentTCB->critical_depth++; - - return (int)0; -} -//----------------------------------------------------------------- -// cpu_critical_end: Restore interrupt enable state -//----------------------------------------------------------------- -void NO_PROFILE cpu_critical_end(int cr) -{ - // Don't do anything to the interrupt status if already within IRQ - if (_in_interrupt || _currentTCB == NULL) - return ; - - OS_ASSERT(_currentTCB->critical_depth > 0); - OS_ASSERT(_currentTCB->critical_depth < 255); - - // Decrement critical depth - _currentTCB->critical_depth--; - - // End of critical section? - if (_currentTCB->critical_depth == 0) - { - // Manually re-enable IRQ - mtspr(SPR_SR, SPR_SR_IEE); - } - - return; -} -//----------------------------------------------------------------- -// cpu_context_switch: -//----------------------------------------------------------------- -void cpu_context_switch( void ) -{ - OS_ASSERT(!_in_interrupt); - - // Cause context switch - asm volatile ( "l.nop \n\t" ); - asm volatile ( "l.sys 0 \n\t" ); - asm volatile ( "l.nop \n\t" ); -} -//----------------------------------------------------------------- -// cpu_context_switch_irq: -//----------------------------------------------------------------- -void cpu_context_switch_irq( void ) -{ - // No need to do anything in this system as all interrupts - // cause the kernel to run... - OS_ASSERT(_in_interrupt); -} -//----------------------------------------------------------------- -// cpu_load_context: -//----------------------------------------------------------------- -static inline void cpu_load_context(int preempt) -{ - struct register_set *reg_file; - - // Load new thread context - thread_load_context(preempt); - - // Adjust ESR to have correct interrupt enable bit state - reg_file = (struct register_set *)_currentTCB->StackPointer; - - if (_currentTCB->critical_depth == 0) - reg_file->esr |= SPR_SR_IEE; - else - reg_file->esr &=~SPR_SR_IEE; -} -//----------------------------------------------------------------- -// cpu_irq: -//----------------------------------------------------------------- -CRITICALFUNC void cpu_irq(void) -{ - int preempt = 0; - unsigned int stat = IRQ_STATUS & IRQ_MASK; - - // Check that this not occuring recursively! - OS_ASSERT(!_in_interrupt); - _in_interrupt = 1; - - // Has timer event fired? - if (stat & (1 << IRQ_SYSTICK)) - { - preempt = 1; - thread_tick(); - - // Acknowledge interrupt - IRQ_STATUS = (1 << IRQ_SYSTICK); - stat &= ~(1 << IRQ_SYSTICK); - } - - // More pending interrupts? - if (stat) - irq_handler(stat); - - // Load new thread context - cpu_load_context(preempt); - - _in_interrupt = 0; -} -//----------------------------------------------------------------- -// cpu_syscall: -//----------------------------------------------------------------- -void cpu_syscall(void) -{ - // Load new thread context - cpu_load_context(0); -} -//----------------------------------------------------------------- -// cpu_thread_start: -//----------------------------------------------------------------- -void cpu_thread_start( void ) -{ - // Disable all & clear all interrupts - IRQ_MASK_CLR = 0xFFFFFFFF; - IRQ_STATUS = 0xFFFFFFFF; - - // Force global IRQ enable to disabled prior to starting - // systick & restoring initial context - mtspr(SPR_SR, 0); - - // Enable Systick IRQ & fault handling - cpu_int_enable(IRQ_SYSTICK); - - // Generate syscall interrupt to load first context - cpu_context_switch(); -} -//----------------------------------------------------------------- -// cpu_dump_stack: -//----------------------------------------------------------------- -void cpu_dump_stack(void) -{ - struct register_set *reg_file = (struct register_set *)_currentTCB->StackPointer; - int i; - - printf("Frame:\n"); - printf(" Critical Depth 0x%x\n", _currentTCB->critical_depth); - printf(" EPC 0x%x\n", reg_file->epc); - printf(" ESR 0x%x\n", reg_file->esr); - printf(" R0 = 0x0\n"); - printf(" R1(SP) = 0x%x\n",((unsigned int)_currentTCB->StackPointer) + 132); - for (i=0;i<30;i++) - { - printf(" R%x = 0x%x\n", i+2, reg_file->reg[i]); - } -} -//----------------------------------------------------------------- -// cpu_thread_stack_size: -//----------------------------------------------------------------- -int cpu_thread_stack_size(tTaskBlock * pCurrent) -{ - return (int)pCurrent->StackSize; -} -//----------------------------------------------------------------- -// cpu_thread_stack_free: -//----------------------------------------------------------------- -int cpu_thread_stack_free(tTaskBlock * pCurrent) -{ - int i; - int free = 0; - - for (i=0;iStackSize;i++) - { - if (pCurrent->StackAlloc[i] != STACK_CHK_BYTE) - break; - else - free++; - } - - return free; -} -//----------------------------------------------------------------- -// cpu_fault -//----------------------------------------------------------------- -void cpu_fault(void) -{ - printf("FAULT:\n"); - if (_currentTCB) - cpu_dump_stack(); - while (1); -} -//----------------------------------------------------------------- -// cpu_trap -//----------------------------------------------------------------- -void cpu_trap(void) -{ - printf("TRAP:\n"); - if (_currentTCB) - cpu_dump_stack(); - while (1); -} Index: sw/rtos/arch/altor32/cpu_thread.h =================================================================== --- sw/rtos/arch/altor32/cpu_thread.h (revision 21) +++ sw/rtos/arch/altor32/cpu_thread.h (nonexistent) @@ -1,97 +0,0 @@ -#ifndef __CPU_THREAD_H__ -#define __CPU_THREAD_H__ - -#ifndef NULL - #define NULL 0 -#endif - -//----------------------------------------------------------------- -// Defines -//----------------------------------------------------------------- -#define STACK_CHK_BYTE 0xBABEFEAD - -// Optional: Define gcc section linkage to relocate critical functions to faster memory -#ifndef CRITICALFUNC - #define CRITICALFUNC -#endif - -//----------------------------------------------------------------- -// Structures -//----------------------------------------------------------------- - -// Task Control Block -typedef struct sTaskBlock -{ - // Current stack pointer (Must be first item in struct) - volatile unsigned long *StackPointer; - - // Stack end pointer - volatile unsigned long *StackAlloc; - - // Stack size - unsigned int StackSize; - - // Critical section / Interrupt status - unsigned int critical_depth; -} tTaskBlock; - - -// Exception stack frame layout for context save / restore -struct register_set -{ - // EPC (saved PC+4) - unsigned int epc; - - // ESR (saved SR) - unsigned int esr; - - // Excludes r0, r1 - unsigned int reg[32-2]; -}; - -//----------------------------------------------------------------- -// Globals -//----------------------------------------------------------------- - -// Current Task Control Block -extern volatile tTaskBlock * _currentTCB; - -//----------------------------------------------------------------- -// Prototypes -//----------------------------------------------------------------- - -// Initialise thread context -void cpu_thread_init_tcb( tTaskBlock *tcb, void (*func)(void *), void *funcArg, unsigned long *stack, unsigned int stack_size ); - -// Start first thread switch -void cpu_thread_start(void); - -// Force context switch -void cpu_context_switch( void ); - -// Force context switch (from IRQ) -void cpu_context_switch_irq( void ); - -// Critical section entry & exit -int cpu_critical_start(void); -void cpu_critical_end(int cr); - -// Dump thread stack details upon assertion / exception -void cpu_dump_stack(void); - -// Specified thread TCB's free stack entries count -int cpu_thread_stack_free(tTaskBlock * pCurrent); - -// Specified thread TCB's total stack size -int cpu_thread_stack_size(tTaskBlock * pCurrent); - -void cpu_syscall(void); - -CRITICALFUNC void cpu_irq(void); - -// CPU clocks/time measurement functions (optional, used if RTOS_MEASURE_THREAD_TIME defined) -unsigned long cpu_timenow(void); -long cpu_timediff(unsigned long a, unsigned long b); - -#endif // __CPU_THREAD_H__ - Index: sw/rtos/arch/altor32/exception.inc =================================================================== --- sw/rtos/arch/altor32/exception.inc (revision 21) +++ sw/rtos/arch/altor32/exception.inc (nonexistent) @@ -1,148 +0,0 @@ -#------------------------------------------------------------- -# Context Stack Frame - 128 words -#------------------------------------------------------------- -# 0: EPC -# 4: ESR -# 8: R2 (FP) -# 12: R3 -# 16: R4 -# 20: R5 -# 24: R6 -# 28: R7 -# 32: R8 -# 36: R9 (LR) -# 40: R10 -# 44: R11 -# 48: R12 -# 52: R13 -# 56: R14 -# 60: R15 -# 64: R16 -# 68: R17 -# 72: R18 -# 76: R19 -# 80: R20 -# 84: R21 -# 88: R22 -# 92: R23 -# 96: R24 -# 100: R25 -# 104: R26 -# 108: R27 -# 112: R28 -# 116: R29 -# 120: R30 -# 124: R31 -#------------------------------------------------------------- - -#------------------------------------------------------------- -# asm_save_context: -#------------------------------------------------------------- -.macro asm_save_context - - l.nop - l.nop - - # Adjust SP (frame size is 128 + allow for 128 uncommitted in-use stack) - l.addi r1, r1, -256 - - # Save register file to stack - l.sw 124(r1), r31 - l.sw 120(r1), r30 - l.sw 116(r1), r29 - l.sw 112(r1), r28 - l.sw 108(r1), r27 - l.sw 104(r1), r26 - l.sw 100(r1), r25 - l.sw 96(r1), r24 - l.sw 92(r1), r23 - l.sw 88(r1), r22 - l.sw 84(r1), r21 - l.sw 80(r1), r20 - l.sw 76(r1), r19 - l.sw 72(r1), r18 - l.sw 68(r1), r17 - l.sw 64(r1), r16 - l.sw 60(r1), r15 - l.sw 56(r1), r14 - l.sw 52(r1), r13 - l.sw 48(r1), r12 - l.sw 44(r1), r11 - l.sw 40(r1), r10 - l.sw 36(r1), r9 - l.sw 32(r1), r8 - l.sw 28(r1), r7 - l.sw 24(r1), r6 - l.sw 20(r1), r5 - l.sw 16(r1), r4 - l.sw 12(r1), r3 - l.sw 8(r1), r2 - - # R10 = ESR - l.mfspr r10, r0, 64 - l.sw 4(r1), r10 - - # R10 = EPC - l.mfspr r10, r0, 32 - l.sw 0(r1), r10 - -.endm - -#------------------------------------------------------------- -# asm_load_context: -#------------------------------------------------------------- -.macro asm_load_context - - # Restore EPC (PC of non-exception code) - l.lwz r10, 0(r1) - - # EPC = R10 - l.mtspr r0,r10,32 - - # Restore ESR (SR of non-exception code) - l.lwz r10, 4(r1) - - # ESR = R10 - l.mtspr r0,r10,64 - - # Restore register set - # r1/r1 already set - l.lwz r2, 8(r1) - l.lwz r3, 12(r1) - l.lwz r4, 16(r1) - l.lwz r5, 20(r1) - l.lwz r6, 24(r1) - l.lwz r7, 28(r1) - l.lwz r8, 32(r1) - l.lwz r9, 36(r1) - l.lwz r10, 40(r1) - l.lwz r11, 44(r1) - l.lwz r12, 48(r1) - l.lwz r13, 52(r1) - l.lwz r14, 56(r1) - l.lwz r15, 60(r1) - l.lwz r16, 64(r1) - l.lwz r17, 68(r1) - l.lwz r18, 72(r1) - l.lwz r19, 76(r1) - l.lwz r20, 80(r1) - l.lwz r21, 84(r1) - l.lwz r22, 88(r1) - l.lwz r23, 92(r1) - l.lwz r24, 96(r1) - l.lwz r25,100(r1) - l.lwz r26,104(r1) - l.lwz r27,108(r1) - l.lwz r28,112(r1) - l.lwz r29,116(r1) - l.lwz r30,120(r1) - l.lwz r31,124(r1) - - # Adjust SP past register set - l.addi r1, r1, +256 - - # Return from interrupt (to restore PC & SR) - l.rfe - l.nop - -.endm Index: sw/rtos/arch/altor32 =================================================================== --- sw/rtos/arch/altor32 (revision 21) +++ sw/rtos/arch/altor32 (nonexistent)

sw/rtos/arch/altor32 Property changes : Deleted: bugtraq:number ## -1 +0,0 ## -true \ No newline at end of property Index: sw/rtos/arch =================================================================== --- sw/rtos/arch (revision 21) +++ sw/rtos/arch (nonexistent)

sw/rtos/arch Property changes : Deleted: bugtraq:number ## -1 +0,0 ## -true \ No newline at end of property Index: sw/rtos =================================================================== --- sw/rtos (revision 21) +++ sw/rtos (nonexistent)

sw/rtos Property changes : Deleted: bugtraq:number ## -1 +0,0 ## -true \ No newline at end of property

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