URL
https://opencores.org/ocsvn/amber/amber/trunk
Subversion Repositories amber
Compare Revisions
- This comparison shows the changes necessary to convert path
/amber
- from Rev 83 to Rev 82
- ↔ Reverse comparison
Rev 83 → Rev 82
/trunk/hw/tests/and.S
60,11 → 60,12
// should not unset the V flag value |
ands r2, r1, #0x00000055 |
|
// Check the V flag is still set, the Z flag is clear, the C flag |
// gets cleared, and the N flag gets cleared |
// Check the V flag is still set, the Z flag is clear the C flag |
// gets the carry out value from the barrel shifter, which is |
// the C flag in this case, and the N flag gets cleared |
bvc testfail |
beq testfail |
bcs testfail |
bcc testfail |
bmi testfail |
|
tst r2, #0x00000050 |
/trunk/hw/tests/tst.S
61,10 → 61,11
tst r1, #0 |
|
// Check the V flag and Z flag are still set, the C flag |
// is clear, and the N flag gets cleared |
// gets the carry out value from the barrel shifter, which is |
// the C flag in this case, and the N flag gets cleared |
bvc testfail |
bne testfail |
bcs testfail |
bcc testfail |
bmi testfail |
|
// Test "Strange issue with r12 after TEQLSP" |
81,21 → 82,9
ldrls r3, [r9,r6,lsl #2] |
movls r4, r11 |
movhi r3, #0 |
teqp r1, r2 // r1 XOR r2 = 0x1 -> sets the mode bits of the PC to 1 |
teqp r1, r2 // r1 XOR r2 = 0x1 -> sets the mode bits of the PC to 1 |
mov r12, r6 // normal r12 or FIRQ r12 ? |
|
|
// test if carry flag correctly set |
// set the carry up |
mov r1, #0xffffffff |
adds r1, r1, #1 |
|
// do the test |
mov r1, #0x00800000 |
tst r1, #0x00ff0000 |
movcc r0, #0 |
movcs r0, #1 |
|
b testpass |
|
testfail: |
/trunk/hw/vlog/amber23/a23_decode.v
86,7 → 86,6
output reg [1:0] o_barrel_shift_data_sel = 'd0, |
output reg [1:0] o_barrel_shift_function = 'd0, |
output reg [8:0] o_alu_function = 'd0, |
output reg o_use_carry_in = 'd0, |
output reg [1:0] o_multiply_function = 'd0, |
output reg [2:0] o_interrupt_vector_sel = 'd0, |
output reg [3:0] o_address_sel = 4'd2, |
201,7 → 200,6
|
reg [1:0] barrel_shift_function_nxt; |
wire [8:0] alu_function_nxt; |
reg use_carry_in_nxt; |
reg [1:0] multiply_function_nxt; |
reg [1:0] status_bits_mode_nxt; |
reg status_bits_irq_mask_nxt; |
614,7 → 612,6
barrel_shift_amount_sel_nxt = 'd0; // don't shift the input |
barrel_shift_data_sel_nxt = 'd0; // immediate value |
barrel_shift_function_nxt = 'd0; |
use_carry_in_nxt = 'd0; |
multiply_function_nxt = 'd0; |
address_sel_nxt = 'd0; |
pc_sel_nxt = 'd0; |
684,7 → 681,6
begin |
alu_out_sel_nxt = 4'd1; // Add |
alu_cin_sel_nxt = 2'd2; // carry in from status_bits |
use_carry_in_nxt = 1'd1; |
end |
|
if ( opcode == SUB || opcode == CMP ) // Subtract |
703,7 → 699,6
alu_out_sel_nxt = 4'd1; // Add |
alu_cin_sel_nxt = 2'd2; // carry in from status_bits |
alu_not_sel_nxt = 1'd1; // invert B |
use_carry_in_nxt = 1'd1; |
end |
|
if ( opcode == RSB ) // Reverse Subtract |
720,7 → 715,6
alu_cin_sel_nxt = 2'd2; // carry in from status_bits |
alu_not_sel_nxt = 1'd1; // invert B |
alu_swap_sel_nxt = 1'd1; // swap A and B |
use_carry_in_nxt = 1'd1; |
end |
|
if ( opcode == AND || opcode == TST ) // Logical AND, Test (using AND operator) |
1549,7 → 1543,6
o_barrel_shift_data_sel <= barrel_shift_data_sel_nxt; |
o_barrel_shift_function <= barrel_shift_function_nxt; |
o_alu_function <= alu_function_nxt; |
o_use_carry_in <= use_carry_in_nxt; |
o_multiply_function <= multiply_function_nxt; |
o_interrupt_vector_sel <= next_interrupt; |
o_address_sel <= address_sel_nxt; |
/trunk/hw/vlog/amber23/a23_execute.v
85,7 → 85,6
input i_shift_imm_zero, |
input [3:0] i_condition, |
input i_exclusive_exec, // swap access |
input i_use_carry_in, // e.g. add with carry instruction |
|
input [3:0] i_rm_sel, |
input [3:0] i_rds_sel, |
197,9 → 196,6
wire [31:0] alu_out_pc_filtered; |
wire adex_nxt; |
|
wire carry_in; |
|
|
// ======================================================== |
// Status Bits in PC register |
// ======================================================== |
475,9 → 471,6
// ======================================================== |
// Instantiate Barrel Shift |
// ======================================================== |
|
assign carry_in = i_use_carry_in ? status_bits_flags[1] : 1'd0; |
|
`ifndef ALTERA_FPGA |
a23_barrel_shift u_barrel_shift ( |
`else |
484,7 → 477,7
a23_barrel_shift_fpga u_barrel_shift ( |
`endif |
.i_in ( barrel_shift_in ), |
.i_carry_in ( carry_in ), |
.i_carry_in ( status_bits_flags[1] ), |
.i_shift_amount ( shift_amount ), |
.i_shift_imm_zero ( i_shift_imm_zero ), |
.i_function ( i_barrel_shift_function ), |
/trunk/hw/vlog/amber23/a23_core.v
105,8 → 105,7
wire [3:0] rn_sel_nxt; |
wire [1:0] barrel_shift_amount_sel; |
wire [1:0] barrel_shift_data_sel; |
wire [1:0] barrel_shift_function; |
wire use_carry_in; |
wire [1:0] barrel_shift_function; |
wire [8:0] alu_function; |
wire [1:0] multiply_function; |
wire [2:0] interrupt_vector_sel; |
227,7 → 226,6
.o_barrel_shift_amount_sel ( barrel_shift_amount_sel ), |
.o_barrel_shift_data_sel ( barrel_shift_data_sel ), |
.o_barrel_shift_function ( barrel_shift_function ), |
.o_use_carry_in ( use_carry_in ), |
.o_alu_function ( alu_function ), |
.o_multiply_function ( multiply_function ), |
.o_interrupt_vector_sel ( interrupt_vector_sel ), |
307,7 → 305,6
.i_barrel_shift_amount_sel ( barrel_shift_amount_sel ), |
.i_barrel_shift_data_sel ( barrel_shift_data_sel ), |
.i_barrel_shift_function ( barrel_shift_function ), |
.i_use_carry_in ( use_carry_in ), |
.i_alu_function ( alu_function ), |
.i_multiply_function ( multiply_function ), |
.i_interrupt_vector_sel ( interrupt_vector_sel ), |
/trunk/hw/vlog/amber23/a23_alu.v
49,7 → 49,7
input [8:0] i_function, |
|
output [31:0] o_out, |
output [3:0] o_flags // negative, zero, carry, overflow |
output [3:0] o_flags |
); |
|
wire [31:0] a, b, b_not; |
/trunk/hw/vlog/amber25/a25_decode.v
94,7 → 94,6
output reg [2:0] o_reg_write_sel, |
output reg o_user_mode_regs_store_nxt, |
output reg o_firq_not_user_mode, |
output reg o_use_carry_in, |
|
output reg o_write_data_wen = 'd0, |
output reg o_base_address_wen = 'd0, // save ldm base address register |
221,7 → 220,6
reg [2:0] status_bits_sel_nxt; |
reg [2:0] reg_write_sel_nxt; |
wire firq_not_user_mode_nxt; |
reg use_carry_in_nxt; |
|
// ALU Function signals |
reg alu_swap_sel_nxt; |
746,8 → 744,7
// default Mux Select values |
barrel_shift_amount_sel_nxt = 'd0; // don't shift the input |
barrel_shift_data_sel_nxt = 'd0; // immediate value |
barrel_shift_function_nxt = 'd0; |
use_carry_in_nxt = 'd0; |
barrel_shift_function_nxt = 'd0; |
multiply_function_nxt = 'd0; |
iaddress_sel_nxt = 'd0; |
daddress_sel_nxt = 'd0; |
821,7 → 818,6
begin |
alu_out_sel_nxt = 4'd1; // Add |
alu_cin_sel_nxt = 2'd2; // carry in from status_bits |
use_carry_in_nxt = 1'd1; |
end |
|
if ( opcode == SUB || opcode == CMP ) // Subtract |
840,7 → 836,6
alu_out_sel_nxt = 4'd1; // Add |
alu_cin_sel_nxt = 2'd2; // carry in from status_bits |
alu_not_sel_nxt = 1'd1; // invert B |
use_carry_in_nxt = 1'd1; |
end |
|
if ( opcode == RSB ) // Reverse Subtract |
849,7 → 844,6
alu_cin_sel_nxt = 2'd1; // cin = 1 |
alu_not_sel_nxt = 1'd1; // invert B |
alu_swap_sel_nxt = 1'd1; // swap A and B |
use_carry_in_nxt = 1'd1; |
end |
|
if ( opcode == RSC ) // Reverse Subtract with carry |
1612,7 → 1606,6
o_barrel_shift_data_sel <= barrel_shift_data_sel_nxt; |
o_barrel_shift_function <= barrel_shift_function_nxt; |
o_alu_function <= alu_function_nxt; |
o_use_carry_in <= use_carry_in_nxt; |
o_multiply_function <= multiply_function_nxt; |
o_interrupt_vector_sel <= next_interrupt; |
o_iaddress_sel <= iaddress_sel_nxt; |
/trunk/hw/vlog/amber25/a25_execute.v
106,9 → 106,9
input [1:0] i_byte_enable_sel, |
input [2:0] i_status_bits_sel, |
input [2:0] i_reg_write_sel, |
// input i_user_mode_regs_load, |
input i_user_mode_regs_store_nxt, |
input i_firq_not_user_mode, |
input i_use_carry_in, // e.g. add with carry instruction |
|
input i_write_data_wen, |
input i_base_address_wen, // save LDM base address register, |
214,9 → 214,6
wire ldm_flags; |
wire ldm_status_bits; |
|
wire carry_in; |
|
|
// ======================================================== |
// Status Bits in PC register |
// ======================================================== |
561,12 → 558,10
// ======================================================== |
// Instantiate Barrel Shift |
// ======================================================== |
assign carry_in = i_use_carry_in ? status_bits_flags[1] : 1'd0; |
|
a25_barrel_shift u_barrel_shift ( |
.i_clk ( i_clk ), |
.i_in ( barrel_shift_in ), |
.i_carry_in ( carry_in ), |
.i_carry_in ( status_bits_flags[1] ), |
.i_shift_amount ( shift_amount ), |
.i_shift_imm_zero ( i_shift_imm_zero ), |
.i_function ( i_barrel_shift_function ), |
/trunk/hw/vlog/amber25/a25_core.v
122,7 → 122,7
wire [2:0] reg_write_sel; |
wire user_mode_regs_store_nxt; |
wire firq_not_user_mode; |
wire use_carry_in; |
|
wire write_data_wen; |
wire copro_write_data_wen; |
wire base_address_wen; |
264,7 → 264,6
.o_reg_write_sel ( reg_write_sel ), |
.o_user_mode_regs_store_nxt ( user_mode_regs_store_nxt ), |
.o_firq_not_user_mode ( firq_not_user_mode ), |
.o_use_carry_in ( use_carry_in ), |
.o_write_data_wen ( write_data_wen ), |
.o_base_address_wen ( base_address_wen ), |
.o_pc_wen ( pc_wen ), |
357,8 → 356,7
.i_status_bits_sel ( status_bits_sel ), |
.i_reg_write_sel ( reg_write_sel ), |
.i_user_mode_regs_store_nxt ( user_mode_regs_store_nxt ), |
.i_firq_not_user_mode ( firq_not_user_mode ), |
.i_use_carry_in ( use_carry_in ), |
.i_firq_not_user_mode ( firq_not_user_mode ), |
.i_write_data_wen ( write_data_wen ), |
.i_base_address_wen ( base_address_wen ), |
.i_pc_wen ( pc_wen ), |
trunk/hw
Property changes :
Deleted: svn:ignore
## -1,2 +0,0 ##
-msim
-