URL
https://opencores.org/ocsvn/amber/amber/trunk
Subversion Repositories amber
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- This comparison shows the changes necessary to convert path
/amber
- from Rev 86 to Rev 85
- ↔ Reverse comparison
Rev 86 → Rev 85
/trunk/hw/vlog/amber25/a25_execute.v
185,8 → 185,8
wire [31:0] read_data_filtered; |
wire [31:0] read_data_filtered_c; |
reg [31:0] read_data_filtered_r = 'd0; |
reg [5:0] load_rd_r = 'd0; |
wire [5:0] load_rd_c; |
reg [3:0] load_rd_r = 'd0; |
wire [3:0] load_rd_c; |
|
wire write_enable_nxt; |
wire daddress_valid_nxt; |
483,10 → 483,10
// ======================================================== |
// Use read value from data memory instead of from register |
// ======================================================== |
assign rn = i_rn_use_read && i_rn_sel == load_rd_c[3:0] && status_bits_mode == load_rd_c[5:4] ? read_data_filtered_c : reg_bank_rn; |
assign rm = i_rm_use_read && i_rm_sel == load_rd_c[3:0] && status_bits_mode == load_rd_c[5:4] ? read_data_filtered_c : reg_bank_rm; |
assign rs = i_rs_use_read && i_rs_sel == load_rd_c[3:0] && status_bits_mode == load_rd_c[5:4] ? read_data_filtered_c : reg_bank_rs; |
assign rd = i_rd_use_read && i_rs_sel == load_rd_c[3:0] && status_bits_mode == load_rd_c[5:4] ? read_data_filtered_c : reg_bank_rd; |
assign rn = i_rn_use_read && i_rn_sel == load_rd_c ? read_data_filtered_c : reg_bank_rn; |
assign rm = i_rm_use_read && i_rm_sel == load_rd_c ? read_data_filtered_c : reg_bank_rm; |
assign rs = i_rs_use_read && i_rs_sel == load_rd_c ? read_data_filtered_c : reg_bank_rs; |
assign rd = i_rd_use_read && i_rs_sel == load_rd_c ? read_data_filtered_c : reg_bank_rd; |
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always@( posedge i_clk ) |
493,15 → 493,13
if ( i_wb_read_data_valid ) |
begin |
read_data_filtered_r <= read_data_filtered; |
load_rd_r <= {i_wb_load_rd[6:5], i_wb_load_rd[3:0]}; |
load_rd_r <= i_wb_load_rd[3:0]; |
end |
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assign read_data_filtered_c = i_wb_read_data_valid ? read_data_filtered : read_data_filtered_r; |
assign load_rd_c = i_wb_read_data_valid ? i_wb_load_rd[3:0] : load_rd_r; |
|
// the register number and the mode |
assign load_rd_c = i_wb_read_data_valid ? {i_wb_load_rd[6:5], i_wb_load_rd[3:0]} : load_rd_r; |
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// ======================================================== |
// Set mode for the destination registers of a mem read |
// ======================================================== |
/trunk/hw/tests/ldm5.S
48,8 → 48,8
ldmia r13!,{r1-r14}^ // load into user mode registers |
|
// supervisor r14 value should be unchanged |
//nop |
//nop |
nop |
nop |
mov r0, r14 |
cmp r0, #100 |
beq testpass |
/trunk/hw/fpga/bin/Makefile
90,10 → 90,10
# Divide 800MHz by this number to get the frequency |
# e.g. AMBER_CLK_DIVIDER=24 |
# 800 MHz / 24 = 33.33 MHz |
AMBER_CLK_DIVIDER ?= 20 |
|
# The spartan6 device used on SP605 Development board |
XILINX_FPGA = xc6slx45tfgg484-3 |
XST_DEFINES = XILINX_FPGA XILINX_SPARTAN6_FPGA $(AMBER_CORE) AMBER_CLK_DIVIDER=$(AMBER_CLK_DIVIDER) $(BOOT_LOADER_DEF) |
XST_DEFINES = XILINX_FPGA XILINX_SPARTAN6_FPGA $(AMBER_CORE) AMBER_CLK_DIVIDER=20 $(BOOT_LOADER_DEF) |
# Xilinx placement and timing constraints |
XST_CONST_FILE = xs6_constraints.ucf |
# List of verilog source files for Xilinx Spartan-6 device |