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URL https://opencores.org/ocsvn/amber/amber/trunk

Subversion Repositories amber

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /amber
    from Rev 88 to Rev 87
    ↔ Reverse comparison
  •

Rev 88 → Rev 87

/trunk/hw/vlog/amber23/a23_decode.v
198,7 → 198,6
wire [3:0] condition_nxt;
reg exclusive_exec_nxt;
reg data_access_exec_nxt;
wire shift_extend;
 
reg [1:0] barrel_shift_function_nxt;
wire [8:0] alu_function_nxt;
/trunk/hw/vlog/amber23/a23_execute.v
149,7 → 149,6
wire [31:0] barrel_shift_in;
wire [31:0] barrel_shift_out;
wire barrel_shift_carry;
wire barrel_shift_carry_alu;
 
wire [3:0] status_bits_flags_nxt;
reg [3:0] status_bits_flags = 'd0;
491,27 → 490,29
.i_function ( i_barrel_shift_function ),
 
.o_out ( barrel_shift_out ),
.o_carry_out ( barrel_shift_carry ));
.o_carry_out ( barrel_shift_carry )
);
 
 
wire barrel_shift_carry_real;
assign barrel_shift_carry_real = i_barrel_shift_data_sel == 2'd0 ?
(i_imm_shift_amount[4:1] == 0 ? status_bits_flags[1] : i_imm32[31]) :
barrel_shift_carry;
 
// ========================================================
// Instantiate ALU
// ========================================================
assign barrel_shift_carry_alu = i_barrel_shift_data_sel == 2'd0 ?
(i_imm_shift_amount[4:1] == 0 ? status_bits_flags[1] : i_imm32[31]) :
barrel_shift_carry;
 
a23_alu u_alu (
.i_a_in ( rn ),
.i_b_in ( barrel_shift_out ),
.i_barrel_shift_carry ( barrel_shift_carry_alu ),
.i_status_bits_carry ( status_bits_flags[1] ),
.i_function ( i_alu_function ),
.o_out ( alu_out ),
.o_flags ( alu_flags ));
.i_a_in ( rn ),
.i_b_in ( barrel_shift_out ),
//.i_barrel_shift_carry ( barrel_shift_carry ),
.i_barrel_shift_carry ( barrel_shift_carry_real ),
.i_status_bits_carry ( status_bits_flags[1] ),
.i_function ( i_alu_function ),
 
.o_out ( alu_out ),
.o_flags ( alu_flags )
);
 
 
// ========================================================
/trunk/hw/vlog/amber25/a25_execute.v
158,7 → 158,6
wire [31:0] barrel_shift_out;
wire barrel_shift_carry;
wire barrel_shift_stall;
wire barrel_shift_carry_alu;
 
wire [3:0] status_bits_flags_nxt;
reg [3:0] status_bits_flags = 'd0;
576,28 → 575,25
 
.o_out ( barrel_shift_out ),
.o_carry_out ( barrel_shift_carry ),
.o_stall ( barrel_shift_stall ));
.o_stall ( barrel_shift_stall )
);
 
 
// ========================================================
// Instantiate ALU
// ========================================================
assign barrel_shift_carry_alu = i_barrel_shift_data_sel == 2'd0 ?
(i_imm_shift_amount[4:1] == 0 ? status_bits_flags[1] : i_imm32[31]) :
barrel_shift_carry;
a25_alu u_alu (
.i_a_in ( rn ),
.i_b_in ( barrel_shift_out ),
.i_barrel_shift_carry ( barrel_shift_carry_alu ),
.i_status_bits_carry ( status_bits_flags[1] ),
.i_function ( i_alu_function ),
.i_a_in ( rn ),
.i_b_in ( barrel_shift_out ),
.i_barrel_shift_carry ( barrel_shift_carry ),
.i_status_bits_carry ( status_bits_flags[1] ),
.i_function ( i_alu_function ),
 
.o_out ( alu_out ),
.o_flags ( alu_flags ));
.o_out ( alu_out ),
.o_flags ( alu_flags )
);
 
 
 
// ========================================================
// Instantiate Booth 64-bit Multiplier-Accumulator
// ========================================================
/trunk/hw/vlog/amber25/a25_decode.v
200,7 → 200,6
reg decode_exclusive_nxt;
reg decode_iaccess_nxt;
reg decode_daccess_nxt;
wire shift_extend;
 
reg [1:0] barrel_shift_function_nxt;
wire [8:0] alu_function_nxt;
448,8 → 447,6
assign load_rd_byte = (type == TRANS || type == SWAP) && instruction[22];
assign load_rd_nxt = {ldm_flags, ldm_status_bits, ldm_user_mode, load_rd_byte, rs_sel_nxt};
 
// this is used for RRX
assign shift_extend = !instruction[25] && !instruction[4] && !(|instruction[11:7]) && instruction[6:5] == 2'b11;
 
// MSB indicates valid dirty target register
assign load_rd_d1_nxt = {o_decode_daccess && !o_write_data_wen, o_load_rd[3:0]};
818,7 → 815,6
if ( opcode == ADD || opcode == CMN ) // CMN is just like an ADD
begin
alu_out_sel_nxt = 4'd1; // Add
use_carry_in_nxt = shift_extend;
end
if ( opcode == ADC ) // Add with Carry
825,7 → 821,7
begin
alu_out_sel_nxt = 4'd1; // Add
alu_cin_sel_nxt = 2'd2; // carry in from status_bits
use_carry_in_nxt = shift_extend;
use_carry_in_nxt = 1'd1;
end
if ( opcode == SUB || opcode == CMP ) // Subtract
862,7 → 858,6
alu_cin_sel_nxt = 2'd2; // carry in from status_bits
alu_not_sel_nxt = 1'd1; // invert B
alu_swap_sel_nxt = 1'd1; // swap A and B
use_carry_in_nxt = 1'd1;
end
if ( opcode == AND || opcode == TST ) // Logical AND, Test (using AND operator)
875,7 → 870,6
begin
alu_out_sel_nxt = 4'd6; // XOR
alu_cout_sel_nxt = 1'd1; // i_barrel_shift_carry
use_carry_in_nxt = 1'd1;
end
 
if ( opcode == ORR )
882,7 → 876,6
begin
alu_out_sel_nxt = 4'd7; // OR
alu_cout_sel_nxt = 1'd1; // i_barrel_shift_carry
use_carry_in_nxt = 1'd1;
end
if ( opcode == BIC ) // Bit Clear (using AND & NOT operators)
890,13 → 883,11
alu_out_sel_nxt = 4'd8; // AND
alu_not_sel_nxt = 1'd1; // invert B
alu_cout_sel_nxt = 1'd1; // i_barrel_shift_carry
use_carry_in_nxt = 1'd1;
end
end
if ( opcode == MOV ) // Move
begin
alu_cout_sel_nxt = 1'd1; // i_barrel_shift_carry
use_carry_in_nxt = 1'd1;
end
if ( opcode == MVN ) // Move NOT
903,8 → 894,7
begin
alu_not_sel_nxt = 1'd1; // invert B
alu_cout_sel_nxt = 1'd1; // i_barrel_shift_carry
use_carry_in_nxt = 1'd1;
end
end
end
// Load & Store instructions

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