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URL https://opencores.org/ocsvn/astron_mm/astron_mm/trunk

Subversion Repositories astron_mm

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  • This comparison shows the changes necessary to convert path 
    /astron_mm
    from Rev 3 to Rev 4
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  •

Rev 3 → Rev 4

/trunk/common_mem_mux.vhd
56,10 → 56,10
-------------------------------------------------------------------------------
 
 
LIBRARY IEEE, common_pkg_lib, common_ram_lib;
LIBRARY IEEE, common_pkg_lib, astron_ram_lib;
USE IEEE.STD_LOGIC_1164.ALL;
USE common_pkg_lib.common_pkg.ALL;
USE common_ram_lib.common_ram_pkg.ALL;
USE astron_ram_lib.common_ram_pkg.ALL;
 
ENTITY common_mem_mux IS
GENERIC (
/trunk/common_reg_cross_domain.vhd
18,11 → 18,11
--
-------------------------------------------------------------------------------
 
LIBRARY IEEE, common_pkg_lib, common_components_lib, common_ram_lib;
LIBRARY IEEE, common_pkg_lib, common_components_lib, astron_ram_lib;
USE IEEE.std_logic_1164.ALL;
USE IEEE.numeric_std.ALL;
USE common_pkg_lib.common_pkg.ALL;
USE common_ram_lib.common_ram_pkg.ALL;
USE astron_ram_lib.common_ram_pkg.ALL;
 
-- Purpose: Get in_dat from in_clk to out_clk domain when in_new is asserted.
-- Remarks:
/trunk/common_reg_r_w.vhd
18,11 → 18,11
--
-------------------------------------------------------------------------------
 
LIBRARY IEEE, common_pkg_lib, common_components_lib, common_ram_lib;
LIBRARY IEEE, common_pkg_lib, common_components_lib, astron_ram_lib;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.numeric_std.ALL;
USE common_pkg_lib.common_pkg.ALL;
USE common_ram_lib.common_ram_pkg.ALL;
USE astron_ram_lib.common_ram_pkg.ALL;
 
-- Derived from LOFAR cfg_single_reg
 
/trunk/common_reg_r_w_dc.vhd
44,10 → 44,10
-- g_mm_readback could define direct read back in the MM clock domain and
-- would allow leaving the in_reg not connected.
 
LIBRARY IEEE, common_pkg_lib, common_components_lib, common_ram_lib;
LIBRARY IEEE, common_pkg_lib, common_components_lib, astron_ram_lib;
USE IEEE.STD_LOGIC_1164.ALL;
USE common_pkg_lib.common_pkg.ALL;
USE common_ram_lib.common_ram_pkg.ALL;
USE astron_ram_lib.common_ram_pkg.ALL;
 
ENTITY common_reg_r_w_dc IS
GENERIC (
/trunk/hdllib.cfg
1,6 → 1,6
hdl_lib_name = mm
hdl_library_clause_name = mm_lib
hdl_lib_uses_synth = common_pkg common_components common_ram
hdl_lib_name = astron_mm
hdl_library_clause_name = astron_mm_lib
hdl_lib_uses_synth = common_pkg common_components astron_ram
hdl_lib_uses_sim =
hdl_lib_technology =
 
/trunk/mm_fields.vhd
63,11 → 63,11
-- . reg_reg_slv_in_arr, reg_slv_in, reg_slv_out = 3*c_word_w bits wide
-- Remarks:
 
LIBRARY IEEE, common_pkg_lib, common_ram_lib;
LIBRARY IEEE, common_pkg_lib, astron_ram_lib;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.NUMERIC_STD.ALL;
USE common_pkg_lib.common_pkg.ALL;
USE common_ram_lib.common_ram_pkg.ALL;
USE astron_ram_lib.common_ram_pkg.ALL;
USE work.common_field_pkg.ALL;
 
ENTITY mm_fields IS
/trunk/mm_file.vhd
75,12 → 75,12
-- limits the number of file handlers and may help to improve the simulation
-- speed (and stability).
--
LIBRARY IEEE, common_pkg_lib, common_ram_lib;
LIBRARY IEEE, common_pkg_lib, astron_ram_lib;
USE IEEE.std_logic_1164.ALL;
USE IEEE.numeric_std.ALL;
USE common_pkg_lib.common_pkg.ALL;
USE common_pkg_lib.tb_common_pkg.ALL;
USE common_ram_lib.common_ram_pkg.ALL;
USE astron_ram_lib.common_ram_pkg.ALL;
USE work.tb_common_mem_pkg.ALL;
USE common_pkg_lib.common_str_pkg.ALL;
USE work.mm_file_pkg.ALL;
/trunk/mm_file_pkg.vhd
111,12 → 111,12
-- access depends on the tb. Due to falling_edge(mm_clk) in mmf_wait_for_file_*()
-- all subsequent accesses will start at falling_edge(mm_clk)
LIBRARY IEEE, common_pkg_lib, common_ram_lib;
LIBRARY IEEE, common_pkg_lib, astron_ram_lib;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.NUMERIC_STD.ALL;
USE common_pkg_lib.common_pkg.ALL;
USE common_pkg_lib.tb_common_pkg.ALL;
USE common_ram_lib.common_ram_pkg.ALL;
USE astron_ram_lib.common_ram_pkg.ALL;
USE work.tb_common_mem_pkg.ALL;
USE std.textio.ALL;
USE IEEE.std_logic_textio.ALL;
/trunk/tb_common_mem_mux.vhd
18,11 → 18,11
--
-------------------------------------------------------------------------------
 
LIBRARY IEEE, common_pkg_lib, common_ram_lib;
LIBRARY IEEE, common_pkg_lib, astron_ram_lib;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.NUMERIC_STD.ALL;
USE common_pkg_lib.common_pkg.ALL;
USE common_ram_lib.common_ram_pkg.ALL;
USE astron_ram_lib.common_ram_pkg.ALL;
USE common_pkg_lib.tb_common_pkg.ALL;
USE work.tb_common_mem_pkg.ALL;
 
91,7 → 91,7
END PROCESS;
 
generation_of_test_rams : FOR I IN 0 TO g_nof_mosi-1 GENERATE
u_test_rams : ENTITY common_ram_lib.common_ram_r_w
u_test_rams : ENTITY astron_ram_lib.common_ram_r_w
GENERIC MAP (
g_ram => c_test_ram,
g_init_file => "UNUSED"
/trunk/tb_common_mem_pkg.vhd
18,10 → 18,10
--
-------------------------------------------------------------------------------
 
LIBRARY IEEE, common_pkg_lib, common_ram_lib;
LIBRARY IEEE, common_pkg_lib, astron_ram_lib;
USE IEEE.std_logic_1164.ALL;
USE common_pkg_lib.common_pkg.ALL;
USE common_ram_lib.common_ram_pkg.ALL;
USE astron_ram_lib.common_ram_pkg.ALL;
 
 
PACKAGE tb_common_mem_pkg IS
/trunk/tb_mm_file.vhd
41,11 → 41,11
-- The tb is self stopping and self checking.
-- For example observe mm_mosi, mm_miso, rd_now and out_reg_arr in wave window.
 
LIBRARY IEEE, common_pkg_lib, common_ram_lib;
LIBRARY IEEE, common_pkg_lib, astron_ram_lib;
USE IEEE.std_logic_1164.ALL;
USE IEEE.numeric_std.ALL;
USE common_pkg_lib.common_pkg.ALL;
USE common_ram_lib.common_ram_pkg.ALL;
USE astron_ram_lib.common_ram_pkg.ALL;
USE common_pkg_lib.common_str_pkg.ALL;
USE common_pkg_lib.tb_common_pkg.ALL;
USE work.mm_file_pkg.ALL;

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