URL
https://opencores.org/ocsvn/avalon-wishbone-bridge/avalon-wishbone-bridge/trunk
Subversion Repositories avalon-wishbone-bridge
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/avalon-wishbone-bridge
- from Rev 1 to Rev 2
- ↔ Reverse comparison
Rev 1 → Rev 2
/trunk/RTL/av2wb.sv
0,0 → 1,118
module av2wb #(AW=32,DW=64,TW=2,MAX_OUTSTANDING=2) (input clk,input rst_n,avalon_if.s_cb av, wb_if.m_drv_cb wb); |
parameter STALL=2'b01, |
TRANSFER=2'b10; |
|
logic [1:0] state, n_state; |
logic av_valid,wb_ready; |
always @* av_valid = av.chipselect && (av.read || av.write); |
logic [1:0] n_count,count,ack_reg; |
//conversion of req-ack to enable |
//always @(wb.stb or wb.ack) begin |
always @* begin |
// case({wb.stb,wb.ack}) |
// 2'b10: if(state ==TRANSFER) n_count<=count+1; |
// 2'b11: if(state ==TRANSFER) n_count<=count; else n_count<=count-1; |
// 2'b01: n_count<=count-1; |
// default: n_count<=count; |
// endcase |
if(n_count< MAX_OUTSTANDING) |
wb_ready <=1'b1; |
else if(state==STALL || state ==TRANSFER) |
wb_ready <=1'b0; |
end |
|
|
always @(posedge clk or negedge rst_n) |
if(!rst_n) begin |
state <=STALL; |
count<='0; |
end |
else begin |
state <=n_state; |
count<=n_count; |
end |
|
|
|
//always @(state or av_valid or wb_ready or wb.stb) begin |
always @* begin |
n_state<='bx; |
|
n_count<=count; |
//do_stall; |
case(state) |
STALL: begin |
if(av_valid && wb_ready) |
n_state<=TRANSFER; |
else |
n_state<=STALL; |
//if(wb.ack) n_count<=count-1; |
//if(wb.ack) wb_ready<=1'b1; |
//else wb_ready<=1'b0; |
if(wb.ack==1'b1) |
n_count<=count-1; |
else |
n_count<=count; |
|
end |
|
TRANSFER: begin |
if(av_valid && wb_ready) |
n_state<=TRANSFER; |
else |
n_state<=STALL; |
//do_transfer; |
//if(!wb.ack) n_count<=count+1; |
//if(wb.ack) wb_ready<=1'b1; |
//else wb_ready<=1'b0; |
if(wb.ack==1'b1) |
n_count<=count; |
else |
n_count<=count+1; |
|
end |
endcase |
end |
|
always @(posedge clk or negedge rst_n) |
if(!rst_n) do_stall; |
else begin |
case(state) |
STALL:do_stall(); |
TRANSFER:do_transfer(); |
default: do_stall(); |
endcase |
end |
always @* begin |
av.waitrequest<=!(wb_ready); |
av.readdata<=wb.dat_i; |
av.readdatavalid<=wb.ack; |
|
end |
task do_stall; |
|
wb.dat_o<='0; |
wb.tgd_o<='0; |
wb.adr<='0; |
//wb.cyc<=!(wb_ready); |
wb.cyc<=count[1] || count[0]; |
wb.lock<=1'b0; |
wb.sel<=av.byteenable; |
wb.stb<=!(wb_ready); |
//wb.stb<=1'b0; |
wb.tga<='0; |
wb.tgc<='0; |
wb.we<='0; |
endtask |
//task do_transfer(avalon_if.s_cb av, wishbone_b3_if.m_drv_cb wb); |
task do_transfer; |
wb.dat_i<=av.writedata; |
//wb.tgd_o<= av.tag; |
wb.adr<=av.address; |
wb.cyc<=1'b1; |
wb.stb<=1'b1; |
if(av.read) wb.we<=1'b0; |
else wb.we<=1'b1; |
endtask |
endmodule |
//task do_stall(avalon_if av, wishbone_b3_if wb); |
/trunk/UVM/Makefile
0,0 → 1,45
UVM_HOME=/comelec/softs/opt/mentor/modelsim/v10.5c/modeltech/verilog_src/uvm-1.1d |
# need to set for ld error -> LIBRARY_PATH=/usr/lib/x86_64-linux-gnu |
QUESTA_UVM_PKG=/comelec/softs/opt/mentor/modelsim/v10.4c/modeltech/verilog_src/questa_uvm_pkg-1.1d/src/ |
com: |
vlog +incdir+${UVM_HOME}/src dut_transaction.sv |
|
wo_dpi: |
vlog +define+QUESTA +incdir+${UVM_HOME}/src +define+UVM_NO_DPI +define+QUESTA +acc dut.sv tb.sv |
|
#when using uvm 1.2, quest_uvm pkg needs to be compiled separately |
w_dpi: |
vlog +define+QUESTA +incdir+${UVM_HOME}/src +acc avalon_m_if.sv dut.sv tb.sv |
mkdir -p lib |
g++ -m64 -fPIC -DQUESTA -g -W -shared -I/comelec/softs/opt/mentor/modelsim/v10.4c/modeltech/include/ ${UVM_HOME}/src/dpi/uvm_dpi.cc -o lib/uvm_dpi64.so |
#vlog +incdir+${UVM_HOME}/src +incdir+${QUESTA_UVM_PKG} ${QUESTA_UVM_PKG}/questa_uvm_pkg.sv |
#vsim -uvmcontrol=all +uvm_set_config_int=*,recording_detail,400 +define+QUESTA -sv_seed random -solvefaildebug -novopt -sv_lib ./lib/uvm_dpi64 +UVM_TESTNAME=av_test tb |
uvm11d: |
vlog +define+QUESTA +acc avalon_m_if.sv dut.sv tb.sv |
sim: |
vsim -uvmcontrol=all +uvm_set_config_int=*,recording_detail,400 +define+QUESTA -sv_seed random -solvefaildebug +UVM_TESTNAME=av_test tb |
qv: |
qverilog -uvmcontrol=all +uvm_set_config_int=*,recording_detail,400 +define+QUESTA +UVM_TESTNAME=av_test avalon_m_if.sv dut.sv tb.sv |
#vsim -uvmcontrol=all +uvm_set_config_int=*,recording_detail,400 +define+QUESTA +UVM_TESTNAME=av_test tb |
|
|
build: |
vlog wb_slave_agent/wb_if.sv |
vlog +incdir+./wb_slave_agent ./wb_slave_agent/wb_slave_agent_pkg.sv |
vlog ./av_master_agent/avalon_m_if.sv |
vlog +incdir+./av_master_agent ./av_master_agent/av_test_pkg.sv |
vlog env_pkg.sv |
vlog +acc ../RTL/av2wb1.sv tb.sv |
sim: |
vsim \ |
-c +uvm_set_config_int=\*,recording_detail,400 -uvmcontrol=all +define+QUESTA -sv_seed random \ |
-solvefaildebug \ |
+UVM_VERBOSITY=UVM_DEBUG \ |
tb \ |
-sv_seed 3138956347 \ |
-do "run -all" |
#fail 3053001672 \ |
#pass -sv_seed seed 3138956347 |
|
clean: |
rm -rf *.wlf transcript work *.xml |
/trunk/UVM/av_master_agent/av_agent.sv
0,0 → 1,32
import uvm_pkg::*; |
|
typedef uvm_sequencer#(av_mm_transaction#(32,64,2)) av_sequencer; |
class av_agent #(AW =32, DW=64, TW= 2) extends uvm_agent; |
|
av_config av_config_h; |
av_sequencer av_sequencer_h; |
av_driver#(AW,DW,TW) av_driver_h; |
|
|
function new(string name, uvm_component parent); |
super.new(name,parent); |
endfunction |
|
|
function void build_phase(uvm_phase phase); |
super.build_phase(phase); |
av_config_h=new(); |
av_sequencer_h=new("av_sequencer_h",this); |
av_driver_h=new("av_driver_h",this); |
// cntxt,inst_name,field_name,value |
if(!(uvm_config_db #(virtual avalon_if#(AW,DW,TW))::get(this,"","DUT_IF",av_config_h.mif))) |
`uvm_fatal("VIF CONFIG", "cannot get av interface"); |
endfunction |
|
function void connect_phase(uvm_phase phase); |
av_driver_h.seq_item_port.connect(av_sequencer_h.seq_item_export); |
av_driver_h.mif=av_config_h.mif; |
endfunction |
|
|
endclass |
/trunk/UVM/av_master_agent/av_config.sv
0,0 → 1,10
import uvm_pkg::*; |
class av_config extends uvm_object; |
|
virtual avalon_if mif; |
|
function new(string name="av_config"); |
super.new(name); |
endfunction |
|
endclass |
/trunk/UVM/av_master_agent/av_driver.sv
0,0 → 1,123
import uvm_pkg::*; |
|
class av_driver #(AW =32, DW=128, TW= 2) extends uvm_driver #(av_mm_transaction #(AW, DW, TW)); |
|
|
virtual avalon_if#(AW, DW, TW) mif; |
|
|
semaphore outstanding; |
|
function new(string name, uvm_component parent); |
super.new(name,parent); |
outstanding=new(1); |
endfunction |
|
|
|
function void build_phase(uvm_phase phase); |
super.build_phase(phase); |
endfunction |
|
|
task run_phase(uvm_phase phase); |
//phase.raise_objection(this); |
fork |
req_loop(); |
resp_loop(); |
join_none |
//phase.drop_objection(this); |
endtask |
task req_loop(); |
forever |
if (!mif.rst_n) begin |
wait_transaction(); |
repeat(5) @(posedge mif.m_cb); |
end |
else begin |
av_mm_transaction#(AW,DW,TW) tx; |
seq_item_port.get_next_item(tx); |
// to record transaction see webinar questa uvm debug |
//begin_tr(tx,"txd"); |
case(tx.dir) |
AVALON_RD: begin |
@(posedge mif.m_cb) |
while(mif.waitrequest!==1'b0) @(posedge mif.m_cb); |
wait_transaction(); |
outstanding.get(1); |
read_transaction(tx); |
//mif.read_transaction(tx.addr); |
$display ("RD ADDR=%d, stall_time=%f",tx.addr,tx.stall_time); |
end |
AVALON_WR: begin |
@(posedge mif.m_cb) |
while(mif.waitrequest!==1'b0) @(posedge mif.m_cb); |
write_transaction(tx); |
//mif.write_transaction(tx.addr,tx.data); |
`uvm_info ("","WR ADDR=%d",tx.addr); |
end |
AVALON_WAIT: begin |
@(posedge mif.m_cb) |
wait_transaction(); |
end |
default: `uvm_fatal(get_type_name(), $sformatf("Sequence item request unknown!") ) |
endcase |
//end |
//end_tr(tx); |
seq_item_port.item_done(); |
end |
endtask |
task resp_loop(); |
forever |
if (!mif.rst_n) begin |
repeat(5) @(posedge mif.m_cb); |
end |
else begin |
@(posedge mif.m_cb); |
if(mif.readdatavalid ==1'b1) outstanding.put(1); |
end |
|
endtask |
task read_transaction(av_mm_transaction #(32,64,2) seq); |
mif.address<=seq.addr; |
mif.byteenable<=8'hFF; |
mif.chipselect<=1'b1; |
mif.read<=1'b1; |
mif.write<=1'b0; |
//mif.readdata; |
mif.writedata<='0; |
//mif.waitrequest; |
//mif.readdatavalid; |
mif.burstcount<='0; |
mif.beginbursttransfer<=1'b0; |
endtask |
task write_transaction(av_mm_transaction #(32,64,2) seq); |
mif.address<=seq.addr; |
mif.byteenable<=8'hFF; |
mif.chipselect<=1'b1; |
mif.read<=1'b0; |
mif.write<=1'b1; |
//mif.readdata; |
mif.writedata<=seq.data; |
//mif.waitrequest; |
//mif.readdatavalid; |
mif.burstcount<='0; |
mif.beginbursttransfer<=1'b0; |
endtask |
task wait_transaction(); |
//if(outstanding.try_get(4)) |
begin |
mif.address<='0; |
mif.byteenable<=8'h00; |
mif.chipselect<=1'b0; |
mif.read<=1'b0; |
mif.write<=1'b0; |
//mif.readdata; |
mif.writedata<='0; |
//mif.waitrequest; |
//mif.readdatavalid; |
mif.burstcount<='0; |
mif.beginbursttransfer<=1'b0; |
end |
endtask |
endclass |
/trunk/UVM/av_master_agent/av_mm_transaction.sv
0,0 → 1,50
import uvm_pkg::*; |
|
|
|
class av_mm_transaction #(AW =32, DW=128, TW= 2) extends uvm_sequence_item; |
`uvm_object_utils(av_mm_transaction); |
rand t_direction dir; |
rand logic [AW-1:0] addr; |
rand logic [DW-1:0] data; |
rand logic [TW-1:0] tags; |
rand delay_t stall_time; |
constraint DIR {dir dist {AVALON_RD:=50,AVALON_WAIT:=50};} |
constraint ADDR_RANGE {addr inside {[32'h40000000:32'h80000000]};} |
constraint DATA_RANGE {data inside {[0:32'hFFFFFFFF]};} |
constraint TAG_RANGE {tags inside {[0:3]};} |
constraint RANDOM_STALL { |
stall_time dist{ |
0 :=50, |
[1:100]:=50 |
}; |
} |
|
covergroup cov; |
ADDR: coverpoint addr; |
TYPE: coverpoint dir; |
TAG: coverpoint tags; |
endgroup |
|
|
function new(string name="av_mm_transaction"); |
super.new(name); |
cov=new(); |
endfunction |
|
//method to randomize real |
//function void post_randomize; |
// stall_time=$bitstoreal(stall_time_i); |
//endfunction |
|
function void do_record(uvm_recorder recorder); |
super.do_record(recorder); |
`uvm_record_attribute(recorder.tr_handle,"address",addr); |
`uvm_record_field("data",data); |
//if ((dir ==AVALON_RD) && (recorder.tr_handle !=0)) |
if ((dir ==AVALON_RD)) |
$add_color(recorder.tr_handle,"red"); |
else |
$add_color(recorder.tr_handle,"green"); |
endfunction |
endclass |
/trunk/UVM/av_master_agent/av_sequence.sv
0,0 → 1,33
import uvm_pkg::*; |
|
class av_sequence #(N=100) extends uvm_sequence #(av_mm_transaction #(32,64,2)); |
|
|
//av_mm_transaction#(32,64,2) tx; |
|
function new (string name="av_sequence"); |
super.new(name); |
endfunction |
|
|
function void build_phase(uvm_phase phase); |
endfunction |
|
task body; |
|
av_mm_transaction#(32,64,2) tx=new(); |
repeat(2*N) begin |
start_item(tx); |
assert (tx.randomize()); |
finish_item(tx); |
end |
//end with a wait transaction |
start_item(tx); |
//assert (tx.randomize() with {tx.dir==AVALON_WAIT;}); |
tx.dir=AVALON_WAIT; |
finish_item(tx); |
endtask |
|
|
|
endclass |
/trunk/UVM/av_master_agent/av_test_pkg.sv
0,0 → 1,24
|
//`include "uvm_pkg.sv" |
`include "uvm_macros.svh" |
import uvm_pkg::*; |
|
`ifndef DUT_TEST_PKG_SV |
`define DUT_TEST_PKG_SV |
|
package av_test_pkg ; |
typedef enum { |
AVALON_WAIT = 0, |
AVALON_RD = 1, |
AVALON_WR = 2 |
} t_direction; |
typedef int unsigned delay_t; |
|
`include "./av_mm_transaction.sv" |
`include "./av_sequence.sv" |
`include "./av_driver.sv" |
`include "./av_config.sv" |
`include "./av_agent.sv" |
|
endpackage |
`endif |
/trunk/UVM/av_master_agent/avalon_m_if.sv
0,0 → 1,81
`ifndef AVALON_IF__SV |
`define AVALON_IF__SV |
|
|
interface avalon_if #(AW=32,DW=64,TW=2)(input bit clk,rst_n); |
logic [AW-1:0] address; |
logic [DW/8-1:0] byteenable; |
logic chipselect; |
logic read; |
logic write; |
logic [DW-1:0] readdata; |
logic [DW-1:0] writedata; |
logic waitrequest; |
logic readdatavalid; |
logic [3:0] burstcount; |
logic beginbursttransfer; |
// Clocking block |
clocking m_cb @(posedge clk); |
default input #1step output #1; |
|
output address; |
output byteenable; |
output chipselect; |
output read; |
output write; |
output writedata; |
output burstcount; |
output beginbursttransfer; |
input readdata; |
input waitrequest; |
input readdatavalid; |
endclocking |
// Slave Clocking block |
clocking s_cb @(posedge clk); |
default input #1step output #1; |
|
input address; |
input byteenable; |
input chipselect; |
input read; |
input write; |
input writedata; |
input burstcount; |
input beginbursttransfer; |
output readdata; |
output waitrequest; |
output readdatavalid; |
endclocking |
modport master (clocking m_cb); |
modport slave (clocking s_cb); |
//task read_transaction(logic [AW-1:0] addr); |
// wait(waitrequest ==1'b0); |
// address=addr; |
// byteenable=8'hFF; |
// chipselect=1'b1; |
// read=1'b1; |
// write=1'b0; |
// //readdata; |
// writedata='0; |
// //waitrequest; |
// //readdatavalid; |
// burstcount='0; |
// beginbursttransfer=1'b0; |
//endtask |
//task write_transaction(logic [AW-1:0] addr, logic [DW-1:0] data); |
// wait(waitrequest ==1'b0); |
// address=addr; |
// byteenable=8'hFF; |
// chipselect=1'b1; |
// read=1'b0; |
// write=1'b1; |
// //readdata; |
// writedata=data; |
// //waitrequest; |
// //readdatavalid; |
// burstcount='0; |
// beginbursttransfer=1'b0; |
//endtask |
endinterface |
|
`endif |
/trunk/UVM/env.svh
0,0 → 1,55
//------------------------------------------------------------ |
// Copyright 2010 Mentor Graphics Corporation |
// All Rights Reserved Worldwide |
// |
// Licensed under the Apache License, Version 2.0 (the |
// "License"); you may not use this file except in |
// compliance with the License. You may obtain a copy of |
// the License at |
// |
// http://www.apache.org/licenses/LICENSE-2.0 |
// |
// Unless required by applicable law or agreed to in |
// writing, software distributed under the License is |
// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR |
// CONDITIONS OF ANY KIND, either express or implied. See |
// the License for the specific language governing |
// permissions and limitations under the License. |
//------------------------------------------------------------ |
|
// |
// Class Description: |
// |
// |
class env extends uvm_env; |
|
// UVM Factory Registration Macro |
// |
`uvm_component_utils(env) |
//------------------------------------------ |
// Data Members |
//------------------------------------------ |
wb_slave_agent slave_agent; |
env_config m_cfg; |
|
av_agent av_agent_h; |
// Standard UVM Methods: |
extern function new(string name = "env", uvm_component parent = null); |
extern function void build_phase(uvm_phase phase); |
extern function void connect_phase(uvm_phase phase); |
|
endclass:env |
|
function env::new(string name = "env", uvm_component parent = null); |
super.new(name, parent); |
endfunction |
|
function void env::build_phase(uvm_phase phase); |
super.build_phase(phase); |
m_cfg = env_config::get_config(this); |
slave_agent = wb_slave_agent#(32,64,2)::type_id::create("slave_agent", this); |
av_agent_h=new("av_agent_h",this); |
endfunction:build_phase |
|
function void env::connect_phase(uvm_phase phase); |
endfunction: connect_phase |
trunk/UVM/env.svh
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/UVM/env_config.svh
===================================================================
--- trunk/UVM/env_config.svh (nonexistent)
+++ trunk/UVM/env_config.svh (revision 2)
@@ -0,0 +1,83 @@
+//------------------------------------------------------------
+// Copyright 2010 Mentor Graphics Corporation
+// All Rights Reserved Worldwide
+//
+// Licensed under the Apache License, Version 2.0 (the
+// "License"); you may not use this file except in
+// compliance with the License. You may obtain a copy of
+// the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in
+// writing, software distributed under the License is
+// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
+// CONDITIONS OF ANY KIND, either express or implied. See
+// the License for the specific language governing
+// permissions and limitations under the License.
+//------------------------------------------------------------
+`ifndef env_config
+`define env_config
+
+//
+// Class Description:
+//
+//
+class env_config extends uvm_object;
+
+localparam string s_my_config_id = "env_config";
+localparam string s_no_config_id = "no config";
+localparam string s_my_config_type_error_id = "config type error";
+
+// UVM Factory Registration Macro
+//
+`uvm_object_utils(env_config)
+
+//------------------------------------------
+// Data Members
+//------------------------------------------
+wb_slave_agent_config slave_agent_cfg;
+
+//------------------------------------------
+// Methods
+//------------------------------------------
+extern static function env_config get_config( uvm_component c);
+extern function new(string name = "env_config");
+
+endclass: env_config
+
+function env_config::new(string name = "env_config");
+ super.new(name);
+ slave_agent_cfg = wb_slave_agent_config::type_id::create("wb_slave_agent_config");
+endfunction
+
+//
+// Function: get_config
+//
+// This method gets the my_config associated with component c. We check for
+// the two kinds of error which may occur with this kind of
+// operation.
+//
+function env_config env_config::get_config( uvm_component c );
+ uvm_object o;
+ env_config t;
+
+ if( !c.get_config_object( s_my_config_id , o , 0 ) ) begin
+ c.uvm_report_error( s_no_config_id ,
+ $sformatf("no config associated with %s" ,
+ s_my_config_id ) ,
+ UVM_NONE , `uvm_file , `uvm_line );
+ return null;
+ end
+
+ if( !$cast( t , o ) ) begin
+ c.uvm_report_error( s_my_config_type_error_id ,
+ $sformatf("config %s associated with config %s is not of type my_config" ,
+ o.sprint() , s_my_config_id ) ,
+ UVM_NONE , `uvm_file , `uvm_line );
+ end
+
+ return t;
+endfunction
+
+`endif // env_config
trunk/UVM/env_config.svh
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/UVM/env_pkg.sv
===================================================================
--- trunk/UVM/env_pkg.sv (nonexistent)
+++ trunk/UVM/env_pkg.sv (revision 2)
@@ -0,0 +1,37 @@
+//------------------------------------------------------------
+// Copyright 2010 Mentor Graphics Corporation
+// All Rights Reserved Worldwide
+//
+// Licensed under the Apache License, Version 2.0 (the
+// "License"); you may not use this file except in
+// compliance with the License. You may obtain a copy of
+// the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in
+// writing, software distributed under the License is
+// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
+// CONDITIONS OF ANY KIND, either express or implied. See
+// the License for the specific language governing
+// permissions and limitations under the License.
+//------------------------------------------------------------
+//
+// Package Description:
+//
+package env_pkg;
+
+// Standard UVM import & include:
+import uvm_pkg::*;
+`include "uvm_macros.svh"
+
+// Any further package imports:
+import wb_slave_agent_pkg::*;
+import av_test_pkg::*;
+
+// Includes:
+`include "env_config.svh"
+`include "env.svh"
+`include "test.svh"
+
+endpackage: env_pkg
trunk/UVM/env_pkg.sv
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/UVM/tb.sv
===================================================================
--- trunk/UVM/tb.sv (nonexistent)
+++ trunk/UVM/tb.sv (revision 2)
@@ -0,0 +1,57 @@
+//`include "uvm_pkg.sv"
+//`include "uvm_macros.svh"
+//`include "avalon_m_if.sv"
+//`include "av_test_pkg.sv"
+//`include "../Download/uvm_agents-master/src/wishbone_b3/wishbone_b3_if.sv"
+//`include "../../av2wb/av2wb.sv"
+import env_pkg::*;
+module tb;
+logic clock,rst_n;
+logic [0:2] S;
+logic x;
+integer count=0;
+
+wb_if #(32,64,2) wb(clock,rst_n);
+avalon_if #(32,64,2) av(clock,rst_n);
+//always @(posedge clock) begin
+// if(count==3) count<=0;
+// else if(wb.stb && wb.cyc) count<=count+1;
+// else count<=count;
+//end
+//assign wb.ack=count[1] && count[0];
+//assign wb.ack=wb.stb && wb.cyc;
+//assign dut_if_h.slave.read=1'b1;
+//assign dut_if_h.slave.read=1'b1;
+av2wb i_dut(clock,rst_n,av,wb);
+
+import uvm_pkg::*;
+import questa_uvm_pkg::*;
+import av_test_pkg::*;
+
+
+initial begin rst_n<=1'b0;#10 rst_n<=1'b0;#20 rst_n<=1'b1; end
+always begin
+ clock<=1'b0 ;
+ forever
+ #10 clock=~clock;
+end
+
+
+initial begin
+
+//uvm_config_db#(virtual dut_if)::set(null,"*.dut_agent_h.*","dut_if",dut_if_h);
+// cntxt,inst_name,field_name,value
+uvm_config_db#(int) ::set(null, "", "recording_detail", 400);
+uvm_config_db#(uvm_bitstream_t)::set(null, "", "recording_detail", 400);
+//uvm_config_db#(virtual avalon_if #(32,64,2))::set(null,"uvm_test_top.av_env_h.av_agent_h","DUT_IF",av);
+uvm_config_db#(virtual avalon_if #(32,64,2))::set(null,"uvm_test_top.m_env.av_agent_h","DUT_IF",av);
+uvm_config_db #(virtual wb_if#(32,64,2))::set(null, "uvm_test_top", "WB_vif" , wb);
+// cntxt null becasue tb is a module not a class.
+run_test("test");
+end
+always@* begin
+#10000 rst_n<=1'b0;
+#10000 clock<=1'b0;
+end
+
+endmodule
Index: trunk/UVM/test.svh
===================================================================
--- trunk/UVM/test.svh (nonexistent)
+++ trunk/UVM/test.svh (revision 2)
@@ -0,0 +1,97 @@
+//------------------------------------------------------------
+// Copyright 2010 Mentor Graphics Corporation
+// All Rights Reserved Worldwide
+//
+// Licensed under the Apache License, Version 2.0 (the
+// "License"); you may not use this file except in
+// compliance with the License. You may obtain a copy of
+// the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in
+// writing, software distributed under the License is
+// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
+// CONDITIONS OF ANY KIND, either express or implied. See
+// the License for the specific language governing
+// permissions and limitations under the License.
+//------------------------------------------------------------
+//
+// Class Description:
+//
+//
+class test extends uvm_test;
+
+// UVM Factory Registration Macro
+//
+`uvm_component_utils(test)
+
+//------------------------------------------
+// Data Members
+//------------------------------------------
+
+//------------------------------------------
+// Component Members
+//------------------------------------------
+// The environment class
+env m_env;
+// Configuration objects
+env_config m_env_cfg;
+
+//------------------------------------------
+// Methods
+//------------------------------------------
+extern function void configure_wb_agent(wb_slave_agent_config cfg);
+// Standard UVM Methods:
+extern function new(string name = "test", uvm_component parent = null);
+extern function void build_phase(uvm_phase phase);
+extern task main_phase(uvm_phase phase);
+
+endclass: test
+
+function test::new(string name = "test", uvm_component parent = null);
+ super.new(name, parent);
+endfunction
+
+// Build the env, create the env configuration
+// including any sub configurations and assigning virtural interfaces
+function void test::build_phase(uvm_phase phase);
+ // env configuration
+ m_env_cfg = env_config::type_id::create("m_env_cfg");
+
+ // WB configuration
+ configure_wb_agent(m_env_cfg.slave_agent_cfg);
+
+ if (!uvm_config_db #(virtual wb_if#(32,64,2))::get(this, "", "WB_vif", m_env_cfg.slave_agent_cfg.WB))
+ `uvm_error("build_phase", "uvm_config_db #(virtual wb_if)::get(...) failed");
+
+ m_env = env::type_id::create("m_env", this);
+
+ uvm_config_db #(uvm_object)::set(this, "m_env*", "env_config", m_env_cfg);
+ uvm_config_db #(uvm_object)::set(this, "m_env*", "wb_slave_agent_config", m_env_cfg.slave_agent_cfg);
+endfunction: build_phase
+
+
+//
+// Convenience function to configure the wb agent
+//
+// This can be overloaded by extensions to this base class
+function void test::configure_wb_agent(wb_slave_agent_config cfg);
+ cfg.active = UVM_ACTIVE;
+ cfg.start_address[0] = 32'h0;
+ cfg.range[0] = 32'h18;
+endfunction: configure_wb_agent
+
+task test::main_phase(uvm_phase phase);
+ wb_slave_sequence#(6) slave_seq = wb_slave_sequence#(6)::type_id::create("wb_slave_sequence");
+ av_sequence#(6) seq1=new();
+
+ phase.raise_objection(this);
+ fork
+ seq1.start(m_env.av_agent_h.av_sequencer_h);
+ slave_seq.start(m_env.slave_agent.m_sequencer);
+ #10000;
+ //join_any
+ join
+ phase.drop_objection(this);
+endtask
trunk/UVM/test.svh
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/UVM/wb_slave_agent/wb_if.sv
===================================================================
--- trunk/UVM/wb_slave_agent/wb_if.sv (nonexistent)
+++ trunk/UVM/wb_slave_agent/wb_if.sv (revision 2)
@@ -0,0 +1,129 @@
+//interface apb_if(input PCLK,
+// input PRESETn);
+//
+// logic[31:0] PADDR;
+// logic[31:0] PRDATA;
+// logic[31:0] PWDATA;
+// logic[15:0] PSEL;
+// logic PENABLE;
+// logic PWRITE;
+// logic PREADY;
+// logic PSLVERR;
+//endinterface: apb_if
+`ifndef WISHBONE_B4_IF__SV
+`define WISHBONE_B4_IF__SV
+interface wb_if #(ADR_W = 32,DAT_W = 64, TAG_W = 1) (input bit clk,rst_n);
+ //parameter DAT_W = 64; // data port width
+ //parameter ADR_W = 32; // address port width
+ //parameter TAG_W = 1; // default tag widths are 1 bit
+
+ localparam SEL_W = (DAT_W/8); // 1 select bit per data byte, divide by 8
+
+ /// common signals ///
+ logic [DAT_W-1:0] dat_i; // data in bus
+ logic [DAT_W-1:0] dat_o; // data out bus
+ logic rst_i; // core reset
+ logic [TAG_W-1:0] tgd_i; // tag for data in. Contains information associated to dat_i (such as parity).
+ logic [TAG_W-1:0] tgd_o; // tag for data out. Contains information associated to dat_o
+
+ /// signals direction is dependent on agent ///
+ logic ack; // acknowledge, signals normal termination of the bus cycle
+ logic [ADR_W-1:0] adr; // address bus
+ logic cyc; // cycle, when asserted, indicates that a valid bus cycle is in progress
+ logic err; // error, indicates an abnormal cycle termination
+ logic lock; // lock, when asserted, indicates that the current bus cycle is uninterruptible
+ logic rty; // retry, cycle should be retried
+ logic [SEL_W-1:0] sel; // select array, indicates where a dat_o/dat_i (write/read) byte is valid, each bit represents one data byte
+ logic stb; // strobe, indicates a valid data transfer cycle
+ logic [TAG_W-1:0] tga; // tag for address, contains information associated to the adr signal
+ logic [TAG_W-1:0] tgc; // tag for cycle, contains information associated with cyc
+ logic we; // write enable
+ logic stall; //signal added in wishbone B4, equivalet to AXI ready.
+
+ // master driver
+ clocking m_drv_cb @(posedge clk);
+ default input #1step output #1;
+
+ //common signals
+ input dat_i;
+ output dat_o;
+ input rst_i;
+ input tgd_i;
+ output tgd_o;
+
+ // direction for master agent
+ input ack;
+ output adr;
+ output cyc;
+ input err;
+ output lock;
+ input rty;
+ output sel;
+ output stb;
+ output tga;
+ output tgc;
+ output we;
+ input stall;
+
+ endclocking: m_drv_cb
+
+ // slave driver
+ clocking s_drv_cb @(posedge clk);
+ default input #1step output #1;
+
+ //common signals
+ input dat_i;
+ output dat_o;
+ input rst_i;
+ input tgd_i;
+ output tgd_o;
+
+ // direction for slave agent
+ output ack;
+ input adr;
+ input cyc;
+ output err;
+ input lock;
+ output rty;
+ input sel;
+ input stb;
+ input tga;
+ input tgc;
+ input we;
+ output stall;
+
+ endclocking: s_drv_cb
+
+ clocking mon_cb @(posedge clk);
+ default input #1step output #1;
+
+ //common signals
+ input dat_i;
+ input dat_o;
+ input rst_i;
+ input tgd_i;
+ input tgd_o;
+
+ // all monitor signals are inputs
+ input ack;
+ input adr;
+ input cyc;
+ input err;
+ input lock;
+ input rty;
+ input sel;
+ input stb;
+ input tga;
+ input tgc;
+ input we;
+ input stall;
+
+ endclocking: mon_cb
+
+modport master (clocking m_drv_cb);
+modport slave (clocking s_drv_cb);
+modport monitor (clocking mon_cb);
+
+endinterface: wb_if
+
+`endif //WISHBONE_B3_IF__SV
trunk/UVM/wb_slave_agent/wb_if.sv
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/UVM/wb_slave_agent/wb_listener.svh
===================================================================
--- trunk/UVM/wb_slave_agent/wb_listener.svh (nonexistent)
+++ trunk/UVM/wb_slave_agent/wb_listener.svh (revision 2)
@@ -0,0 +1,25 @@
+class item_listener extends uvm_subscriber #( wb_slave_seq_item#(32,64,2) );
+
+ `uvm_component_utils( item_listener );
+
+ int transfers;
+
+ function new( string name , uvm_component parent );
+ super.new( name , parent );
+ endfunction
+
+ function void write( input wb_slave_seq_item t );
+ transfers++;
+ $display("No. %d\n",transfers);
+ endfunction
+
+ function void report_phase(uvm_phase phase);
+ if(transfers == 6) begin
+ `uvm_info("** UVM TEST PASSED **", "Correct number of transfers occured before timeout", UVM_LOW)
+ end
+ else begin
+ `uvm_error("** UVM TEST FAILED **", "Too few transfers occured before the timeout")
+ end
+ endfunction: report_phase
+
+endclass
trunk/UVM/wb_slave_agent/wb_listener.svh
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/UVM/wb_slave_agent/wb_slave_agent.svh
===================================================================
--- trunk/UVM/wb_slave_agent/wb_slave_agent.svh (nonexistent)
+++ trunk/UVM/wb_slave_agent/wb_slave_agent.svh (revision 2)
@@ -0,0 +1,82 @@
+//------------------------------------------------------------
+// Copyright 2010 Mentor Graphics Corporation
+// All Rights Reserved Worldwide
+//
+// Licensed under the Apache License, Version 2.0 (the
+// "License"); you may not use this file except in
+// compliance with the License. You may obtain a copy of
+// the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in
+// writing, software distributed under the License is
+// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
+// CONDITIONS OF ANY KIND, either express or implied. See
+// the License for the specific language governing
+// permissions and limitations under the License.
+//------------------------------------------------------------
+`ifndef wb_slave_agent
+`define wb_slave_agent
+
+//
+// Class Description:
+//
+//
+class wb_slave_agent#(AW =32, DW=64, TW= 2) extends uvm_component;
+
+// UVM Factory Registration Macro
+//
+`uvm_component_utils(wb_slave_agent)
+
+//------------------------------------------
+// Data Members
+//------------------------------------------
+wb_slave_agent_config m_cfg;
+//------------------------------------------
+// Component Members
+//------------------------------------------
+uvm_analysis_port #(wb_slave_seq_item) ap;
+wb_slave_monitor m_monitor;
+wb_slave_sequencer m_sequencer;
+wb_slave_driver #(AW,DW,TW) m_driver;
+item_listener listener;
+//------------------------------------------
+// Methods
+//------------------------------------------
+
+// Standard UVM Methods:
+extern function new(string name = "wb_slave_agent", uvm_component parent = null);
+extern function void build_phase(uvm_phase phase);
+extern function void connect_phase(uvm_phase phase);
+
+endclass: wb_slave_agent
+
+
+function wb_slave_agent::new(string name = "wb_slave_agent", uvm_component parent = null);
+ super.new(name, parent);
+endfunction
+
+function void wb_slave_agent::build_phase(uvm_phase phase);
+ m_cfg = wb_slave_agent_config::get_config(this);
+ // Monitor is always present
+ m_monitor = wb_slave_monitor::type_id::create("m_monitor", this);
+ // Only build the driver and sequencer if active
+ if(m_cfg.active == UVM_ACTIVE) begin
+ m_driver = wb_slave_driver#(32,64,2) ::type_id::create("m_driver", this);
+ m_sequencer = wb_slave_sequencer::type_id::create("m_sequencer", this);
+ end
+ listener = item_listener::type_id::create("item_listener", this);
+endfunction: build_phase
+
+function void wb_slave_agent::connect_phase(uvm_phase phase);
+ ap = m_monitor.ap;
+ ap.connect(listener.analysis_export);
+ // Only connect the driver and the sequencer if active
+ if(m_cfg.active == UVM_ACTIVE) begin
+ m_driver.seq_item_port.connect(m_sequencer.seq_item_export);
+ end
+
+endfunction: connect_phase
+
+`endif // wb_slave_agent
trunk/UVM/wb_slave_agent/wb_slave_agent.svh
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/UVM/wb_slave_agent/wb_slave_agent_config.svh
===================================================================
--- trunk/UVM/wb_slave_agent/wb_slave_agent_config.svh (nonexistent)
+++ trunk/UVM/wb_slave_agent/wb_slave_agent_config.svh (revision 2)
@@ -0,0 +1,87 @@
+//------------------------------------------------------------
+// Copyright 2010 Mentor Graphics Corporation
+// All Rights Reserved Worldwide
+//
+// Licensed under the Apache License, Version 2.0 (the
+// "License"); you may not use this file except in
+// compliance with the License. You may obtain a copy of
+// the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in
+// writing, software distributed under the License is
+// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
+// CONDITIONS OF ANY KIND, either express or implied. See
+// the License for the specific language governing
+// permissions and limitations under the License.
+//------------------------------------------------------------
+
+//
+// Class Description:
+//
+//
+class wb_slave_agent_config extends uvm_object;
+
+localparam string s_my_config_id = "wb_slave_agent_config";
+localparam string s_no_config_id = "no config";
+localparam string s_my_config_type_error_id = "config type error";
+
+// UVM Factory Registration Macro
+//
+`uvm_object_utils(wb_slave_agent_config)
+
+// Virtual Interface
+virtual wb_if#(32, 64, 2) WB;
+
+//------------------------------------------
+// Data Members
+//------------------------------------------
+// Is the agent active or passive
+uvm_active_passive_enum active = UVM_ACTIVE;
+
+logic[31:0] start_address[15:0];
+logic[31:0] range[15:0];
+
+int wb_index = 0;
+//------------------------------------------
+// Methods
+//------------------------------------------
+extern static function wb_slave_agent_config get_config( uvm_component c );
+// Standard UVM Methods:
+extern function new(string name = "wb_slave_agent_config");
+
+endclass: wb_slave_agent_config
+
+function wb_slave_agent_config::new(string name = "wb_slave_agent_config");
+ super.new(name);
+endfunction
+
+//
+// Function: get_config
+//
+// This method gets the my_config associated with component c. We check for
+// the two kinds of error which may occur with this kind of
+// operation.
+//
+function wb_slave_agent_config wb_slave_agent_config::get_config( uvm_component c );
+ uvm_object o;
+ wb_slave_agent_config t;
+
+ if( !c.get_config_object( s_my_config_id , o , 0 ) ) begin
+ c.uvm_report_error( s_no_config_id ,
+ $sformatf("no config associated with %s" ,
+ s_my_config_id ) ,
+ UVM_NONE , `uvm_file , `uvm_line );
+ return null;
+ end
+
+ if( !$cast( t , o ) ) begin
+ c.uvm_report_error( s_my_config_type_error_id ,
+ $sformatf("config %s associated with config %s is not of type my_config" ,
+ o.sprint() , s_my_config_id ) ,
+ UVM_NONE , `uvm_file , `uvm_line );
+ end
+
+ return t;
+endfunction
trunk/UVM/wb_slave_agent/wb_slave_agent_config.svh
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/UVM/wb_slave_agent/wb_slave_agent_pkg.sv
===================================================================
--- trunk/UVM/wb_slave_agent/wb_slave_agent_pkg.sv (nonexistent)
+++ trunk/UVM/wb_slave_agent/wb_slave_agent_pkg.sv (revision 2)
@@ -0,0 +1,37 @@
+//------------------------------------------------------------
+// Copyright 2010 Mentor Graphics Corporation
+// All Rights Reserved Worldwide
+//
+// Licensed under the Apache License, Version 2.0 (the
+// "License"); you may not use this file except in
+// compliance with the License. You may obtain a copy of
+// the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in
+// writing, software distributed under the License is
+// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
+// CONDITIONS OF ANY KIND, either express or implied. See
+// the License for the specific language governing
+// permissions and limitations under the License.
+//------------------------------------------------------------
+package wb_slave_agent_pkg;
+
+import uvm_pkg::*;
+`include "uvm_macros.svh"
+
+//import register_layering_pkg::*;
+
+`include "wb_slave_seq_item.svh"
+`include "wb_slave_agent_config.svh"
+`include "wb_slave_driver.svh"
+`include "wb_slave_monitor.svh"
+`include "wb_slave_sequencer.svh"
+`include "wb_listener.svh"
+`include "wb_slave_agent.svh"
+
+// Utility Sequences
+`include "wb_slave_sequence.svh"
+
+endpackage: wb_slave_agent_pkg
trunk/UVM/wb_slave_agent/wb_slave_agent_pkg.sv
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/UVM/wb_slave_agent/wb_slave_driver.svh
===================================================================
--- trunk/UVM/wb_slave_agent/wb_slave_driver.svh (nonexistent)
+++ trunk/UVM/wb_slave_agent/wb_slave_driver.svh (revision 2)
@@ -0,0 +1,165 @@
+//------------------------------------------------------------
+// Copyright 2010 Mentor Graphics Corporation
+// All Rights Reserved Worldwide
+//
+// Licensed under the Apache License, Version 2.0 (the
+// "License"); you may not use this file except in
+// compliance with the License. You may obtain a copy of
+// the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in
+// writing, software distributed under the License is
+// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
+// CONDITIONS OF ANY KIND, either express or implied. See
+// the License for the specific language governing
+// permissions and limitations under the License.
+//------------------------------------------------------------
+`ifndef wb_slave_driver
+`define wb_slave_driver
+
+//
+// Class Description:
+//
+//
+class wb_slave_driver #(AW =32, DW=64, TW= 2) extends uvm_driver #(wb_slave_seq_item #(AW, DW, TW),wb_slave_seq_item#(AW,DW,TW));
+
+// UVM Factory Registration Macro
+//
+`uvm_component_utils(wb_slave_driver)
+
+// Virtual Interface
+virtual wb_if #(AW, DW, TW) WB;
+
+//------------------------------------------
+// Data Members
+//------------------------------------------
+wb_slave_agent_config m_cfg;
+mailbox slave_mbox;
+//------------------------------------------
+// Methods
+//------------------------------------------
+// Standard UVM Methods:
+extern function new(string name = "wb_slave_driver", uvm_component parent = null);
+extern function void build_phase(uvm_phase phase);
+extern task run_phase(uvm_phase phase);
+extern task req_loop();
+extern task resp_loop(uvm_phase phase);
+//task handle_req(wb_slave_seq_item #(AW, DW, TW) req);
+//endtask
+//
+//task handle_rsp(wb_slave_seq_item #(AW, DW, TW) rsp,wb_slave_seq_item #(AW, DW, TW) req);
+//endtask
+
+endclass: wb_slave_driver
+
+function wb_slave_driver::new(string name = "wb_slave_driver", uvm_component parent = null);
+ super.new(name, parent);
+ slave_mbox=new(1);
+endfunction
+
+function void wb_slave_driver::build_phase(uvm_phase phase);
+ m_cfg = wb_slave_agent_config::get_config(this);
+ WB = m_cfg.WB;
+endfunction: build_phase
+
+task wb_slave_driver::run_phase(uvm_phase phase);
+ //wb_slave_seq_item #(AW, DW, TW) req;
+ //wb_slave_seq_item #(AW, DW, TW) rsp;
+
+//phase.raise_objection(this);
+ fork
+ this.req_loop();
+ this.resp_loop(phase);
+ join
+
+
+ `uvm_info("** WB SLAVE RUN PHASE EXITED **", "", UVM_LOW)
+//phase.drop_objection(this);
+endtask: run_phase
+
+task wb_slave_driver::req_loop();
+ wb_slave_seq_item #(this.AW, this.DW, this.TW) req=new();
+
+ forever begin
+
+ if (!this.WB.rst_n) begin
+ this.WB.stall<=1'b0;
+ @(posedge this.WB.clk);
+ end else begin
+ //@(posedge this.WB.clk);
+ $strobe("waiting\n");
+ //this.seq_item_port.get_next_item(req);
+ while (!(this.WB.cyc === 1'b1 && this.WB.stb ===1'b1)) @(posedge this.WB.clk);
+ //@((this.WB.clk ===1'b1 && this.WB.cyc === 1'b1));
+ $strobe("got request %d\n",this.WB.adr);
+ if(slave_mbox.try_put(req)) begin
+ this.WB.stall<=1'b0;
+ req.addr<= this.WB.adr;
+ req.rw<= this.WB.we;
+ if (req.rw) req.wdata<= this.WB.dat_o;
+ //this.seq_item_port.item_done();
+ slave_mbox.put(req);
+ end else
+ this.WB.stall<=1'b1;
+ @(posedge this.WB.clk);
+ end
+
+ end
+endtask
+
+
+task wb_slave_driver::resp_loop(uvm_phase phase);
+ wb_slave_seq_item #(this.AW, this.DW, this.TW) req1;
+ wb_slave_seq_item #(this.AW, this.DW, this.TW) req;
+ wb_slave_seq_item #(this.AW, this.DW, this.TW) rsp;
+ forever begin
+
+ if (!this.WB.rst_n) begin
+ this.WB.ack<= 1'b0;
+ this.WB.err<= 1'b0;
+ this.WB.rty<= 1'b0;
+ this.WB.dat_i<='0;
+ @(posedge this.WB.clk);
+ end
+ else begin
+ this.WB.ack<=1'b0;
+ this.WB.err<= 1'b0;
+ this.WB.rty<= 1'b0;
+ this.WB.dat_i<='0;
+ if(slave_mbox.try_get(req)) //begin
+ //@(slave_mbox.try_get(req));
+ begin
+ $strobe("Processing req\n");
+ slave_mbox.get(req);
+ this.seq_item_port.get_next_item(req1);
+ req1.copy(req);
+ this.seq_item_port.item_done();
+ this.seq_item_port.get_next_item(rsp);
+ $strobe("wait cycle %d\n",rsp.delay);
+ //phase.raise_objection(this);
+ repeat (rsp.delay) begin
+ @(posedge this.WB.clk);
+ this.WB.ack<=1'b0;
+ this.WB.err<= 1'b0;
+ this.WB.rty<= 1'b0;
+ this.WB.dat_i<='0;
+ end
+ //phase.raise_objection(this);
+
+ if ( ! req.rw) this.WB.dat_i<= rsp.rdata;
+ $strobe("rsp %d\n",rsp.rdata);
+ this.WB.ack<=1'b1;
+ this.WB.err<= rsp.slv_err;
+ this.seq_item_port.item_done();
+ end
+ @(posedge this.WB.clk);
+ end
+
+ end
+
+endtask
+
+
+`endif // wb_slave_driver
trunk/UVM/wb_slave_agent/wb_slave_driver.svh
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/UVM/wb_slave_agent/wb_slave_monitor.svh
===================================================================
--- trunk/UVM/wb_slave_agent/wb_slave_monitor.svh (nonexistent)
+++ trunk/UVM/wb_slave_agent/wb_slave_monitor.svh (revision 2)
@@ -0,0 +1,100 @@
+//------------------------------------------------------------
+// Copyright 2010 Mentor Graphics Corporation
+// All Rights Reserved Worldwide
+//
+// Licensed under the Apache License, Version 2.0 (the
+// "License"); you may not use this file except in
+// compliance with the License. You may obtain a copy of
+// the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in
+// writing, software distributed under the License is
+// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
+// CONDITIONS OF ANY KIND, either express or implied. See
+// the License for the specific language governing
+// permissions and limitations under the License.
+//------------------------------------------------------------
+
+//
+// Class Description:
+//
+//
+class wb_slave_monitor extends uvm_component;
+
+// UVM Factory Registration Macro
+//
+`uvm_component_utils(wb_slave_monitor);
+
+// Virtual Interface
+virtual wb_if #(32,64,2) WB;
+
+//------------------------------------------
+// Data Members
+//------------------------------------------
+wb_slave_agent_config m_cfg;
+
+//------------------------------------------
+// Component Members
+//------------------------------------------
+uvm_analysis_port #(wb_slave_seq_item) ap;
+
+//------------------------------------------
+// Methods
+//------------------------------------------
+
+// Standard UVM Methods:
+
+extern function new(string name = "wb_slave_monitor", uvm_component parent = null);
+extern function void build_phase(uvm_phase phase);
+extern task run_phase(uvm_phase phase);
+extern function void report_phase(uvm_phase phase);
+
+endclass: wb_slave_monitor
+
+function wb_slave_monitor::new(string name = "wb_slave_monitor", uvm_component parent = null);
+ super.new(name, parent);
+endfunction
+
+function void wb_slave_monitor::build_phase(uvm_phase phase);
+ ap = new("ap", this);
+ m_cfg = wb_slave_agent_config::get_config(this);
+ WB = m_cfg.WB;
+endfunction: build_phase
+
+task wb_slave_monitor::run_phase(uvm_phase phase);
+ wb_slave_seq_item #(32,64,2) item;
+ wb_slave_seq_item #(32,64,2) cloned_item;
+
+ item = wb_slave_seq_item#(32,64,2)::type_id::create("item");
+
+//phase.raise_objection(this);
+ forever begin
+ // Detect the protocol event on the TBAI virtual interface
+ @(posedge WB.clk);
+ if(WB.cyc && WB.stb)
+ // Assign the relevant values to the analysis item fields
+ begin
+ item.addr = WB.adr;
+ item.rw = WB.we;
+ if(WB.we)
+ begin
+ item.wdata = WB.dat_o;
+ end
+ else
+ begin
+ item.rdata = WB.dat_i;
+ end
+ // Clone and publish the cloned item to the subscribers
+ $cast(cloned_item, item.clone());
+ ap.write(cloned_item);
+ end
+ end
+//phase.drop_objection(this);
+endtask: run_phase
+
+function void wb_slave_monitor::report_phase(uvm_phase phase);
+// Might be a good place to do some reporting on no of analysis transactions sent etc
+
+endfunction: report_phase
trunk/UVM/wb_slave_agent/wb_slave_monitor.svh
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/UVM/wb_slave_agent/wb_slave_seq_item.svh
===================================================================
--- trunk/UVM/wb_slave_agent/wb_slave_seq_item.svh (nonexistent)
+++ trunk/UVM/wb_slave_agent/wb_slave_seq_item.svh (revision 2)
@@ -0,0 +1,137 @@
+//------------------------------------------------------------
+// Copyright 2010 Mentor Graphics Corporation
+// All Rights Reserved Worldwide
+//
+// Licensed under the Apache License, Version 2.0 (the
+// "License"); you may not use this file except in
+// compliance with the License. You may obtain a copy of
+// the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in
+// writing, software distributed under the License is
+// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
+// CONDITIONS OF ANY KIND, either express or implied. See
+// the License for the specific language governing
+// permissions and limitations under the License.
+//------------------------------------------------------------
+
+// Questa recording macro:
+
+//`define uvm_record_field(NAME,VALUE) \
+// $add_attribute(recorder.tr_handle,VALUE,NAME);
+
+//
+// Class Description:
+//
+//
+class wb_slave_seq_item #(AW =32, DW=64, TW= 2) extends uvm_sequence_item;
+
+// UVM Factory Registration Macro
+//
+`uvm_object_utils(wb_slave_seq_item)
+
+//------------------------------------------
+// Data Members (Outputs rand, inputs non-rand)
+//------------------------------------------
+logic[AW-1:0] addr;
+logic[DW-1:0] wdata;
+logic[TW-1:0] tag;
+logic rw;
+
+rand logic[DW-1:0] rdata;
+rand logic slv_err;
+rand int delay;
+
+constraint delay_bounds {
+ delay inside {[0:2]};
+}
+
+constraint error_dist {
+ slv_err dist {0 := 80, 1 := 20};
+}
+
+//------------------------------------------
+// Methods
+//------------------------------------------
+
+// Standard UVM Methods:
+extern function new(string name = "wb_slave_seq_item");
+extern function void do_copy(uvm_object rhs);
+extern function bit do_compare(uvm_object rhs, uvm_comparer comparer);
+extern function string convert2string();
+extern function void do_print(uvm_printer printer);
+extern function void do_record(uvm_recorder recorder);
+
+endclass:wb_slave_seq_item
+
+function wb_slave_seq_item::new(string name = "wb_slave_seq_item");
+ super.new(name);
+endfunction
+
+function void wb_slave_seq_item::do_copy(uvm_object rhs);
+ wb_slave_seq_item rhs_;
+
+ if(!$cast(rhs_, rhs)) begin
+ `uvm_fatal("do_copy", "cast of rhs object failed")
+ end
+ super.do_copy(rhs);
+ // Copy over data members:
+ addr = rhs_.addr;
+ wdata = rhs_.wdata;
+ rw = rhs_.rw;
+ slv_err = rhs_.slv_err;
+ rdata = rhs_.rdata;
+ delay = rhs_.delay;
+
+endfunction:do_copy
+
+function bit wb_slave_seq_item::do_compare(uvm_object rhs, uvm_comparer comparer);
+ wb_slave_seq_item rhs_;
+
+ if(!$cast(rhs_, rhs)) begin
+ `uvm_error("do_copy", "cast of rhs object failed")
+ return 0;
+ end
+ return super.do_compare(rhs, comparer) &&
+ addr == rhs_.addr &&
+ wdata == rhs_.wdata &&
+ rw == rhs_.rw &&
+ slv_err == rhs_.slv_err &&
+ rdata == rhs_.rdata;
+ // Delay is not relevant to the comparison
+endfunction:do_compare
+
+function string wb_slave_seq_item::convert2string();
+ string s;
+
+ $sformat(s, "%s\n", super.convert2string());
+ // Convert to string function reusing s:
+ $sformat(s, "%s\n addr\t%0h\n wdata\t%0h\n rw\t%0b\n", s, addr, wdata, rw);
+ $sformat(s, "%s\n slv_err\t%0b\n rdata\t%0h\n delay\t%0d\n", s, slv_err, rdata, delay);
+ return s;
+
+endfunction:convert2string
+
+function void wb_slave_seq_item::do_print(uvm_printer printer);
+ if(printer.knobs.sprint == 0) begin
+ $display(convert2string());
+ end
+ else begin
+ printer.m_string = convert2string();
+ end
+endfunction:do_print
+
+function void wb_slave_seq_item:: do_record(uvm_recorder recorder);
+ super.do_record(recorder);
+
+ // Use the record macros to record the item fields:
+ `uvm_record_field("addr", addr)
+ `uvm_record_field("wdata", wdata)
+ `uvm_record_field("rdata", rdata)
+ `uvm_record_field("rw", rw)
+ `uvm_record_field("slv_err", slv_err)
+ `uvm_record_field("delay", delay)
+endfunction:do_record
+
trunk/UVM/wb_slave_agent/wb_slave_seq_item.svh
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/UVM/wb_slave_agent/wb_slave_sequence.svh
===================================================================
--- trunk/UVM/wb_slave_agent/wb_slave_sequence.svh (nonexistent)
+++ trunk/UVM/wb_slave_agent/wb_slave_sequence.svh (revision 2)
@@ -0,0 +1,95 @@
+//------------------------------------------------------------
+// Copyright 2010 Mentor Graphics Corporation
+// All Rights Reserved Worldwide
+//
+// Licensed under the Apache License, Version 2.0 (the
+// "License"); you may not use this file except in
+// compliance with the License. You may obtain a copy of
+// the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in
+// writing, software distributed under the License is
+// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
+// CONDITIONS OF ANY KIND, either express or implied. See
+// the License for the specific language governing
+// permissions and limitations under the License.
+//------------------------------------------------------------
+`ifndef wb_slave_sequence
+`define wb_slave_sequence
+
+
+//
+// Class Description:
+//
+//
+class wb_slave_sequence #(N=100) extends uvm_sequence #(wb_slave_seq_item);
+
+// UVM Factory Registration Macro
+//
+`uvm_object_utils(wb_slave_sequence#(N))
+
+//------------------------------------------
+// Data Members (Outputs rand, inputs non-rand)
+//------------------------------------------
+bit [31:0] memory [int];
+
+//------------------------------------------
+// Constraints
+//------------------------------------------
+
+
+
+//------------------------------------------
+// Methods
+//------------------------------------------
+
+// Standard UVM Methods:
+extern function new(string name = "wb_slave_sequence");
+extern task body;
+
+endclass:wb_slave_sequence
+
+function wb_slave_sequence::new(string name = "wb_slave_sequence");
+ super.new(name);
+endfunction
+
+task wb_slave_sequence::body;
+ wb_slave_agent_config m_cfg = wb_slave_agent_config::get_config(m_sequencer);
+ wb_slave_seq_item req;
+ wb_slave_seq_item rsp;
+
+ req = wb_slave_seq_item#(32,64,2) ::type_id::create("req");
+ rsp = wb_slave_seq_item#(32,64,2) ::type_id::create("rsp");
+
+ //wait (m_cfg.WB.rst_n);
+ // Slave sequence finishes after 60 transfers:
+ repeat(N) begin
+
+ // Get request
+ start_item(req);
+ finish_item(req);
+ $display ("req item emitted\n");
+ // Prepare memory for response:
+ if (req.rw) begin
+ memory[req.addr] = req.wdata;
+ end
+ else begin
+ if(!memory.exists(req.addr)) begin
+ memory[req.addr] = 32'hdeadbeef;
+ memory[req.addr] = req.addr;
+ end
+ end
+
+ // Respond:
+ start_item(rsp);
+ rsp.copy(req);
+ assert (rsp.randomize() with {if(!rsp.rw) rsp.rdata == memory[rsp.addr];});
+ finish_item(rsp);
+ $display ("rsp item emitted\n");
+ end
+
+endtask:body
+
+`endif // wb_slave_sequence
trunk/UVM/wb_slave_agent/wb_slave_sequence.svh
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/UVM/wb_slave_agent/wb_slave_sequencer.svh
===================================================================
--- trunk/UVM/wb_slave_agent/wb_slave_sequencer.svh (nonexistent)
+++ trunk/UVM/wb_slave_agent/wb_slave_sequencer.svh (revision 2)
@@ -0,0 +1,43 @@
+//------------------------------------------------------------
+// Copyright 2010 Mentor Graphics Corporation
+// All Rights Reserved Worldwide
+//
+// Licensed under the Apache License, Version 2.0 (the
+// "License"); you may not use this file except in
+// compliance with the License. You may obtain a copy of
+// the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in
+// writing, software distributed under the License is
+// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
+// CONDITIONS OF ANY KIND, either express or implied. See
+// the License for the specific language governing
+// permissions and limitations under the License.
+//------------------------------------------------------------
+`ifndef wb_slave_sequencer
+`define wb_slave_sequencer
+
+//
+// Class Description:
+//
+//
+class wb_slave_sequencer extends uvm_sequencer #(wb_slave_seq_item#(32,64,2), wb_slave_seq_item#(32,64,2));
+//I don't need two seq items req and rsp, only rsp is enough
+//class wb_slave_sequencer extends uvm_sequencer #(wb_slave_seq_item#(32,64,2));
+
+// UVM Factory Registration Macro
+//
+`uvm_component_utils(wb_slave_sequencer)
+
+// Standard UVM Methods:
+extern function new(string name="wb_slave_sequencer", uvm_component parent = null);
+
+endclass: wb_slave_sequencer
+
+function wb_slave_sequencer::new(string name="wb_slave_sequencer", uvm_component parent = null);
+ super.new(name, parent);
+endfunction
+
+`endif // wb_slave_sequencer
trunk/UVM/wb_slave_agent/wb_slave_sequencer.svh
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property