OpenCores
URL https://opencores.org/ocsvn/avs_aes/avs_aes/trunk

Subversion Repositories avs_aes

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /avs_aes/trunk
    from Rev 18 to Rev 17
    ↔ Reverse comparison
  •

Rev 18 → Rev 17

/doc/manual/src/avs_aes.ist
1,29 → 1,15
% makeindex style file created by the glossaries package
% for document 'avs_aes' on 2011-5-15
actual '?'
encap '|'
level '!'
quote '"'
% makeindex style file created by LaTeX for document "avs_aes" on 2010-4-3
keyword "\\glossaryentry"
preamble "\\glossarysection[\\glossarytoctitle]{\\glossarytitle}\\glossarypreamble\n\\begin{theglossary}\\glossaryheader\n"
postamble "\%\n\\end{theglossary}\\glossarypostamble\n"
group_skip "\\glsgroupskip\n"
item_0 "\%\n"
item_1 "\%\n"
item_2 "\%\n"
item_01 "\%\n"
item_x1 "\\relax \\glsresetentrylist\n"
item_12 "\%\n"
item_x2 "\\relax \\glsresetentrylist\n"
delim_0 "\{\\glossaryentrynumbers\{\\relax "
delim_1 "\{\\glossaryentrynumbers\{\\relax "
delim_2 "\{\\glossaryentrynumbers\{\\relax "
delim_t "\}\}"
preamble "\\begin{theglossary}"
postamble "\n\\end{theglossary}\n"
group_skip "\\gloskip "
item_0 "\n\n\\gloitem "
delim_0 "\n\\glodelim "
page_compositor "-"
delim_n "\\delimN "
delim_r "\\delimR "
delim_t "\\delimT "
headings_flag 1
heading_prefix "\\glsgroupheading\{"
heading_suffix "\}\\relax \\glsresetentrylist "
symhead_positive "glssymbols"
numhead_positive "glsnumbers"
page_compositor "."
heading_prefix "\\glogroup"
symhead_positive "Symbols"
numhead_positive "Numbers"
/doc/manual/src/avs_aes.tex
6,8 → 6,10
 
\usepackage[
style=altlist,
toc=true,
acronym=true]{glossaries}
hyper=true,
number=none,
acronym=true,
header=none]{glossary}
\usepackage{capt-of}
 
%%% Water mark
16,8 → 18,9
%\SetWatermarkScale{0.9}
%\SetWatermarkLightness{0.85}
 
 
\makeglossaries
\makeacronym
\makeglossary
\input{acronym}
\input{glossary}
\bibliographystyle{IEEEtran}
 
26,7 → 29,7
%%%%%%%%%%%%%%%%%
\docDate{ \today }
\docID{avs\_aes\_doc}
\docRevision{0.8}
\docRevision{0.5}
\docStatus{Final}
\docTitle{\mbox{AES 128/192/256 (ECB)} \mbox{Avalon\rtm-MM Slave}}
\keywords{Avalon, bus, slave, cryptography, AES, ecb, IP core }
47,7 → 50,6
0.5 & all & final release & 2010/03/07 & T. Ruschival \\
0.6 & 3,6 & fixed memory map, added testbench description & 2010/04/02 & T. Ruschival \\
0.7 & 3,6 & fixed typos & 2010/04/03 & T. Ruschival \\
0.8 & 6 & corrected key schedule & 2011/05/15 & T. Ruschival \\
}
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 
59,11 → 61,11
\newpage
 
\section{Introduction}
\label{sec:intro} The \gls{AES} is a symmetric block cipher operating on fixed block sizes
\label{sec:intro} The \AES is a symmetric block cipher operating on fixed block sizes
of 128 Bit and is specified for key sizes of 128, 192 and 256 Bit designed by Joan
Daemen and Vincent Rijmen. The algorithm was standardized by \gls{NIST}. For more
Daemen and Vincent Rijmen. The algorithm was standardized by \NIST. For more
information on the algorithm see \cite{NIST:Fips197}.\\
This component implements an AES encryption decryption data path in \gls{ECB} mode with
This component implements an AES encryption decryption data path in \ECB mode with
either 128,192 or 256 Bit keys. The key length is determined by generics at compile
time. Also the decryption data path can be disabled by generics if it is not needed
for the application.\\
81,7 → 83,7
signals in a Wishbone implementation.The component can be used both in polling
mode or can provide an interrupt for signalling. \\
Unfortunately Avalon\rtm\ is an Altera\rtm\ proprietary technology. The actual AES
core however is a self contained entity and can be embedded into other \gls{SoC} bus
core however is a self contained entity and can be embedded into other \SoC\ bus
interfaces as well or used independently.
 
\subsection{Configuration Generics}
107,7 → 109,7
implements the signals shown in table \ref{tab:signals}. All signals are synchronous,
sampled at the rising edge of the clock. The type for all signals is \texttt{IEEE1164
std\_logic} or \texttt{std\_logic\_vector}. For signals wider that 1 Bit the range
is \gls{MSB} \texttt{downto} \gls{LSB}. \\
is \MSB\ \texttt{downto} \LSB\. \\
This components has only output signals driven by registers no input signals are directly combinatorially connected to the
output signals, thus combinational loops are avoided. All signals are active
high. This component does not support burst transfers.
227,7 → 229,7
The result of the operation can be read from the \texttt{RESULT} area of the memory
and is not cleared. It will be overwritten by succeeding operations.
 
The underlying AES core uses the \gls{FSM} shown in \ref{fig:aesFSM} for processing of
The underlying AES core uses the \FSM\ shown in \ref{fig:aesFSM} for processing of
the data. The signals \texttt{data\_stable} and \texttt{key\_stable} are accessible
over the control status word \texttt{CTRL} \ref{sec:ctrl}. \texttt{key\_ready} is a
signal driven by the key generator when all keys are expanded. The signal
263,7 → 265,7
The algorithmic core is divided into two separate data paths one for encryption and a
second for decryption operation. The two data paths are independent, however they
share the keyexpansion component which provides decrypt and encrypt keys (which are
the same only in opposite order). Each data path is controlled by its own \gls{FSM}. If
the same only in opposite order). Each data path is controlled by its own \FSM\. If
configured by the generic \texttt{DECRYPTION} \ref{gen:decryption} the decryption
data path is included and some multiplexers are generated for the shared signals,
e.g. \texttt{result} or \texttt{roundkey\_index}.\\
285,16 → 287,10
always of 4 DWORDs, thus it takes 4 cycles to send data to the core, one cycle to activate the computation with the
control register \ref{sec:ctrl} and 4 cycles to retrieve the data.
 
The keyexpansion component computes one column of a roundkey in two clock cycles. In
the first cycle the column is substituted throught the s-box, in the second cycle the
shift-operation is executed. AES specifies \cite{NIST:Fips197}, depending on the key length $ N_{roundkeys}=\{10,12,14\} $
roundkeys with 4 columns each. The \gls{FSM} of the keyexpansion module adds o clockcycle for the ``DONE'' state.
\begin{equation}
T_{keyexpansion}(N_{roundkeys}) = 2 \cdot 4 \cdot N_{roundkeys} +1
\label{eqn:keyexp}
\end{equation}
The keyexpansion therefore takes 81, 97 or 115 clockcycles until the encryption or decryption can start. The
roundkeys are stored until invalidated, see \ref{sec:usage} thus this step is is only needed once after power-up until the key changes.
The keyexpansion component computes one column of a roundkey each clock cycle. AES takes, depending on the key length,
10, 12 or 14 roundkeys with each 4 columns, see \cite{NIST:Fips197}. The keyexpansion therefore takes 40, 48 or 56
cycles until the encryption or decryption can start. The roundkeys are stored until invalidated, see \ref{sec:usage}
thus this step is is only needed once after power-up until the key changes.
 
The AES core computes one iteration (round) of the Rijndael-Algorithm each clock cycle, thus a 128 Bit data block is
encrypted or decrypted in 10, 12 or 14 cycles plus an initial round.
360,6 → 356,7
frequency $f_{max}$ of the configuration compared to encryption only versions.
 
\section{Simulation}
\label{sec:simulation}
\subsection{Testbench}
\label{sec:testbench}
In \texttt{./bench/VHDL/} a ``self-checking testbench'' is provided which runs tests
456,7 → 453,8
Mentor Graphics and ModelSim are registered trademarks of Mentor Graphics
Corporation 8005 SW Boeckman Road, Wilsonville OR USA \newpage
 
\printglossaries
\printacronym
\printglossary
 
\bibliography{cited}
\revisionTable
/doc/manual/src/avs_aes.acn
1,9 → 1,30
\glossaryentry{AES?\glossaryentryfield{AES}{\glsnamefont{AES}}{Advanced Encryption Standard}{\relax }|setentrycounter{page}\glsnumberformat}{3}
\glossaryentry{NIST?\glossaryentryfield{NIST}{\glsnamefont{NIST}}{National Institute of Standards and Technology}{\relax }|setentrycounter{page}\glsnumberformat}{3}
\glossaryentry{ECB?\glossaryentryfield{ECB}{\glsnamefont{ECB}}{Electronic Code Book}{\relax }|setentrycounter{page}\glsnumberformat}{3}
\glossaryentry{SoC?\glossaryentryfield{SoC}{\glsnamefont{SoC}}{System on Chip}{\relax }|setentrycounter{page}\glsnumberformat}{3}
\glossaryentry{MSB?\glossaryentryfield{MSB}{\glsnamefont{MSB}}{Most Significant Bit}{\relax }|setentrycounter{page}\glsnumberformat}{4}
\glossaryentry{LSB?\glossaryentryfield{LSB}{\glsnamefont{LSB}}{Least Significant Bit}{\relax }|setentrycounter{page}\glsnumberformat}{4}
\glossaryentry{FSM?\glossaryentryfield{FSM}{\glsnamefont{FSM}}{Finite State Machine}{\relax }|setentrycounter{page}\glsnumberformat}{6}
\glossaryentry{FSM?\glossaryentryfield{FSM}{\glsnamefont{FSM}}{Finite State Machine}{\relax }|setentrycounter{page}\glsnumberformat}{8}
\glossaryentry{FSM?\glossaryentryfield{FSM}{\glsnamefont{FSM}}{Finite State Machine}{\relax }|setentrycounter{page}\glsnumberformat}{10}
\begin{theglossary}\glogroupA
 
\gloitem {\glosslabel{acn:AES}{Advanced Encryption Standard\ (\noexpand \acronymfont {AES})}}NIST approved symmetric block cypher\relax
\glodelim
\glsnumformat{3}\delimT \gloskip \glogroupE
 
\gloitem {\glosslabel{acn:ECB}{Electronic Codebook\ (\noexpand \acronymfont {ECB})}}application of a cypher algorithm without further processing of the blocks\relax
\glodelim
\glsnumformat{3}\delimT \gloskip \glogroupF
 
\gloitem {\glosslabel{acn:FSM}{Finite State Machine\ (\noexpand \acronymfont {FSM})}}Behavioural Model with finite number of states and transitions\relax
\glodelim
\glsnumformat{6}\delimN \glsnumformat{8}\delimT \gloskip \glogroupL
 
\gloitem {\glosslabel{acn:LSB}{Least Significant Bit\ (\noexpand \acronymfont {LSB})}}least value bit in a vector\relax
\glodelim
\glsnumformat{4}\delimT \gloskip \glogroupM
 
\gloitem {\glosslabel{acn:MSB}{Most Significant Bit\ (\noexpand \acronymfont {MSB})}}highest value bit in a vector\relax
\glodelim
\glsnumformat{4}\delimT \gloskip \glogroupN
 
\gloitem {\glosslabel{acn:NIST}{National Institute of Standards and Technology\ (\noexpand \acronymfont {NIST})}}US standardisation office\relax
\glodelim
\glsnumformat{3}\delimT \gloskip \glogroupS
 
\gloitem {\glosslabel{acn:SoC}{System on Chip\ (\noexpand \acronymfont {SoC})}}System of seperate functional interacting together implemented on a single chip\relax
\glodelim
\glsnumformat{3}\delimT
\end{theglossary}
/doc/manual/src/avs_aes.acr
1,26 → 1,8
\glossarysection[\glossarytoctitle]{\glossarytitle}\glossarypreamble
\begin{theglossary}\glossaryheader
\glsgroupheading{A}\relax \glsresetentrylist %
\glossaryentryfield{AES}{\glsnamefont{AES}}{Advanced Encryption Standard}{\relax }{\glossaryentrynumbers{\relax
\setentrycounter{page}\glsnumberformat{3}}}\glsgroupskip
\glsgroupheading{E}\relax \glsresetentrylist %
\glossaryentryfield{ECB}{\glsnamefont{ECB}}{Electronic Code Book}{\relax }{\glossaryentrynumbers{\relax
\setentrycounter{page}\glsnumberformat{3}}}\glsgroupskip
\glsgroupheading{F}\relax \glsresetentrylist %
\glossaryentryfield{FSM}{\glsnamefont{FSM}}{Finite State Machine}{\relax }{\glossaryentrynumbers{\relax
\setentrycounter{page}\glsnumberformat{6}\delimN
\setentrycounter{page}\glsnumberformat{8}\delimN
\setentrycounter{page}\glsnumberformat{10}}}\glsgroupskip
\glsgroupheading{L}\relax \glsresetentrylist %
\glossaryentryfield{LSB}{\glsnamefont{LSB}}{Least Significant Bit}{\relax }{\glossaryentrynumbers{\relax
\setentrycounter{page}\glsnumberformat{4}}}\glsgroupskip
\glsgroupheading{M}\relax \glsresetentrylist %
\glossaryentryfield{MSB}{\glsnamefont{MSB}}{Most Significant Bit}{\relax }{\glossaryentrynumbers{\relax
\setentrycounter{page}\glsnumberformat{4}}}\glsgroupskip
\glsgroupheading{N}\relax \glsresetentrylist %
\glossaryentryfield{NIST}{\glsnamefont{NIST}}{National Institute of Standards and Technology}{\relax }{\glossaryentrynumbers{\relax
\setentrycounter{page}\glsnumberformat{3}}}\glsgroupskip
\glsgroupheading{S}\relax \glsresetentrylist %
\glossaryentryfield{SoC}{\glsnamefont{SoC}}{System on Chip}{\relax }{\glossaryentrynumbers{\relax
\setentrycounter{page}\glsnumberformat{3}}}%
\end{theglossary}\glossarypostamble
\glossaryentry{AES@{\glosslabel{acn:AES}{Advanced Encryption Standard\ (\noexpand \acronymfont {AES})}}NIST approved symmetric block cypher\relax|glsnumformat}{3}
\glossaryentry{NIST@{\glosslabel{acn:NIST}{National Institute of Standards and Technology\ (\noexpand \acronymfont {NIST})}}US standardisation office\relax|glsnumformat}{3}
\glossaryentry{ECB@{\glosslabel{acn:ECB}{Electronic Codebook\ (\noexpand \acronymfont {ECB})}}application of a cypher algorithm without further processing of the blocks\relax|glsnumformat}{3}
\glossaryentry{SoC@{\glosslabel{acn:SoC}{System on Chip\ (\noexpand \acronymfont {SoC})}}System of seperate functional interacting together implemented on a single chip\relax|glsnumformat}{3}
\glossaryentry{MSB@{\glosslabel{acn:MSB}{Most Significant Bit\ (\noexpand \acronymfont {MSB})}}highest value bit in a vector\relax|glsnumformat}{4}
\glossaryentry{LSB@{\glosslabel{acn:LSB}{Least Significant Bit\ (\noexpand \acronymfont {LSB})}}least value bit in a vector\relax|glsnumformat}{4}
\glossaryentry{FSM@{\glosslabel{acn:FSM}{Finite State Machine\ (\noexpand \acronymfont {FSM})}}Behavioural Model with finite number of states and transitions\relax|glsnumformat}{6}
\glossaryentry{FSM@{\glosslabel{acn:FSM}{Finite State Machine\ (\noexpand \acronymfont {FSM})}}Behavioural Model with finite number of states and transitions\relax|glsnumformat}{8}
/doc/manual/src/glossary.tex
1,8 → 1,29
\newacronym{LSB}{LSB}{Least Significant Bit}
\newacronym{MSB}{MSB}{Most Significant Bit}
\newacronym{SoC}{SoC}{System on Chip}
\newacronym{AES}{AES}{Advanced Encryption Standard}
\newacronym{ECB}{ECB}{Electronic Code Book}
\newacronym{FSM}{FSM}{Finite State Machine}
\newacronym{NIST}{NIST}{National Institute of Standards and Technology}
\glossary{name={Byte},
description={String of Bits - nowadays mostly a string of 8 Bits, also called oktett},
sort={Byte}
}
\glossary{name={Bit},
description={Binary Digit, atomary information unit},
sort={Bit}
}
\glossary{name={switch fabric},
description={Interconnect between IP-Cores providing arbiration and glue logic. Altera\rtm\ Avalon\rtm\ term},
sort={Switch fabric}
}
 
\glossary{name={Master},
description={Entity initiating and controlling communication.},
sort={Master}
}
 
\glossary{name={Slave},
description={Entity responding to communication requests by a Master.},
sort={Slave}
}
 
\glossary{name={memory mapped},
description={Method of addressing peripheral components like Avalon Slaves via the same address bus as main memory},
sort={memory mapped}
}
 
/doc/manual/src/acronym.tex
0,0 → 1,15
\newacronym{LSB}{Least Significant Bit}{description=least value bit in a vector}
\newacronym{MSB}{Most Significant Bit}{description=highest value bit in a vector}
\newacronym{SoC}{System on Chip}{description=System of seperate functional interacting together implemented on a single chip }
\newacronym{AES}{Advanced Encryption Standard}{description=NIST approved symmetric
block cypher}
\newacronym{ECB}{Electronic Codebook}{description=application of a cypher algorithm
without further processing of the blocks}
\newacronym{FSM}{Finite State Machine}{description=Behavioural Model with finite
number of states and transitions}
\newacronym{NIST}{National Institute of Standards and Technology}{description=US
standardisation office}
 
 
 
 
doc/manual/src/acronym.tex Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.