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URL https://opencores.org/ocsvn/axi_master/axi_master/trunk

Subversion Repositories axi_master

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  • This comparison shows the changes necessary to convert path
    /axi_master/trunk/src/base
    from Rev 18 to Rev 19
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Rev 18 → Rev 19

/def_axi_master_static.txt
29,8 → 29,8
 
SWAP.GLOBAL MODEL_NAME AXI master stub
 
VERIFY (DATA_BITS <= 64) ##stub supports 32 or 64 bits data bus
VERIFY (SIZE_BITS <= 3) ##stub supports 32 or 64 bits data bus
VERIFY (DATA_BITS in 32, 64) ##stub supports 32 or 64 bits data bus
VERIFY (SIZE_BITS in 2, 3) ##stub supports 32 or 64 bits data bus
 
GROUP STUB_AXI_A is {
ID ID_BITS output
/ic_registry_wr.v
84,6 → 84,9
reg MMX_pending;
reg MMX_pending_d;
wire MMX_pending_rise;
reg SSX_pending;
reg SSX_pending_d;
wire SSX_pending_rise;
97,7 → 100,7
assign cmd_pop_MMX = MMX_WVALID & MMX_WREADY & MMX_WLAST;
assign cmd_pop_MMX_IDGROUP_MMX_ID.IDX = cmd_pop_MMX & Wmatch_MMX_IDGROUP_MMX_ID.IDX;
 
assign cmd_push_SSX = SSX_AWVALID & SSX_AWREADY;
assign cmd_push_SSX = SSX_AWVALID & (SSX_pending ? SSX_pending_rise : SSX_AWREADY);
assign cmd_pop_SSX = SSX_WVALID & SSX_WREADY & SSX_WLAST;
assign master_in_SSX = SSX_AWMSTR;
105,6 → 108,7
 
 
assign MMX_pending_rise = MMX_pending & (~MMX_pending_d);
assign SSX_pending_rise = SSX_pending & (~SSX_pending_d);
always @(posedge clk or posedge reset)
if (reset)
111,14 → 115,19
begin
MMX_pending <= #FFD 1'b0;
MMX_pending_d <= #FFD 1'b0;
SSX_pending <= #FFD 1'b0;
SSX_pending_d <= #FFD 1'b0;
end
else
begin
MMX_pending <= #FFD MMX_AWVALID & (~MMX_AWREADY);
MMX_pending_d <= #FFD MMX_pending;
SSX_pending <= #FFD SSX_AWVALID & (~SSX_AWREADY);
SSX_pending_d <= #FFD SSX_pending;
end
LOOP MX
always @(*)
begin

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