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https://opencores.org/ocsvn/eco32/eco32/trunk
Subversion Repositories eco32
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Rev 314 → Rev 315
/trunk/fpga/experiments/memctrl/sim/README
0,0 → 1,9
Here are three implementations of a memory controller, all |
three intended to be used in simulations. memctrl-0 provides |
a very simple underlying RAM model (word access, constant |
access delays for read and write). memctrl-1 utilizes a more |
realistic SDRAM model (provided by Samsung Electronics). |
memctrl-2 is very similar to memctrl-1, but clocks the test |
circuit with half the frequency (50 MHz) of the SDRAM's |
(and SDRAM controller's) clock (100 MHz). For details see |
the README files in the subdirectories. |