URL
https://opencores.org/ocsvn/ethernet_tri_mode/ethernet_tri_mode/trunk
Subversion Repositories ethernet_tri_mode
Compare Revisions
- This comparison shows the changes necessary to convert path
/ethernet_tri_mode/trunk/rtl/verilog
- from Rev 33 to Rev 32
- ↔ Reverse comparison
Rev 33 → Rev 32
/MAC_rx/MAC_rx_FF.v
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/MAC_rx/MAC_rx_ctrl.v
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/MAC_rx/CRC_chk.v
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/MAC_rx/MAC_rx_add_chk.v
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/MAC_rx/Broadcast_filter.v
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/eth_miim.v
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/MAC_top.v
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/afifo.v
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/reg_int.v
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/MAC_tx.v
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/MAC_rx.v
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/TECH/altera/CLK_DIV2.v
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/TECH/altera/duram.v
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/TECH/altera/CLK_SWITCH.v
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/TECH/xilinx/CLK_DIV2.v
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/TECH/xilinx/duram.v
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/TECH/xilinx/CLK_SWITCH.v
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/TECH/CLK_DIV2.v
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/TECH/duram.v
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/TECH/CLK_SWITCH.v
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/RMON.v
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/MAC_tx/MAC_tx_Ctrl.v
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/MAC_tx/MAC_tx_FF.v
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/MAC_tx/flow_ctrl.v
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/MAC_tx/MAC_tx_addr_add.v
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/MAC_tx/CRC_gen.v
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/MAC_tx/Ramdon_gen.v
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/RMON/RMON_addr_gen.v
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/RMON/RMON_ctrl.v
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/RMON/RMON_dpram.v
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/Clk_ctrl.v
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/header.v
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/Phy_int.v
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/miim/eth_shiftreg.v
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/miim/eth_outputcontrol.v
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/miim/eth_clockgen.v
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/miim/timescale.v
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