URL
https://opencores.org/ocsvn/ethmac/ethmac/trunk
Subversion Repositories ethmac
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- This comparison shows the changes necessary to convert path
/
- from Rev 113 to Rev 112
- ↔ Reverse comparison
Rev 113 → Rev 112
/trunk/rtl/verilog/eth_wishbone.v
41,9 → 41,6
// CVS Revision History |
// |
// $Log: not supported by cvs2svn $ |
// Revision 1.26 2002/07/10 13:12:38 mohor |
// Previous bug wasn't succesfully removed. Now fixed. |
// |
// Revision 1.25 2002/07/09 23:53:24 mohor |
// Master state machine had a bug when switching from master write to |
// master read. |
1523,7 → 1520,7
RxPointerRead <=#Tp 1'b0; |
end |
|
|
reg BlockingIncrementRxPointer; |
//Latching Rx buffer pointer from buffer descriptor; |
always @ (posedge WB_CLK_I or posedge Reset) |
begin |
1533,7 → 1530,7
if(RxEn & RxEn_q & RxPointerRead) |
RxPointer <=#Tp {ram_do[31:2], 2'h0}; |
else |
if(MasterWbRX & m_wb_ack_i) |
if(MasterWbRX & ~BlockingIncrementRxPointer) |
RxPointer <=#Tp RxPointer + 3'h4; // Word access (always word access. m_wb_sel_o are used for selecting bytes) |
end |
|
1566,6 → 1563,19
always @ (posedge WB_CLK_I or posedge Reset) |
begin |
if(Reset) |
BlockingIncrementRxPointer <=#Tp 0; |
else |
if(MasterAccessFinished) |
BlockingIncrementRxPointer <=#Tp 0; |
else |
if(MasterWbRX) |
BlockingIncrementRxPointer <=#Tp 1'b1; |
end |
|
|
always @ (posedge WB_CLK_I or posedge Reset) |
begin |
if(Reset) |
RxEn_needed <=#Tp 1'b0; |
else |
if(~RxBDReady & r_RxEn & WbEn & ~WbEn_q) |