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URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

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    from Rev 190 to Rev 191
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Rev 190 → Rev 191

/trunk/bench/verilog/eth_phy.v
421,7 → 421,9
`ifdef VERBOSE
$fdisplay(phy_log, " (%0t)(%m)MIIM - 32-bit preamble received", $time);
`endif
if (md_io_reg !== 1'b0)
// check start bit only if md_transfer_cnt_reset is inactive, because if
// preamble suppression was changed start bit should not be checked
if ((md_io_reg !== 1'b0) && (md_transfer_cnt_reset == 1'b0))
begin
// ERROR - start !
`ifdef VERBOSE

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