OpenCores
URL https://opencores.org/ocsvn/freeahb/freeahb/trunk

Subversion Repositories freeahb

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  • This comparison shows the changes necessary to convert path 
    /freeahb
    from Rev 6 to Rev 7
    ↔ Reverse comparison
  •

Rev 6 → Rev 7

/trunk/ahb_master.v
133,6 → 133,8
reg [1:0] hwrite;
reg [2:0] hsize [1:0];
reg [B:0] beat;
reg [31:0] addr_mask [1:-1];
reg [1:0] wrap;
 
// Tracks if we are in a pending state.
reg pend_split;
154,7 → 156,7
wire cont = ~i_sof;
 
// Calculate address mask
wire [31:0] addr_mask = get_address_mask (i_wrap, i_min_len, i_size);
always @* addr_mask[-1] = get_address_mask (i_wrap, i_min_len, i_size);
 
// Detects that 1k boundary condition will be crossed on next address
always @*
240,19 → 242,20
begin
// If there's a pending split, perform a pipeline rollback
 
{hwrite[0], hsize[0]} <=
{hwrite[1], hsize[1]};
{hwrite[0], hsize[0], addr_mask[0], wrap[0]} <=
{hwrite[1], hsize[1], addr_mask[1], wrap[1]};
 
hwdata[0] <= unshift(hwdata[1], haddr[1]);
haddr[0] <= haddr[1];
hburst <= compute_hburst(beat, haddr[1], hsize[1], addr_mask, haddr[1], i_wrap);
hburst <= compute_hburst(beat, haddr[1], hsize[1], addr_mask[1], haddr[1], wrap[1]);
htrans[0] <= NONSEQ;
burst_ctr <= compute_burst_ctr(beat, haddr[1], hsize[1], addr_mask, haddr[1]);
burst_ctr <= compute_burst_ctr(beat, haddr[1], hsize[1], addr_mask[1], haddr[1]);
beat_ctr <= beat;
end
else
begin
{hwdata[0], hwrite[0], hsize[0]} <= {i_data, i_wr, i_size};
{hwdata[0], hwrite[0], hsize[0], addr_mask[0] , wrap[0]} <=
{i_data, i_wr, i_size , addr_mask[-1] , i_wrap };
 
if ( !cont && !rd_wr ) // Signal IDLE.
begin
269,7 → 272,7
begin
if ( !cont )
haddr[0] <= i_addr;
else if ( addr_mask[i] )
else if ( addr_mask[-1][i] )
haddr[0][i] <=
(haddr[0] + (rd_wr << i_size)) >> i;
end
277,7 → 280,7
hburst <= compute_hburst (!cont ? i_min_len : beat_ctr,
!cont ? i_addr :
haddr[0] + (rd_wr << i_size) ,
i_size, addr_mask, haddr[0],
i_size, addr_mask[-1], haddr[0],
i_wrap);
 
htrans[0] <= rd_wr ? NONSEQ : IDLE;
285,7 → 288,7
burst_ctr <= compute_burst_ctr(!cont ? i_min_len : beat_ctr - rd_wr,
!cont ? i_addr :
haddr[0] + (rd_wr << i_size) ,
i_size, addr_mask, haddr[0]);
i_size, addr_mask[-1], haddr[0]);
 
beat_ctr <= !cont ? i_min_len : ((hburst == INCR) ? beat_ctr : beat_ctr - rd_wr);
end
296,7 → 299,7
integer i;
 
for(i=0;i<32;i++)
if ( addr_mask[i] )
if ( addr_mask[-1][i] )
haddr[0][i] <=
(haddr[0] + ((htrans[0] != BUSY) << i_size)) >> i;
 
318,8 → 321,8
begin
hwdata[1] <= shift(hwdata[0], haddr[0]);
 
{haddr[1], hwrite[1], hsize[1], htrans[1], beat} <=
{haddr[0], hwrite[0], hsize[0], htrans[0], beat_ctr};
{haddr[1], hwrite[1], hsize[1], htrans[1], addr_mask[1], wrap[1], beat} <=
{haddr[0], hwrite[0], hsize[0], htrans[0], addr_mask[0], wrap[0], beat_ctr};
end
end
 
396,10 → 399,10
addr[i] = prev_addr[i];
 
// Decide type of burst, assume no wrap.
compute_hburst = (val >= 16 && no_cross(addr, 15, sz, addr_mask)) ? INCR16:
(val >= 8 && no_cross(addr, 7, sz, addr_mask)) ? INCR8 :
(val >= 4 && no_cross(addr, 3, sz, addr_mask)) ? INCR4 :
INCR;
compute_hburst = (val >= 16 && no_cross(addr, 15, sz, mask)) ? INCR16 :
(val >= 8 && no_cross(addr, 7, sz, mask)) ? INCR8 :
(val >= 4 && no_cross(addr, 3, sz, mask)) ? INCR4 :
INCR ;
 
// Now, if wrap transfer active, furthe refine the results.
if ( wrap == 1'd1 )
429,14 → 432,15
if ( mask[i] == 1'd0 )
addr[i] = prev_addr[i];
 
compute_burst_ctr = (val >= 16 && no_cross(addr, 15, sz, addr_mask)) ? 5'd16 :
(val >= 8 && no_cross(addr, 7, sz, addr_mask)) ? 5'd8 :
(val >= 4 && no_cross(addr, 3, sz, addr_mask)) ? 5'd4 :
compute_burst_ctr = (val >= 16 && no_cross(addr, 15, sz, mask)) ? 5'd16 :
(val >= 8 && no_cross(addr, 7, sz, mask)) ? 5'd8 :
(val >= 4 && no_cross(addr, 3, sz, mask)) ? 5'd4 :
5'd0;
end
endfunction
 
function no_cross(input [31:0] addr, input [31:0] val, input [2:0] sz, input [31:0] mask);
function no_cross (input [31:0] addr, input [31:0] val,
input [2:0] sz, input [31:0] mask);
reg [31:0] comp_addr;
integer i;
begin

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