URL
https://opencores.org/ocsvn/gpio/gpio/trunk
Subversion Repositories gpio
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 15 to Rev 14
- ↔ Reverse comparison
Rev 15 → Rev 14
/trunk/rtl/verilog/gpio_top.v
45,9 → 45,6
// CVS Revision History |
// |
// $Log: not supported by cvs2svn $ |
// Revision 1.1 2001/09/18 18:49:07 lampret |
// Changed top level ptc into gpio_top. Changed defines.v into gpio_defines.v. |
// |
// Revision 1.1 2001/08/21 21:39:28 lampret |
// Changed directory structure, port names and drfines. |
// |
195,13 → 192,13
assign wb_ack_o = wb_cyc_i & wb_stb_i & !wb_err_o; |
`ifdef GPIO_FULL_DECODE |
`ifdef GPIO_STRICT_32BIT_ACCESS |
assign wb_err_o = wb_cyc_i & wb_stb_i & (!full_decoding | (wb_sel_i != 4'b1111)); |
assign wb_err_o = wb_cyc_i & wb_stb_i & !full_decoding | (wb_sel_i != 4'b1111); |
`else |
assign wb_err_o = wb_cyc_i & wb_stb_i & !full_decoding; |
`endif |
`else |
`ifdef GPIO_STRICT_32BIT_ACCESS |
assign wb_err_o = wb_cyc_i & wb_stb_i & (wb_sel_i != 4'b1111); |
assign wb_err_o = (wb_sel_i != 4'b1111); |
`else |
assign wb_err_o = 1'b0; |
`endif |
337,18 → 334,23
`ifdef GPIO_READREGS |
`GPIO_RGPIO_OUT: begin |
wb_dat_o[dw-1:0] <= {{dw-gw{1'b0}}, rgpio_out}; |
// wb_dat_o[dw-1:gw] <= {dw-gw{1'b0}}; |
end |
`GPIO_RGPIO_OE: begin |
wb_dat_o[dw-1:0] <= {{dw-gw{1'b0}}, rgpio_oe}; |
// wb_dat_o[dw-1:gw] <= {dw-gw{1'b0}}; |
end |
`GPIO_RGPIO_INTE: begin |
wb_dat_o[dw-1:0] <= {{dw-gw{1'b0}}, rgpio_inte}; |
// wb_dat_o[dw-1:gw] <= {dw-gw{1'b0}}; |
end |
`GPIO_RGPIO_PTRIG: begin |
wb_dat_o[dw-1:0] <= {{dw-gw{1'b0}}, rgpio_ptrig}; |
// wb_dat_o[dw-1:gw] <= {dw-gw{1'b0}}; |
end |
`GPIO_RGPIO_AUX: begin |
wb_dat_o[dw-1:0] <= {{dw-gw{1'b0}}, rgpio_aux}; |
// wb_dat_o[dw-1:gw] <= {dw-gw{1'b0}}; |
end |
`GPIO_RGPIO_CTRL: begin |
wb_dat_o[3:0] <= rgpio_ctrl; |
357,6 → 359,7
`endif |
default: begin |
wb_dat_o[dw-1:0] <= {{dw-gw{1'b0}}, rgpio_in}; |
// wb_dat_o[dw-1:gw] <= {dw-gw{1'b0}}; |
end |
endcase |
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