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URL https://opencores.org/ocsvn/i650/i650/trunk

Subversion Repositories i650

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  • This comparison shows the changes necessary to convert path 
    /i650
    from Rev 17 to Rev 18
    ↔ Reverse comparison
  •

Rev 17 → Rev 18

/trunk/rtl/accumulator.v
32,7 → 32,7
module accumulator (
input rst,
input ap, bp, dp,
input d1, d2, d10,
input dx, d1, d2, d10,
input dxu, d0u,
input wu, wl,
input [0:6] adder_out,
47,7 → 47,7
//-----------------------------------------------------------------------------
reg [0:6] digits [0:31];
wire [0:4] acc_early_idx = {(d10? ~wu : wu), early_idx};
wire [0:4] acc_early_idx = {(dx? ~wu : wu), early_idx};
wire [0:4] acc_ontime_idx = {wu, ontime_idx};
//-----------------------------------------------------------------------------
56,7 → 56,7
//-----------------------------------------------------------------------------
wire acc_reset = reset_op_latch | man_acc_reset
| (zero_shift_count & wl & (d1 | d2));
always @(posedge ap) begin
always @(posedge ap)
if (rst) begin
early_out <= `biq_blank;
ontime_out <= `biq_blank;
64,13 → 64,12
early_out <= reset_op_latch? `biq_0
: digits[acc_early_idx];
ontime_out <= (acc_reset | d0u | dxu)? `biq_0 : early_out;
end
end;
end;
//-----------------------------------------------------------------------------
// B -- Read into ped_out
//-----------------------------------------------------------------------------
always @(posedge bp) begin
always @(posedge bp)
if (rst) begin
ped_out <= `biq_blank;
end else begin
78,14 → 77,12
: acc_ri_gate? adder_out
: acc_regen_gate? ontime_out
: `biq_blank;
end
end;
end;
//-----------------------------------------------------------------------------
// D -- Write ped_out into RAM
//-----------------------------------------------------------------------------
always @(posedge dp) begin
always @(posedge dp)
digits[acc_ontime_idx] <= ped_out;
end;
 
endmodule
/trunk/rtl/timing.v
121,7 → 121,7
word_ctr <= 4'd0;
sector_ctr <= 4'd0;
digit_idx <= 10'd599;
early_idx <= 4'd10;
early_idx <= 4'd0;
ontime_idx <= 4'd11;
end else begin
digit_idx <= (digit_idx + 1) % 600;
/trunk/rtl/toplev.v
120,6 → 120,12
wire [0:6] ac_early_out, ac_ontime_out, ac_ped_out;
//-----------------------------------------------------------------------------
// Register validity checking
//-----------------------------------------------------------------------------
wire ck_error_stop, ck_acc_check_light, ck_prog_check_light,
ck_dist_check_light;
//-----------------------------------------------------------------------------
// General storage
//-----------------------------------------------------------------------------
wire [0:4] gs_out;
150,7 → 156,8
.rst(rst),
.ap(ap),
.bp(bp),
.dp(dp),
.dp(dp),
.dx(dx),
.d1(d1),
.d2(d2),
.d10(d10),
172,6 → 179,21
.ped_out(ac_ped_out)
);
 
checking ck (
.rst(rst),
.bp(bp),
.d1_dx(d1_dx),
.acc_ontime(ac_ontime_out),
.prog_ontime(7'b0),
.dist_ontime(7'b0),
.error_reset(oc_err_reset),
.tlu_or_zero_check(1'b0),
.error_stop(ck_error_stop),
.acc_check_light(ck_acc_check_light),
.prog_check_light(ck_prog_check_light),
.dist_check_light(ck_dist_check_light)
);
 
gen_store gs (
.rst(oc_hard_reset),
.ap(ap),

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