URL
https://opencores.org/ocsvn/light8080/light8080/trunk
Subversion Repositories light8080
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/readme.txt
2,25 → 2,25
The test programs have been assembled with TASM (Telemark Cross Assembler), |
a free assembler available for DOS and Linux. |
|
A few test benches and demos are included in the /sw directory. All of them |
assume you have installed the TASM assembler and include a build BAT script, so |
they should be easy to |
|
A few Modelsim simulation scripts are included to assist in running the test |
benches with that simulator. They are in the synthesis directory. |
The scripts expect that Modelsim's current directory is the synthesis directory. |
benches with that simulator. They are in the /sim directory. |
The scripts expect that Modelsim's current directory is the /sim directory. |
(you can change the working directory with 'File'->'change directory'). |
If you don't use Modelsim standalone but from within an IDE, there's a couple |
of independent scripts to help you organize the test signals. |
|
A CP/M port for a Cyclone 2 starter board will eventually be included as a demo. |
It is still incomplete (a lot of necessary files haven't yet been uploaded to |
SVN) and unfinished. |
By examining the build scripts and the modelsim scripts it should be easy to |
identify what parts of the |
|
|
FILE LIST |
========== |
Most relevant files |
=================== |
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vhdl\light8080.vhdl Core source (single file) |
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vhdl\test\light8080_tb0.vhdl Test bench 0 (Kelly test) |
vhdl\test\light8080_tb1.vhdl Test bench 1 (Interrupts) |
vhdl\test\light8080_tb.vhdl Test bench entity (without object code) |
|
vhdl\demo\cs2b_4kbasic_cpu.vhdl altair 4K Basic demo on DE-1 board |
vhdl\demo\cs2b_4kbasic_rom.vhdl ROM/RAM for 4K Basic demo |
28,38 → 28,40
vhdl\demo\rs232_rx.vhdl Serial rx code for demo |
vhdl\demo\c2sb_4kbasic.csv Pin assignment file for Quartus II |
|
verilog\rtl\ Verilog files of CPU and SOC |
verilog\bench\ Verilog light8080 SOC testbench |
verilog\sim\icarus Verilog simulation files for Icarus |
verilog\syn\altera_c2 Altera Quartus project file (Cyclone II) |
verilog\syn\xilinx_s3 Xilinx ISE project file (Spartan 3) |
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util\uasm.pl Microcode assembler |
util\microrom.bat Sample DOS bat file for assembler |
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ucode\light8080.m80 Microcode source file |
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synthesis\sim_tb0.do Modelsim script for test bench 0 |
synthesis\sim_tb1.do Modelsim script for test bench 1 |
synthesis\tb0_modelsim_wave.do Script with wave format and colors, tb0 |
synthesis\tb1_modelsim_wave.do Script with wave format and colors, tb1 |
sim\sim_tb0.do Modelsim script for test bench 0 |
sim\sim_tb1.do Modelsim script for test bench 1 |
|
doc\designNotes.tex Core documentation in LaTeX format |
doc\designNotes.pdf Core documentation in PDF format |
doc\Light8080 Core Specifications.odf Specs doc for the VHDL/Verilog core |
|
asm\tb0.asm Test bench 0 program assembler source |
asm\tb1.asm Test bench 1 program assembler source |
asm\hexconv.pl Intel HEX to VHDL converter |
asm\tasmtb.bat BATCH script to build the test benches |
asm\readme.txt How to assemble the sources |
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verilog\rtl\ contains the Verilog files of the light8080 CPU and SOC |
verilog\bench\ Verilog light8080 SOC testbench |
verilog\sim\icarus files used for Verilog simulation using Icaru Verilog |
verilog\syn\altera_c2 Altera Quartus project file ucing Cyclone II FPGA |
verilog\syn\xilinx_s3 Xilinx ISE project file ucing Spartan 3 FPGA |
sw\tb\tb0.asm Test bench 0 source |
sw\tb\tb1.asm Test bench 1 source |
sw\tb\soc_tb.vhdl Test bench for VHDL SoC |
sw\demo\hello.asm 'Hello World' for VHDL SoC on DE-1 board |
sw\demo\c2sb VHDL top entity for DE-1 board demos |
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c\ Hello World Small-C light8080 SOC sample |
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tools\c80\ C80 compiler and AS80 assembler tools used to compile |
the C example program. The c80.exe executable was compiled |
using tcc (Tiny C Compiler). |
|
tools\ihex2vlog\ Intel HEX to Verilog tool used to generate the Verilog |
program & RAM memory file used by the verilog SOC. |
The ihex2vlog.exe executable was compiled using tcc |
(Tiny C Compiler). |
tools\readme.txt Brief description of all the tools. |
tools\c80\ C80 compiler and AS80 assembler tools |
used to compile the C example program. |
Compiled with TCC (Tiny C Compiler). |
tools\ihex2vlog\ Intel HEX to Verilog tool used to |
generate the Verilog program & RAM |
memory file used by the verilog SOC. |
Compiled with TCC (Tiny C Compiler). |
tools\obj2hdl HEX to VHDL conversion tool. |
tools\hexconv Deprecated HEX to VHDL conversion tool. |