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trunk/xilinx_primitives.zip Property changes : Added: svn:mime-type ## -0,0 +1 ## +application/octet-stream \ No newline at end of property Index: trunk/scode/tmr_wdt.asm =================================================================== --- trunk/scode/tmr_wdt.asm (nonexistent) +++ trunk/scode/tmr_wdt.asm (revision 3) @@ -0,0 +1,155 @@ +;///////////////////////////////////////////////////////////////////// +;//// //// +;//// Mini-RISC-1 //// +;//// Timer / Wachdog //// +;//// Tests Timer / Wachdog //// +;//// //// +;//// Author: Rudolf Usselmann //// +;//// russelmann@hotmail.com //// +;//// //// +;///////////////////////////////////////////////////////////////////// +;//// //// +;//// Copyright (C) 2000 Rudolf Usselmann //// +;//// russelmann@hotmail.com //// +;//// //// +;//// This source file may be used and distributed without //// +;//// restriction provided that this copyright statement is not //// +;//// removed from the file and that any derivative work contains //// +;//// the original copyright notice and the associated disclaimer.//// +;//// //// +;//// THIS SOURCE FILE IS PROVIDED "AS IS" AND WITHOUT ANY //// +;//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, WITHOUT //// +;//// LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND //// +;//// FITNESS FOR A PARTICULAR PURPOSE. //// +;//// //// +;///////////////////////////////////////////////////////////////////// + + list p=16c57 + #include p16c5x.inc + +; global Registers +r0 equ 0x8 +r1 equ 0x9 +r2 equ 0xa +r3 equ 0xb +r4 equ 0xc +r5 equ 0xd +r6 equ 0xe +r7 equ 0xf + +; banked Registers +br0 equ 0x10 +br1 equ 0x11 +br2 equ 0x12 +br3 equ 0x13 +br4 equ 0x14 +br5 equ 0x15 +br6 equ 0x16 +br7 equ 0x17 +br8 equ 0x18 +br9 equ 0x19 +br10 equ 0x1a +br11 equ 0x1b +br12 equ 0x1c +br13 equ 0x1d +br14 equ 0x1e +br15 equ 0x1f + + +; PORTB Indicates Test Number +; PORTA Indicates Status: 0 - Running; 1 - done OK; ff - stoped on error + +main ; Main code entry + ; Port IO Test + ; All ports have a Pull up resistor + + ; SETUP all ports + clrw + movwf FSR + movwf PORTA + movwf PORTB + movwf PORTC + tris PORTA + tris PORTB + tris PORTC + + ; --------------------------------------- + ; ---- Test RMW on Register fil ---- + ; --------------------------------------- + + movlw 0x01 ; TEST 1 + movwf PORTB ; Set Test Number + + movlw 0x00 + option + movwf TMR0 + clrwdt + nop + nop + nop + nop + + clrw + movwf r1 + +loop2 ; repeat 256 times + clrw + movwf r0 + + + ; repeat 256 times +loop1 + movfw TMR0 + decfsz r0,F + goto loop1 + + decfsz r1,F + goto loop2 + + + + nop + nop + nop + nop + nop + nop + + clrw + movwf TMR0 + clrwdt + + nop + nop + nop + nop + movlw 0x01 + movwf PORTA + nop + nop + nop + nop +good ; Loop in good on success + goto good + nop + nop + nop + nop + +lerr + movlw 0xff + movwf PORTA + + nop + nop + nop + nop +lerr_loop ; Loop in lerr on failure + goto lerr_loop + nop + nop + nop + nop + + END + Index: trunk/scode/rf1.rom =================================================================== --- trunk/scode/rf1.rom (nonexistent) +++ trunk/scode/rf1.rom (revision 3) @@ -0,0 +1,584 @@ + +@000 040 +@001 024 +@002 025 +@003 026 +@004 027 +@005 005 +@006 006 +@007 007 +@008 5A3 +@009 C81 +@00A 028 +@00B C82 +@00C 029 +@00D C83 +@00E 02A +@00F C84 +@010 02B +@011 C85 +@012 02C +@013 C86 +@014 02D +@015 C87 +@016 02E +@017 C88 +@018 02F +@019 C90 +@01A 030 +@01B C91 +@01C 031 +@01D C92 +@01E 032 +@01F C93 +@020 033 +@021 C94 +@022 034 +@023 C95 +@024 035 +@025 C96 +@026 036 +@027 C97 +@028 037 +@029 C98 +@02A 038 +@02B C99 +@02C 039 +@02D C9A +@02E 03A +@02F C9B +@030 03B +@031 C9C +@032 03C +@033 C9D +@034 03D +@035 C9E +@036 03E +@037 C9F +@038 03F +@039 5A4 +@03A CA0 +@03B 030 +@03C CA1 +@03D 031 +@03E CA2 +@03F 032 +@040 CA3 +@041 033 +@042 CA4 +@043 034 +@044 CA5 +@045 035 +@046 CA6 +@047 036 +@048 CA7 +@049 037 +@04A CA8 +@04B 038 +@04C CA9 +@04D 039 +@04E CAA +@04F 03A +@050 CAB +@051 03B +@052 CAC +@053 03C +@054 CAD +@055 03D +@056 CAE +@057 03E +@058 CAF +@059 03F +@05A 4A4 +@05B 5C4 +@05C CB0 +@05D 030 +@05E CB1 +@05F 031 +@060 CB2 +@061 032 +@062 CB3 +@063 033 +@064 CB4 +@065 034 +@066 CB5 +@067 035 +@068 CB6 +@069 036 +@06A CB7 +@06B 037 +@06C CB8 +@06D 038 +@06E CB9 +@06F 039 +@070 CBA +@071 03A +@072 CBB +@073 03B +@074 CBC +@075 03C +@076 CBD +@077 03D +@078 CBE +@079 03E +@07A CBF +@07B 03F +@07C 5A4 +@07D 5C4 +@07E CC0 +@07F 030 +@080 CC1 +@081 031 +@082 CC2 +@083 032 +@084 CC3 +@085 033 +@086 CC4 +@087 034 +@088 CC5 +@089 035 +@08A CC6 +@08B 036 +@08C CC7 +@08D 037 +@08E CC8 +@08F 038 +@090 CC9 +@091 039 +@092 CCA +@093 03A +@094 CCB +@095 03B +@096 CCC +@097 03C +@098 CCD +@099 03D +@09A CCE +@09B 03E +@09C CCF +@09D 03F +@09E C01 +@09F 026 +@0A0 040 +@0A1 024 +@0A2 C81 +@0A3 088 +@0A4 743 +@0A5 A3C +@0A6 C82 +@0A7 089 +@0A8 743 +@0A9 A3C +@0AA C83 +@0AB 08A +@0AC 743 +@0AD A3C +@0AE C84 +@0AF 08B +@0B0 743 +@0B1 A3C +@0B2 C85 +@0B3 08C +@0B4 743 +@0B5 A3C +@0B6 C86 +@0B7 08D +@0B8 743 +@0B9 A3C +@0BA C87 +@0BB 08E +@0BC 743 +@0BD A3C +@0BE C88 +@0BF 08F +@0C0 743 +@0C1 A3C +@0C2 C90 +@0C3 090 +@0C4 743 +@0C5 A3C +@0C6 C91 +@0C7 091 +@0C8 743 +@0C9 A3C +@0CA C92 +@0CB 092 +@0CC 743 +@0CD A3C +@0CE C93 +@0CF 093 +@0D0 743 +@0D1 A3C +@0D2 C94 +@0D3 094 +@0D4 743 +@0D5 A3C +@0D6 C95 +@0D7 095 +@0D8 743 +@0D9 A3C +@0DA C96 +@0DB 096 +@0DC 743 +@0DD A3C +@0DE C97 +@0DF 097 +@0E0 743 +@0E1 A3C +@0E2 C98 +@0E3 098 +@0E4 743 +@0E5 A3C +@0E6 C99 +@0E7 099 +@0E8 743 +@0E9 A3C +@0EA C9A +@0EB 09A +@0EC 743 +@0ED A3C +@0EE C9B +@0EF 09B +@0F0 743 +@0F1 A3C +@0F2 C9C +@0F3 09C +@0F4 743 +@0F5 A3C +@0F6 C9D +@0F7 09D +@0F8 743 +@0F9 A3C +@0FA C9E +@0FB 09E +@0FC 743 +@0FD A3C +@0FE C9F +@0FF 09F +@100 743 +@101 A3C +@102 C02 +@103 026 +@104 5A4 +@105 C81 +@106 088 +@107 743 +@108 A3C +@109 C82 +@10A 089 +@10B 743 +@10C A3C +@10D C83 +@10E 08A +@10F 743 +@110 A3C +@111 C84 +@112 08B +@113 743 +@114 A3C +@115 C85 +@116 08C +@117 743 +@118 A3C +@119 C86 +@11A 08D +@11B 743 +@11C A3C +@11D C87 +@11E 08E +@11F 743 +@120 A3C +@121 C88 +@122 08F +@123 743 +@124 A3C +@125 CA0 +@126 090 +@127 743 +@128 A3C +@129 CA1 +@12A 091 +@12B 743 +@12C A3C +@12D CA2 +@12E 092 +@12F 743 +@130 A3C +@131 CA3 +@132 093 +@133 743 +@134 A3C +@135 CA4 +@136 094 +@137 743 +@138 A3C +@139 CA5 +@13A 095 +@13B 743 +@13C A3C +@13D CA6 +@13E 096 +@13F 743 +@140 A3C +@141 CA7 +@142 097 +@143 743 +@144 A3C +@145 CA8 +@146 098 +@147 743 +@148 A3C +@149 CA9 +@14A 099 +@14B 743 +@14C A3C +@14D CAA +@14E 09A +@14F 743 +@150 A3C +@151 CAB +@152 09B +@153 743 +@154 A3C +@155 CAC +@156 09C +@157 743 +@158 A3C +@159 CAD +@15A 09D +@15B 743 +@15C A3C +@15D CAE +@15E 09E +@15F 743 +@160 A3C +@161 CAF +@162 09F +@163 743 +@164 A3C +@165 C03 +@166 026 +@167 4A4 +@168 5C4 +@169 C81 +@16A 088 +@16B 743 +@16C A3C +@16D C82 +@16E 089 +@16F 743 +@170 A3C +@171 C83 +@172 08A +@173 743 +@174 A3C +@175 C84 +@176 08B +@177 743 +@178 A3C +@179 C85 +@17A 08C +@17B 743 +@17C A3C +@17D C86 +@17E 08D +@17F 743 +@180 A3C +@181 C87 +@182 08E +@183 743 +@184 A3C +@185 C88 +@186 08F +@187 743 +@188 A3C +@189 CB0 +@18A 090 +@18B 743 +@18C A3C +@18D CB1 +@18E 091 +@18F 743 +@190 A3C +@191 CB2 +@192 092 +@193 743 +@194 A3C +@195 CB3 +@196 093 +@197 743 +@198 A3C +@199 CB4 +@19A 094 +@19B 743 +@19C A3C +@19D CB5 +@19E 095 +@19F 743 +@1A0 A3C +@1A1 CB6 +@1A2 096 +@1A3 743 +@1A4 A3C +@1A5 CB7 +@1A6 097 +@1A7 743 +@1A8 A3C +@1A9 CB8 +@1AA 098 +@1AB 743 +@1AC A3C +@1AD CB9 +@1AE 099 +@1AF 743 +@1B0 A3C +@1B1 CBA +@1B2 09A +@1B3 743 +@1B4 A3C +@1B5 CBB +@1B6 09B +@1B7 743 +@1B8 A3C +@1B9 CBC +@1BA 09C +@1BB 743 +@1BC A3C +@1BD CBD +@1BE 09D +@1BF 743 +@1C0 A3C +@1C1 CBE +@1C2 09E +@1C3 743 +@1C4 A3C +@1C5 CBF +@1C6 09F +@1C7 743 +@1C8 A3C +@1C9 C04 +@1CA 026 +@1CB 5A4 +@1CC 5C4 +@1CD C81 +@1CE 088 +@1CF 743 +@1D0 A3C +@1D1 C82 +@1D2 089 +@1D3 743 +@1D4 A3C +@1D5 C83 +@1D6 08A +@1D7 743 +@1D8 A3C +@1D9 C84 +@1DA 08B +@1DB 743 +@1DC A3C +@1DD C85 +@1DE 08C +@1DF 743 +@1E0 A3C +@1E1 C86 +@1E2 08D +@1E3 743 +@1E4 A3C +@1E5 C87 +@1E6 08E +@1E7 743 +@1E8 A3C +@1E9 C88 +@1EA 08F +@1EB 743 +@1EC A3C +@1ED CC0 +@1EE 090 +@1EF 743 +@1F0 A3C +@1F1 CC1 +@1F2 091 +@1F3 743 +@1F4 A3C +@1F5 CC2 +@1F6 092 +@1F7 743 +@1F8 A3C +@1F9 CC3 +@1FA 093 +@1FB 743 +@1FC A3C +@1FD CC4 +@1FE 094 +@1FF 743 +@200 A3C +@201 CC5 +@202 095 +@203 743 +@204 A3C +@205 CC6 +@206 096 +@207 743 +@208 A3C +@209 CC7 +@20A 097 +@20B 743 +@20C A3C +@20D CC8 +@20E 098 +@20F 743 +@210 A3C +@211 CC9 +@212 099 +@213 743 +@214 A3C +@215 CCA +@216 09A +@217 743 +@218 A3C +@219 CCB +@21A 09B +@21B 743 +@21C A3C +@21D CCC +@21E 09C +@21F 743 +@220 A3C +@221 CCD +@222 09D +@223 743 +@224 A3C +@225 CCE +@226 09E +@227 743 +@228 A3C +@229 CCF +@22A 09F +@22B 743 +@22C A3C +@22D 000 +@22E 000 +@22F 000 +@230 000 +@231 C01 +@232 025 +@233 000 +@234 000 +@235 000 +@236 000 +@237 A37 +@238 000 +@239 000 +@23A 000 +@23B 000 +@23C CFF +@23D 025 +@23E 000 +@23F 000 +@240 000 +@241 000 +@242 A42 +@243 000 +@244 000 +@245 000 +@246 000 Index: trunk/scode/sanity1.rom =================================================================== --- trunk/scode/sanity1.rom (nonexistent) +++ trunk/scode/sanity1.rom (revision 3) @@ -0,0 +1,181 @@ + +@000 040 +@001 025 +@002 026 +@003 027 +@004 FFF +@005 005 +@006 006 +@007 007 +@008 705 +@009 AAF +@00A 725 +@00B AAF +@00C 745 +@00D AAF +@00E 765 +@00F AAF +@010 785 +@011 AAF +@012 7A5 +@013 AAF +@014 7C5 +@015 AAF +@016 7E5 +@017 AAF +@018 706 +@019 AAF +@01A 726 +@01B AAF +@01C 746 +@01D AAF +@01E 766 +@01F AAF +@020 786 +@021 AAF +@022 7A6 +@023 AAF +@024 7C6 +@025 AAF +@026 7E6 +@027 AAF +@028 707 +@029 AAF +@02A 727 +@02B AAF +@02C 747 +@02D AAF +@02E 767 +@02F AAF +@030 787 +@031 AAF +@032 7A7 +@033 AAF +@034 7C5 +@035 AAF +@036 7E7 +@037 AAF +@038 040 +@039 005 +@03A 006 +@03B 007 +@03C 040 +@03D FAA +@03E 025 +@03F 026 +@040 027 +@041 605 +@042 AAF +@043 725 +@044 AAF +@045 645 +@046 AAF +@047 765 +@048 AAF +@049 685 +@04A AAF +@04B 7A5 +@04C AAF +@04D 6C5 +@04E AAF +@04F 7E5 +@050 AAF +@051 606 +@052 AAF +@053 726 +@054 AAF +@055 646 +@056 AAF +@057 766 +@058 AAF +@059 686 +@05A AAF +@05B 7A6 +@05C AAF +@05D 6C6 +@05E AAF +@05F 7E6 +@060 AAF +@061 607 +@062 AAF +@063 727 +@064 AAF +@065 647 +@066 AAF +@067 767 +@068 AAF +@069 687 +@06A AAF +@06B 7A7 +@06C AAF +@06D 6C7 +@06E AAF +@06F 7E7 +@070 AAF +@071 040 +@072 F55 +@073 025 +@074 026 +@075 027 +@076 705 +@077 AAF +@078 625 +@079 AAF +@07A 745 +@07B AAF +@07C 665 +@07D AAF +@07E 785 +@07F AAF +@080 6A5 +@081 AAF +@082 7C5 +@083 AAF +@084 6E5 +@085 AAF +@086 706 +@087 AAF +@088 626 +@089 AAF +@08A 746 +@08B AAF +@08C 666 +@08D AAF +@08E 786 +@08F AAF +@090 6A6 +@091 AAF +@092 7C6 +@093 AAF +@094 6E6 +@095 AAF +@096 707 +@097 AAF +@098 627 +@099 AAF +@09A 747 +@09B AAF +@09C 667 +@09D AAF +@09E 787 +@09F AAF +@0A0 6A7 +@0A1 AAF +@0A2 7C7 +@0A3 AAF +@0A4 6E7 +@0A5 AAF +@0A6 000 +@0A7 000 +@0A8 000 +@0A9 000 +@0AA AAA +@0AB 000 +@0AC 000 +@0AD 000 +@0AE 000 +@0AF AAF +@0B0 000 +@0B1 000 +@0B2 000 +@0B3 000 Index: trunk/scode/rf2.rom =================================================================== --- trunk/scode/rf2.rom (nonexistent) +++ trunk/scode/rf2.rom (revision 3) @@ -0,0 +1,720 @@ + +@000 040 +@001 024 +@002 025 +@003 026 +@004 027 +@005 005 +@006 006 +@007 007 +@008 5A3 +@009 C81 +@00A 028 +@00B C82 +@00C 029 +@00D C83 +@00E 02A +@00F C84 +@010 02B +@011 C85 +@012 02C +@013 C86 +@014 02D +@015 C87 +@016 02E +@017 C88 +@018 02F +@019 C90 +@01A 030 +@01B C91 +@01C 031 +@01D C92 +@01E 032 +@01F C93 +@020 033 +@021 C94 +@022 034 +@023 C95 +@024 035 +@025 C96 +@026 036 +@027 C97 +@028 037 +@029 C98 +@02A 038 +@02B C99 +@02C 039 +@02D C9A +@02E 03A +@02F C9B +@030 03B +@031 C9C +@032 03C +@033 C9D +@034 03D +@035 C9E +@036 03E +@037 C9F +@038 03F +@039 5A4 +@03A CA0 +@03B 030 +@03C CA1 +@03D 031 +@03E CA2 +@03F 032 +@040 CA3 +@041 033 +@042 CA4 +@043 034 +@044 CA5 +@045 035 +@046 CA6 +@047 036 +@048 CA7 +@049 037 +@04A CA8 +@04B 038 +@04C CA9 +@04D 039 +@04E CAA +@04F 03A +@050 CAB +@051 03B +@052 CAC +@053 03C +@054 CAD +@055 03D +@056 CAE +@057 03E +@058 CAF +@059 03F +@05A 4A4 +@05B 5C4 +@05C CB0 +@05D 030 +@05E CB1 +@05F 031 +@060 CB2 +@061 032 +@062 CB3 +@063 033 +@064 CB4 +@065 034 +@066 CB5 +@067 035 +@068 CB6 +@069 036 +@06A CB7 +@06B 037 +@06C CB8 +@06D 038 +@06E CB9 +@06F 039 +@070 CBA +@071 03A +@072 CBB +@073 03B +@074 CBC +@075 03C +@076 CBD +@077 03D +@078 CBE +@079 03E +@07A CBF +@07B 03F +@07C 5A4 +@07D 5C4 +@07E CC0 +@07F 030 +@080 CC1 +@081 031 +@082 CC2 +@083 032 +@084 CC3 +@085 033 +@086 CC4 +@087 034 +@088 CC5 +@089 035 +@08A CC6 +@08B 036 +@08C CC7 +@08D 037 +@08E CC8 +@08F 038 +@090 CC9 +@091 039 +@092 CCA +@093 03A +@094 CCB +@095 03B +@096 CCC +@097 03C +@098 CCD +@099 03D +@09A CCE +@09B 03E +@09C CCF +@09D 03F +@09E C08 +@09F 024 +@0A0 260 +@0A1 2A4 +@0A2 260 +@0A3 2A4 +@0A4 260 +@0A5 2A4 +@0A6 260 +@0A7 2A4 +@0A8 260 +@0A9 2A4 +@0AA 260 +@0AB 2A4 +@0AC 260 +@0AD 2A4 +@0AE 260 +@0AF 2A4 +@0B0 C10 +@0B1 024 +@0B2 260 +@0B3 2A4 +@0B4 260 +@0B5 2A4 +@0B6 260 +@0B7 2A4 +@0B8 260 +@0B9 2A4 +@0BA 260 +@0BB 2A4 +@0BC 260 +@0BD 2A4 +@0BE 260 +@0BF 2A4 +@0C0 260 +@0C1 2A4 +@0C2 260 +@0C3 2A4 +@0C4 260 +@0C5 2A4 +@0C6 260 +@0C7 2A4 +@0C8 260 +@0C9 2A4 +@0CA 260 +@0CB 2A4 +@0CC 260 +@0CD 2A4 +@0CE 260 +@0CF 2A4 +@0D0 260 +@0D1 2A4 +@0D2 C10 +@0D3 024 +@0D4 5A4 +@0D5 260 +@0D6 2A4 +@0D7 260 +@0D8 2A4 +@0D9 260 +@0DA 2A4 +@0DB 260 +@0DC 2A4 +@0DD 260 +@0DE 2A4 +@0DF 260 +@0E0 2A4 +@0E1 260 +@0E2 2A4 +@0E3 260 +@0E4 2A4 +@0E5 260 +@0E6 2A4 +@0E7 260 +@0E8 2A4 +@0E9 260 +@0EA 2A4 +@0EB 260 +@0EC 2A4 +@0ED 260 +@0EE 2A4 +@0EF 260 +@0F0 2A4 +@0F1 260 +@0F2 2A4 +@0F3 260 +@0F4 2A4 +@0F5 C10 +@0F6 024 +@0F7 5C4 +@0F8 260 +@0F9 2A4 +@0FA 260 +@0FB 2A4 +@0FC 260 +@0FD 2A4 +@0FE 260 +@0FF 2A4 +@100 260 +@101 2A4 +@102 260 +@103 2A4 +@104 260 +@105 2A4 +@106 260 +@107 2A4 +@108 260 +@109 2A4 +@10A 260 +@10B 2A4 +@10C 260 +@10D 2A4 +@10E 260 +@10F 2A4 +@110 260 +@111 2A4 +@112 260 +@113 2A4 +@114 260 +@115 2A4 +@116 260 +@117 2A4 +@118 C10 +@119 024 +@11A 5A4 +@11B 5C4 +@11C 260 +@11D 2A4 +@11E 260 +@11F 2A4 +@120 260 +@121 2A4 +@122 260 +@123 2A4 +@124 260 +@125 2A4 +@126 260 +@127 2A4 +@128 260 +@129 2A4 +@12A 260 +@12B 2A4 +@12C 260 +@12D 2A4 +@12E 260 +@12F 2A4 +@130 260 +@131 2A4 +@132 260 +@133 2A4 +@134 260 +@135 2A4 +@136 260 +@137 2A4 +@138 260 +@139 2A4 +@13A 260 +@13B 2A4 +@13C C01 +@13D 026 +@13E C08 +@13F 024 +@140 C7E +@141 080 +@142 743 +@143 AC4 +@144 C7D +@145 2A4 +@146 080 +@147 743 +@148 AC4 +@149 C7C +@14A 2A4 +@14B 080 +@14C 743 +@14D AC4 +@14E C7B +@14F 2A4 +@150 080 +@151 743 +@152 AC4 +@153 C7A +@154 2A4 +@155 080 +@156 743 +@157 AC4 +@158 C79 +@159 2A4 +@15A 080 +@15B 743 +@15C AC4 +@15D C78 +@15E 2A4 +@15F 080 +@160 743 +@161 AC4 +@162 C77 +@163 2A4 +@164 080 +@165 743 +@166 AC4 +@167 C10 +@168 024 +@169 C6F +@16A 080 +@16B 743 +@16C AC4 +@16D C6E +@16E 2A4 +@16F 080 +@170 743 +@171 AC4 +@172 C6D +@173 2A4 +@174 080 +@175 743 +@176 AC4 +@177 C6C +@178 2A4 +@179 080 +@17A 743 +@17B AC4 +@17C C6B +@17D 2A4 +@17E 080 +@17F 743 +@180 AC4 +@181 C6A +@182 2A4 +@183 080 +@184 743 +@185 AC4 +@186 C69 +@187 2A4 +@188 080 +@189 743 +@18A AC4 +@18B C68 +@18C 2A4 +@18D 080 +@18E 743 +@18F AC4 +@190 C67 +@191 2A4 +@192 080 +@193 743 +@194 AC4 +@195 C66 +@196 2A4 +@197 080 +@198 743 +@199 AC4 +@19A C65 +@19B 2A4 +@19C 080 +@19D 743 +@19E AC4 +@19F C64 +@1A0 2A4 +@1A1 080 +@1A2 743 +@1A3 AC4 +@1A4 C63 +@1A5 2A4 +@1A6 080 +@1A7 743 +@1A8 AC4 +@1A9 C62 +@1AA 2A4 +@1AB 080 +@1AC 743 +@1AD AC4 +@1AE C61 +@1AF 2A4 +@1B0 080 +@1B1 743 +@1B2 AC4 +@1B3 C60 +@1B4 2A4 +@1B5 080 +@1B6 743 +@1B7 AC4 +@1B8 C02 +@1B9 026 +@1BA C10 +@1BB 024 +@1BC 5A4 +@1BD C5F +@1BE 080 +@1BF 743 +@1C0 AC4 +@1C1 C5E +@1C2 2A4 +@1C3 080 +@1C4 743 +@1C5 AC4 +@1C6 C5D +@1C7 2A4 +@1C8 080 +@1C9 743 +@1CA AC4 +@1CB C5C +@1CC 2A4 +@1CD 080 +@1CE 743 +@1CF AC4 +@1D0 C5B +@1D1 2A4 +@1D2 080 +@1D3 743 +@1D4 AC4 +@1D5 C5A +@1D6 2A4 +@1D7 080 +@1D8 743 +@1D9 AC4 +@1DA C59 +@1DB 2A4 +@1DC 080 +@1DD 743 +@1DE AC4 +@1DF C58 +@1E0 2A4 +@1E1 080 +@1E2 743 +@1E3 AC4 +@1E4 C57 +@1E5 2A4 +@1E6 080 +@1E7 743 +@1E8 AC4 +@1E9 C56 +@1EA 2A4 +@1EB 080 +@1EC 743 +@1ED AC4 +@1EE C55 +@1EF 2A4 +@1F0 080 +@1F1 743 +@1F2 AC4 +@1F3 C54 +@1F4 2A4 +@1F5 080 +@1F6 743 +@1F7 AC4 +@1F8 C53 +@1F9 2A4 +@1FA 080 +@1FB 743 +@1FC AC4 +@1FD C52 +@1FE 2A4 +@1FF 080 +@200 743 +@201 AC4 +@202 C51 +@203 2A4 +@204 080 +@205 743 +@206 AC4 +@207 C50 +@208 2A4 +@209 080 +@20A 743 +@20B AC4 +@20C C03 +@20D 026 +@20E C10 +@20F 024 +@210 5C4 +@211 C4F +@212 080 +@213 743 +@214 AC4 +@215 C4E +@216 2A4 +@217 080 +@218 743 +@219 AC4 +@21A C4D +@21B 2A4 +@21C 080 +@21D 743 +@21E AC4 +@21F C4C +@220 2A4 +@221 080 +@222 743 +@223 AC4 +@224 C4B +@225 2A4 +@226 080 +@227 743 +@228 AC4 +@229 C4A +@22A 2A4 +@22B 080 +@22C 743 +@22D AC4 +@22E C49 +@22F 2A4 +@230 080 +@231 743 +@232 AC4 +@233 C48 +@234 2A4 +@235 080 +@236 743 +@237 AC4 +@238 C47 +@239 2A4 +@23A 080 +@23B 743 +@23C AC4 +@23D C46 +@23E 2A4 +@23F 080 +@240 743 +@241 AC4 +@242 C45 +@243 2A4 +@244 080 +@245 743 +@246 AC4 +@247 C44 +@248 2A4 +@249 080 +@24A 743 +@24B AC4 +@24C C43 +@24D 2A4 +@24E 080 +@24F 743 +@250 AC4 +@251 C42 +@252 2A4 +@253 080 +@254 743 +@255 AC4 +@256 C41 +@257 2A4 +@258 080 +@259 743 +@25A AC4 +@25B C40 +@25C 2A4 +@25D 080 +@25E 743 +@25F AC4 +@260 C04 +@261 026 +@262 C10 +@263 024 +@264 5A4 +@265 5C4 +@266 C3F +@267 080 +@268 743 +@269 AC4 +@26A C3E +@26B 2A4 +@26C 080 +@26D 743 +@26E AC4 +@26F C3D +@270 2A4 +@271 080 +@272 743 +@273 AC4 +@274 C3C +@275 2A4 +@276 080 +@277 743 +@278 AC4 +@279 C3B +@27A 2A4 +@27B 080 +@27C 743 +@27D AC4 +@27E C3A +@27F 2A4 +@280 080 +@281 743 +@282 AC4 +@283 C39 +@284 2A4 +@285 080 +@286 743 +@287 AC4 +@288 C38 +@289 2A4 +@28A 080 +@28B 743 +@28C AC4 +@28D C37 +@28E 2A4 +@28F 080 +@290 743 +@291 AC4 +@292 C36 +@293 2A4 +@294 080 +@295 743 +@296 AC4 +@297 C35 +@298 2A4 +@299 080 +@29A 743 +@29B AC4 +@29C C34 +@29D 2A4 +@29E 080 +@29F 743 +@2A0 AC4 +@2A1 C33 +@2A2 2A4 +@2A3 080 +@2A4 743 +@2A5 AC4 +@2A6 C32 +@2A7 2A4 +@2A8 080 +@2A9 743 +@2AA AC4 +@2AB C31 +@2AC 2A4 +@2AD 080 +@2AE 743 +@2AF AC4 +@2B0 C30 +@2B1 2A4 +@2B2 080 +@2B3 743 +@2B4 AC4 +@2B5 000 +@2B6 000 +@2B7 000 +@2B8 000 +@2B9 C01 +@2BA 025 +@2BB 000 +@2BC 000 +@2BD 000 +@2BE 000 +@2BF ABF +@2C0 000 +@2C1 000 +@2C2 000 +@2C3 000 +@2C4 CFF +@2C5 025 +@2C6 000 +@2C7 000 +@2C8 000 +@2C9 000 +@2CA ACA +@2CB 000 +@2CC 000 +@2CD 000 +@2CE 000 Index: trunk/scode/sanity2.rom =================================================================== --- trunk/scode/sanity2.rom (nonexistent) +++ trunk/scode/sanity2.rom (revision 3) @@ -0,0 +1,282 @@ + +@000 040 +@001 024 +@002 025 +@003 026 +@004 027 +@005 005 +@006 006 +@007 007 +@008 C0B +@009 028 +@00A 202 +@00B 088 +@00C 743 +@00D B23 +@00E C01 +@00F 026 +@010 C13 +@011 02B +@012 202 +@013 08B +@014 743 +@015 B23 +@016 C02 +@017 026 +@018 C1D +@019 022 +@01A B23 +@01B B23 +@01C B23 +@01D A21 +@01E B23 +@01F B23 +@020 B23 +@021 C03 +@022 026 +@023 C28 +@024 022 +@025 B23 +@026 B23 +@027 B23 +@028 A2C +@029 B23 +@02A B23 +@02B B23 +@02C C04 +@02D 026 +@02E C35 +@02F 028 +@030 C32 +@031 088 +@032 1E2 +@033 B23 +@034 B23 +@035 B23 +@036 A3A +@037 B23 +@038 B23 +@039 B23 +@03A C05 +@03B 026 +@03C C43 +@03D 038 +@03E C40 +@03F 098 +@040 1E2 +@041 B23 +@042 B23 +@043 B23 +@044 A48 +@045 B23 +@046 B23 +@047 B23 +@048 C06 +@049 026 +@04A A60 +@060 522 +@061 B23 +@062 B23 +@063 A68 +@064 B23 +@065 B23 +@066 B23 +@067 B23 +@068 C07 +@069 026 +@06A 542 +@06B B23 +@06C B23 +@06D B23 +@06E B23 +@06F A72 +@070 B23 +@071 B23 +@072 C08 +@073 026 +@074 A7C +@075 B23 +@076 B23 +@077 B23 +@078 B23 +@079 A7D +@07A B23 +@07B B23 +@07C 442 +@07D C09 +@07E 026 +@07F A8A +@080 000 +@081 000 +@082 000 +@083 000 +@084 CFF +@085 025 +@086 000 +@087 000 +@088 000 +@089 000 +@08A C0A +@08B 026 +@08C 9A5 +@08D 028 +@08E C55 +@08F 088 +@090 743 +@091 B23 +@092 9A7 +@093 028 +@094 CAA +@095 088 +@096 743 +@097 B23 +@098 9AA +@099 028 +@09A CC3 +@09B 088 +@09C 743 +@09D B23 +@09E 9AE +@09F 028 +@0A0 C3C +@0A1 088 +@0A2 743 +@0A3 B23 +@0A4 AC5 +@0A5 855 +@0A6 B23 +@0A7 000 +@0A8 8AA +@0A9 B23 +@0AA 000 +@0AB 000 +@0AC 8C3 +@0AD B23 +@0AE 000 +@0AF 000 +@0B0 000 +@0B1 83C +@0B2 B23 +@0B3 1E2 +@0B4 8FF +@0B5 8FE +@0B6 8FD +@0B7 8FC +@0B8 8FB +@0B9 8FA +@0BA 8F9 +@0BB 8F8 +@0BC 8F7 +@0BD 8F6 +@0BE 8F5 +@0BF B23 +@0C0 B23 +@0C1 B23 +@0C2 B23 +@0C3 B23 +@0C4 B23 +@0C5 C0B +@0C6 026 +@0C7 C00 +@0C8 028 +@0C9 9B3 +@0CA 268 +@0CB 0A8 +@0CC 743 +@0CD B23 +@0CE C01 +@0CF 028 +@0D0 9B3 +@0D1 268 +@0D2 0A8 +@0D3 743 +@0D4 B23 +@0D5 C02 +@0D6 028 +@0D7 9B3 +@0D8 268 +@0D9 0A8 +@0DA 743 +@0DB B23 +@0DC C03 +@0DD 028 +@0DE 9B3 +@0DF 268 +@0E0 0A8 +@0E1 743 +@0E2 B23 +@0E3 C04 +@0E4 028 +@0E5 9B3 +@0E6 268 +@0E7 0A8 +@0E8 743 +@0E9 B23 +@0EA C05 +@0EB 028 +@0EC 9B3 +@0ED 268 +@0EE 0A8 +@0EF 743 +@0F0 B23 +@0F1 C06 +@0F2 028 +@0F3 9B3 +@0F4 268 +@0F5 0A8 +@0F6 743 +@0F7 B23 +@0F8 C07 +@0F9 028 +@0FA 9B3 +@0FB 268 +@0FC 0A8 +@0FD 743 +@0FE B23 +@0FF C08 +@100 028 +@101 9B3 +@102 268 +@103 0A8 +@104 743 +@105 B23 +@106 C09 +@107 028 +@108 9B3 +@109 268 +@10A 0A8 +@10B 743 +@10C B23 +@10D C0A +@10E 028 +@10F 9B3 +@110 268 +@111 0A8 +@112 743 +@113 B23 +@114 000 +@115 000 +@116 000 +@117 000 +@118 C01 +@119 025 +@11A 000 +@11B 000 +@11C 000 +@11D 000 +@11E B1E +@11F 000 +@120 000 +@121 000 +@122 000 +@123 CFF +@124 025 +@125 000 +@126 000 +@127 000 +@128 000 +@129 B29 +@12A 000 +@12B 000 +@12C 000 +@12D 000 Index: trunk/scode/rf3.rom =================================================================== --- trunk/scode/rf3.rom (nonexistent) +++ trunk/scode/rf3.rom (revision 3) @@ -0,0 +1,219 @@ + +@000 040 +@001 024 +@002 025 +@003 026 +@004 027 +@005 005 +@006 006 +@007 007 +@008 C01 +@009 026 +@00A CFC +@00B 028 +@00C 2A8 +@00D 2A8 +@00E 2A8 +@00F 2A8 +@010 743 +@011 ACF +@012 CFC +@013 038 +@014 2B8 +@015 2B8 +@016 2B8 +@017 2B8 +@018 743 +@019 ACF +@01A C02 +@01B 026 +@01C C09 +@01D 024 +@01E CFC +@01F 020 +@020 2A0 +@021 2A0 +@022 2A0 +@023 2A0 +@024 743 +@025 ACF +@026 C19 +@027 024 +@028 CFC +@029 020 +@02A 2A0 +@02B 2A0 +@02C 2A0 +@02D 2A0 +@02E 743 +@02F ACF +@030 C03 +@031 026 +@032 C04 +@033 028 +@034 0E8 +@035 0E8 +@036 0E8 +@037 0E8 +@038 743 +@039 ACF +@03A C04 +@03B 030 +@03C 0F0 +@03D 0F0 +@03E 0F0 +@03F 0F0 +@040 743 +@041 ACF +@042 C04 +@043 026 +@044 C09 +@045 024 +@046 C04 +@047 020 +@048 0E0 +@049 0E0 +@04A 0E0 +@04B 0E0 +@04C 743 +@04D ACF +@04E C19 +@04F 024 +@050 C04 +@051 020 +@052 0E0 +@053 0E0 +@054 0E0 +@055 0E0 +@056 743 +@057 ACF +@058 C05 +@059 026 +@05A CFC +@05B 02C +@05C 3EC +@05D 3EC +@05E 3EC +@05F 3EC +@060 ACF +@061 CFC +@062 038 +@063 3F8 +@064 3F8 +@065 3F8 +@066 3F8 +@067 ACF +@068 C06 +@069 026 +@06A C09 +@06B 024 +@06C CFC +@06D 020 +@06E 3E0 +@06F 3E0 +@070 3E0 +@071 3E0 +@072 ACF +@073 C19 +@074 024 +@075 CFC +@076 020 +@077 3E0 +@078 3E0 +@079 3E0 +@07A 3E0 +@07B ACF +@07C C07 +@07D 026 +@07E C04 +@07F 028 +@080 2E8 +@081 2E8 +@082 2E8 +@083 2E8 +@084 ACF +@085 C04 +@086 030 +@087 2F0 +@088 2F0 +@089 2F0 +@08A 2F0 +@08B ACF +@08C C08 +@08D 026 +@08E C09 +@08F 024 +@090 C04 +@091 020 +@092 2E0 +@093 2E0 +@094 2E0 +@095 2E0 +@096 ACF +@097 C19 +@098 024 +@099 C04 +@09A 020 +@09B 2E0 +@09C 2E0 +@09D 2E0 +@09E 2E0 +@09F ACF +@0A0 C09 +@0A1 026 +@0A2 CFC +@0A3 024 +@0A4 2A4 +@0A5 2A4 +@0A6 2A4 +@0A7 2A4 +@0A8 743 +@0A9 ACF +@0AA C04 +@0AB 024 +@0AC C7F +@0AD 0E4 +@0AE 0E4 +@0AF 0E4 +@0B0 0E4 +@0B1 164 +@0B2 743 +@0B3 ACF +@0B4 C0A +@0B5 026 +@0B6 CFC +@0B7 023 +@0B8 C18 +@0B9 2A3 +@0BA 2A3 +@0BB 2A3 +@0BC 2A3 +@0BD 083 +@0BE 743 +@0BF ACF +@0C0 000 +@0C1 000 +@0C2 000 +@0C3 000 +@0C4 C01 +@0C5 025 +@0C6 000 +@0C7 000 +@0C8 000 +@0C9 000 +@0CA ACA +@0CB 000 +@0CC 000 +@0CD 000 +@0CE 000 +@0CF CFF +@0D0 025 +@0D1 000 +@0D2 000 +@0D3 000 +@0D4 000 +@0D5 AD5 +@0D6 000 +@0D7 000 +@0D8 000 +@0D9 000 Index: trunk/scode/rf1.asm =================================================================== --- trunk/scode/rf1.asm (nonexistent) +++ trunk/scode/rf1.asm (revision 3) @@ -0,0 +1,694 @@ +;///////////////////////////////////////////////////////////////////// +;//// //// +;//// Mini-RISC-1 //// +;//// Register File Test 1 //// +;//// Tests Register File //// +;//// //// +;//// Author: Rudolf Usselmann //// +;//// russelmann@hotmail.com //// +;//// //// +;///////////////////////////////////////////////////////////////////// +;//// //// +;//// Copyright (C) 2000 Rudolf Usselmann //// +;//// russelmann@hotmail.com //// +;//// //// +;//// This source file may be used and distributed without //// +;//// restriction provided that this copyright statement is not //// +;//// removed from the file and that any derivative work contains //// +;//// the original copyright notice and the associated disclaimer.//// +;//// //// +;//// THIS SOURCE FILE IS PROVIDED "AS IS" AND WITHOUT ANY //// +;//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, WITHOUT //// +;//// LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND //// +;//// FITNESS FOR A PARTICULAR PURPOSE. //// +;//// //// +;///////////////////////////////////////////////////////////////////// + + list p=16c57 + #include p16c5x.inc + +; global Registers +r0 equ 0x8 +r1 equ 0x9 +r2 equ 0xa +r3 equ 0xb +r4 equ 0xc +r5 equ 0xd +r6 equ 0xe +r7 equ 0xf + +; banked Registers +br0 equ 0x10 +br1 equ 0x11 +br2 equ 0x12 +br3 equ 0x13 +br4 equ 0x14 +br5 equ 0x15 +br6 equ 0x16 +br7 equ 0x17 +br8 equ 0x18 +br9 equ 0x19 +br10 equ 0x1a +br11 equ 0x1b +br12 equ 0x1c +br13 equ 0x1d +br14 equ 0x1e +br15 equ 0x1f + + +; PORTB Indicates Test Number +; PORTA Indicates Status: 0 - Running; 1 - done OK; ff - stoped on error + +main ; Main code entry + ; Port IO Test + ; All ports have a Pull up resistor + + ; SETUP all ports + clrw + movwf FSR + movwf PORTA + movwf PORTB + movwf PORTC + tris PORTA + tris PORTB + tris PORTC + + bsf STATUS,5 + + ; --------------------------------------- + ; ---- Test the entire register file ---- + ; --------------------------------------- + + movlw 0x81 + movwf r0 + movlw 0x82 + movwf r1 + movlw 0x83 + movwf r2 + movlw 0x84 + movwf r3 + movlw 0x85 + movwf r4 + movlw 0x86 + movwf r5 + movlw 0x87 + movwf r6 + movlw 0x88 + movwf r7 + + + movlw 0x90 + movwf br0 + movlw 0x91 + movwf br1 + movlw 0x92 + movwf br2 + movlw 0x93 + movwf br3 + movlw 0x94 + movwf br4 + movlw 0x95 + movwf br5 + movlw 0x96 + movwf br6 + movlw 0x97 + movwf br7 + movlw 0x98 + movwf br8 + movlw 0x99 + movwf br9 + movlw 0x9a + movwf br10 + movlw 0x9b + movwf br11 + movlw 0x9c + movwf br12 + movlw 0x9d + movwf br13 + movlw 0x9e + movwf br14 + movlw 0x9f + movwf br15 + + bsf FSR,5 ; Select Register Bank 01 + + movlw 0xa0 + movwf br0 + movlw 0xa1 + movwf br1 + movlw 0xa2 + movwf br2 + movlw 0xa3 + movwf br3 + movlw 0xa4 + movwf br4 + movlw 0xa5 + movwf br5 + movlw 0xa6 + movwf br6 + movlw 0xa7 + movwf br7 + movlw 0xa8 + movwf br8 + movlw 0xa9 + movwf br9 + movlw 0xaa + movwf br10 + movlw 0xab + movwf br11 + movlw 0xac + movwf br12 + movlw 0xad + movwf br13 + movlw 0xae + movwf br14 + movlw 0xaf + movwf br15 + + bcf FSR,5 ; Select Register Bank 10 + bsf FSR,6 + + movlw 0xb0 + movwf br0 + movlw 0xb1 + movwf br1 + movlw 0xb2 + movwf br2 + movlw 0xb3 + movwf br3 + movlw 0xb4 + movwf br4 + movlw 0xb5 + movwf br5 + movlw 0xb6 + movwf br6 + movlw 0xb7 + movwf br7 + movlw 0xb8 + movwf br8 + movlw 0xb9 + movwf br9 + movlw 0xba + movwf br10 + movlw 0xbb + movwf br11 + movlw 0xbc + movwf br12 + movlw 0xbd + movwf br13 + movlw 0xbe + movwf br14 + movlw 0xbf + movwf br15 + + bsf FSR,5 ; Select Register Bank 11 + bsf FSR,6 + + movlw 0xc0 + movwf br0 + movlw 0xc1 + movwf br1 + movlw 0xc2 + movwf br2 + movlw 0xc3 + movwf br3 + movlw 0xc4 + movwf br4 + movlw 0xc5 + movwf br5 + movlw 0xc6 + movwf br6 + movlw 0xc7 + movwf br7 + movlw 0xc8 + movwf br8 + movlw 0xc9 + movwf br9 + movlw 0xca + movwf br10 + movlw 0xcb + movwf br11 + movlw 0xcc + movwf br12 + movlw 0xcd + movwf br13 + movlw 0xce + movwf br14 + movlw 0xcf + movwf br15 + + ; Register File TEST 1 + movlw 0x01 + movwf PORTB ; Set Test Number + + clrw + movwf FSR + + movlw 0x81 + subwf r0,W + btfss STATUS,Z + goto lerr + movlw 0x82 + subwf r1,W + btfss STATUS,Z + goto lerr + movlw 0x83 + subwf r2,W + btfss STATUS,Z + goto lerr + movlw 0x84 + subwf r3,W + btfss STATUS,Z + goto lerr + movlw 0x85 + subwf r4,W + btfss STATUS,Z + goto lerr + movlw 0x86 + subwf r5,W + btfss STATUS,Z + goto lerr + movlw 0x87 + subwf r6,W + btfss STATUS,Z + goto lerr + movlw 0x88 + subwf r7,W + btfss STATUS,Z + goto lerr + + movlw 0x90 + subwf br0,W + btfss STATUS,Z + goto lerr + movlw 0x91 + subwf br1,W + btfss STATUS,Z + goto lerr + movlw 0x92 + subwf br2,W + btfss STATUS,Z + goto lerr + movlw 0x93 + subwf br3,W + btfss STATUS,Z + goto lerr + movlw 0x94 + subwf br4,W + btfss STATUS,Z + goto lerr + movlw 0x95 + subwf br5,W + btfss STATUS,Z + goto lerr + movlw 0x96 + subwf br6,W + btfss STATUS,Z + goto lerr + movlw 0x97 + subwf br7,W + btfss STATUS,Z + goto lerr + movlw 0x98 + subwf br8,W + btfss STATUS,Z + goto lerr + movlw 0x99 + subwf br9,W + btfss STATUS,Z + goto lerr + movlw 0x9a + subwf br10,W + btfss STATUS,Z + goto lerr + movlw 0x9b + subwf br11,W + btfss STATUS,Z + goto lerr + movlw 0x9c + subwf br12,W + btfss STATUS,Z + goto lerr + movlw 0x9d + subwf br13,W + btfss STATUS,Z + goto lerr + movlw 0x9e + subwf br14,W + btfss STATUS,Z + goto lerr + movlw 0x9f + subwf br15,W + btfss STATUS,Z + goto lerr + + ; Register File TEST 2 + movlw 0x02 + movwf PORTB ; Set Test Number + + bsf FSR,5 ; Select Register Bank 01 + + movlw 0x81 + subwf r0,W + btfss STATUS,Z + goto lerr + movlw 0x82 + subwf r1,W + btfss STATUS,Z + goto lerr + movlw 0x83 + subwf r2,W + btfss STATUS,Z + goto lerr + movlw 0x84 + subwf r3,W + btfss STATUS,Z + goto lerr + movlw 0x85 + subwf r4,W + btfss STATUS,Z + goto lerr + movlw 0x86 + subwf r5,W + btfss STATUS,Z + goto lerr + movlw 0x87 + subwf r6,W + btfss STATUS,Z + goto lerr + movlw 0x88 + subwf r7,W + btfss STATUS,Z + goto lerr + + movlw 0xa0 + subwf br0,W + btfss STATUS,Z + goto lerr + movlw 0xa1 + subwf br1,W + btfss STATUS,Z + goto lerr + movlw 0xa2 + subwf br2,W + btfss STATUS,Z + goto lerr + movlw 0xa3 + subwf br3,W + btfss STATUS,Z + goto lerr + movlw 0xa4 + subwf br4,W + btfss STATUS,Z + goto lerr + movlw 0xa5 + subwf br5,W + btfss STATUS,Z + goto lerr + movlw 0xa6 + subwf br6,W + btfss STATUS,Z + goto lerr + movlw 0xa7 + subwf br7,W + btfss STATUS,Z + goto lerr + movlw 0xa8 + subwf br8,W + btfss STATUS,Z + goto lerr + movlw 0xa9 + subwf br9,W + btfss STATUS,Z + goto lerr + movlw 0xaa + subwf br10,W + btfss STATUS,Z + goto lerr + movlw 0xab + subwf br11,W + btfss STATUS,Z + goto lerr + movlw 0xac + subwf br12,W + btfss STATUS,Z + goto lerr + movlw 0xad + subwf br13,W + btfss STATUS,Z + goto lerr + movlw 0xae + subwf br14,W + btfss STATUS,Z + goto lerr + movlw 0xaf + subwf br15,W + btfss STATUS,Z + goto lerr + + ; Register File TEST 3 + movlw 0x03 + movwf PORTB ; Set Test Number + + bcf FSR,5 ; Select Register Bank 10 + bsf FSR,6 + + movlw 0x81 + subwf r0,W + btfss STATUS,Z + goto lerr + movlw 0x82 + subwf r1,W + btfss STATUS,Z + goto lerr + movlw 0x83 + subwf r2,W + btfss STATUS,Z + goto lerr + movlw 0x84 + subwf r3,W + btfss STATUS,Z + goto lerr + movlw 0x85 + subwf r4,W + btfss STATUS,Z + goto lerr + movlw 0x86 + subwf r5,W + btfss STATUS,Z + goto lerr + movlw 0x87 + subwf r6,W + btfss STATUS,Z + goto lerr + movlw 0x88 + subwf r7,W + btfss STATUS,Z + goto lerr + + movlw 0xb0 + subwf br0,W + btfss STATUS,Z + goto lerr + movlw 0xb1 + subwf br1,W + btfss STATUS,Z + goto lerr + movlw 0xb2 + subwf br2,W + btfss STATUS,Z + goto lerr + movlw 0xb3 + subwf br3,W + btfss STATUS,Z + goto lerr + movlw 0xb4 + subwf br4,W + btfss STATUS,Z + goto lerr + movlw 0xb5 + subwf br5,W + btfss STATUS,Z + goto lerr + movlw 0xb6 + subwf br6,W + btfss STATUS,Z + goto lerr + movlw 0xb7 + subwf br7,W + btfss STATUS,Z + goto lerr + movlw 0xb8 + subwf br8,W + btfss STATUS,Z + goto lerr + movlw 0xb9 + subwf br9,W + btfss STATUS,Z + goto lerr + movlw 0xba + subwf br10,W + btfss STATUS,Z + goto lerr + movlw 0xbb + subwf br11,W + btfss STATUS,Z + goto lerr + movlw 0xbc + subwf br12,W + btfss STATUS,Z + goto lerr + movlw 0xbd + subwf br13,W + btfss STATUS,Z + goto lerr + movlw 0xbe + subwf br14,W + btfss STATUS,Z + goto lerr + movlw 0xbf + subwf br15,W + btfss STATUS,Z + goto lerr + + + ; Register File TEST 4 + movlw 0x04 + movwf PORTB ; Set Test Number + + bsf FSR,5 ; Select Register Bank 11 + bsf FSR,6 + + movlw 0x81 + subwf r0,W + btfss STATUS,Z + goto lerr + movlw 0x82 + subwf r1,W + btfss STATUS,Z + goto lerr + movlw 0x83 + subwf r2,W + btfss STATUS,Z + goto lerr + movlw 0x84 + subwf r3,W + btfss STATUS,Z + goto lerr + movlw 0x85 + subwf r4,W + btfss STATUS,Z + goto lerr + movlw 0x86 + subwf r5,W + btfss STATUS,Z + goto lerr + movlw 0x87 + subwf r6,W + btfss STATUS,Z + goto lerr + movlw 0x88 + subwf r7,W + btfss STATUS,Z + goto lerr + + movlw 0xc0 + subwf br0,W + btfss STATUS,Z + goto lerr + movlw 0xc1 + subwf br1,W + btfss STATUS,Z + goto lerr + movlw 0xc2 + subwf br2,W + btfss STATUS,Z + goto lerr + movlw 0xc3 + subwf br3,W + btfss STATUS,Z + goto lerr + movlw 0xc4 + subwf br4,W + btfss STATUS,Z + goto lerr + movlw 0xc5 + subwf br5,W + btfss STATUS,Z + goto lerr + movlw 0xc6 + subwf br6,W + btfss STATUS,Z + goto lerr + movlw 0xc7 + subwf br7,W + btfss STATUS,Z + goto lerr + movlw 0xc8 + subwf br8,W + btfss STATUS,Z + goto lerr + movlw 0xc9 + subwf br9,W + btfss STATUS,Z + goto lerr + movlw 0xca + subwf br10,W + btfss STATUS,Z + goto lerr + movlw 0xcb + subwf br11,W + btfss STATUS,Z + goto lerr + movlw 0xcc + subwf br12,W + btfss STATUS,Z + goto lerr + movlw 0xcd + subwf br13,W + btfss STATUS,Z + goto lerr + movlw 0xce + subwf br14,W + btfss STATUS,Z + goto lerr + movlw 0xcf + subwf br15,W + btfss STATUS,Z + goto lerr + + + nop + nop + nop + nop + movlw 0x01 + movwf PORTA + nop + nop + nop + nop +good ; Loop in good on success + goto good + nop + nop + nop + nop + +lerr + movlw 0xff + movwf PORTA + + nop + nop + nop + nop +lerr_loop ; Loop in lerr on failure + goto lerr_loop + nop + nop + nop + nop + + END + Index: trunk/scode/sanity1.asm =================================================================== --- trunk/scode/sanity1.asm (nonexistent) +++ trunk/scode/sanity1.asm (revision 3) @@ -0,0 +1,250 @@ +;///////////////////////////////////////////////////////////////////// +;//// //// +;//// Mini-RISC-1 //// +;//// Compliance Test 1 //// +;//// Tests Ports //// +;//// //// +;//// Author: Rudolf Usselmann //// +;//// russelmann@hotmail.com //// +;//// //// +;///////////////////////////////////////////////////////////////////// +;//// //// +;//// Copyright (C) 2000 Rudolf Usselmann //// +;//// russelmann@hotmail.com //// +;//// //// +;//// This source file may be used and distributed without //// +;//// restriction provided that this copyright statement is not //// +;//// removed from the file and that any derivative work contains //// +;//// the original copyright notice and the associated disclaimer.//// +;//// //// +;//// THIS SOURCE FILE IS PROVIDED "AS IS" AND WITHOUT ANY //// +;//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, WITHOUT //// +;//// LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND //// +;//// FITNESS FOR A PARTICULAR PURPOSE. //// +;//// //// +;///////////////////////////////////////////////////////////////////// + + list p=16c57 + #include p16c5x.inc + + +main ; Main code entry + ; Port IO Test + ; All ports have a Pull up resistor + + ; Tristate all ports + clrw + movwf PORTA + movwf PORTB + movwf PORTC + xorlw 0xff + tris PORTA + tris PORTB + tris PORTC + + ; Now check that porta is 0xff + btfss PORTA,0 + goto lerr + btfss PORTA,1 + goto lerr + btfss PORTA,2 + goto lerr + btfss PORTA,3 + goto lerr + btfss PORTA,4 + goto lerr + btfss PORTA,5 + goto lerr + btfss PORTA,6 + goto lerr + btfss PORTA,7 + goto lerr + + + ; Now check that portb is 0xff + btfss PORTB,0 + goto lerr + btfss PORTB,1 + goto lerr + btfss PORTB,2 + goto lerr + btfss PORTB,3 + goto lerr + btfss PORTB,4 + goto lerr + btfss PORTB,5 + goto lerr + btfss PORTB,6 + goto lerr + btfss PORTB,7 + goto lerr + + ; Now check that portc is 0xff + btfss PORTC,0 + goto lerr + btfss PORTC,1 + goto lerr + btfss PORTC,2 + goto lerr + btfss PORTC,3 + goto lerr + btfss PORTC,4 + goto lerr + btfss PORTC,5 + goto lerr + btfss PORTA,6 + goto lerr + btfss PORTC,7 + goto lerr + + + + ; Enable all ports + clrw + tris PORTA + tris PORTB + tris PORTC + + ; Drive them all 0xaa + clrw + xorlw 0xaa + movwf PORTA + movwf PORTB + movwf PORTC + + ; Now check that porta is 0xaa + btfsc PORTA,0 + goto lerr + btfss PORTA,1 + goto lerr + btfsc PORTA,2 + goto lerr + btfss PORTA,3 + goto lerr + btfsc PORTA,4 + goto lerr + btfss PORTA,5 + goto lerr + btfsc PORTA,6 + goto lerr + btfss PORTA,7 + goto lerr + + ; Now check that portb is 0xaa + btfsc PORTB,0 + goto lerr + btfss PORTB,1 + goto lerr + btfsc PORTB,2 + goto lerr + btfss PORTB,3 + goto lerr + btfsc PORTB,4 + goto lerr + btfss PORTB,5 + goto lerr + btfsc PORTB,6 + goto lerr + btfss PORTB,7 + goto lerr + + ; Now check that portc is 0xaa + btfsc PORTC,0 + goto lerr + btfss PORTC,1 + goto lerr + btfsc PORTC,2 + goto lerr + btfss PORTC,3 + goto lerr + btfsc PORTC,4 + goto lerr + btfss PORTC,5 + goto lerr + btfsc PORTC,6 + goto lerr + btfss PORTC,7 + goto lerr + + ; Drive them all 0x55 + clrw + xorlw 0x55 + movwf PORTA + movwf PORTB + movwf PORTC + + ; Now check that porta is 0x55 + btfss PORTA,0 + goto lerr + btfsc PORTA,1 + goto lerr + btfss PORTA,2 + goto lerr + btfsc PORTA,3 + goto lerr + btfss PORTA,4 + goto lerr + btfsc PORTA,5 + goto lerr + btfss PORTA,6 + goto lerr + btfsc PORTA,7 + goto lerr + + ; Now check that portb is 0x55 + btfss PORTB,0 + goto lerr + btfsc PORTB,1 + goto lerr + btfss PORTB,2 + goto lerr + btfsc PORTB,3 + goto lerr + btfss PORTB,4 + goto lerr + btfsc PORTB,5 + goto lerr + btfss PORTB,6 + goto lerr + btfsc PORTB,7 + goto lerr + + ; Now check that portc is 0x55 + btfss PORTC,0 + goto lerr + btfsc PORTC,1 + goto lerr + btfss PORTC,2 + goto lerr + btfsc PORTC,3 + goto lerr + btfss PORTC,4 + goto lerr + btfsc PORTC,5 + goto lerr + btfss PORTC,6 + goto lerr + btfsc PORTC,7 + goto lerr + + nop + nop + nop + nop + +good ; Loop in good on success + goto good + nop + nop + nop + nop + +lerr ; Loop in lerr on failure + goto lerr + nop + nop + nop + nop + + END + Index: trunk/scode/rf2.asm =================================================================== --- trunk/scode/rf2.asm (nonexistent) +++ trunk/scode/rf2.asm (revision 3) @@ -0,0 +1,827 @@ +;///////////////////////////////////////////////////////////////////// +;//// //// +;//// Mini-RISC-1 //// +;//// Register File Test 2 //// +;//// Tests Register File //// +;//// //// +;//// Author: Rudolf Usselmann //// +;//// russelmann@hotmail.com //// +;//// //// +;///////////////////////////////////////////////////////////////////// +;//// //// +;//// Copyright (C) 2000 Rudolf Usselmann //// +;//// russelmann@hotmail.com //// +;//// //// +;//// This source file may be used and distributed without //// +;//// restriction provided that this copyright statement is not //// +;//// removed from the file and that any derivative work contains //// +;//// the original copyright notice and the associated disclaimer.//// +;//// //// +;//// THIS SOURCE FILE IS PROVIDED "AS IS" AND WITHOUT ANY //// +;//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, WITHOUT //// +;//// LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND //// +;//// FITNESS FOR A PARTICULAR PURPOSE. //// +;//// //// +;///////////////////////////////////////////////////////////////////// + + list p=16c57 + #include p16c5x.inc + +; global Registers +r0 equ 0x8 +r1 equ 0x9 +r2 equ 0xa +r3 equ 0xb +r4 equ 0xc +r5 equ 0xd +r6 equ 0xe +r7 equ 0xf + +; banked Registers +br0 equ 0x10 +br1 equ 0x11 +br2 equ 0x12 +br3 equ 0x13 +br4 equ 0x14 +br5 equ 0x15 +br6 equ 0x16 +br7 equ 0x17 +br8 equ 0x18 +br9 equ 0x19 +br10 equ 0x1a +br11 equ 0x1b +br12 equ 0x1c +br13 equ 0x1d +br14 equ 0x1e +br15 equ 0x1f + + +; PORTB Indicates Test Number +; PORTA Indicates Status: 0 - Running; 1 - done OK; ff - stoped on error + +main ; Main code entry + ; Port IO Test + ; All ports have a Pull up resistor + + ; SETUP all ports + clrw + movwf FSR + movwf PORTA + movwf PORTB + movwf PORTC + tris PORTA + tris PORTB + tris PORTC + + bsf STATUS,5 + + ; --------------------------------------- + ; ---- Test the entire register file ---- + ; --------------------------------------- + + movlw 0x81 + movwf r0 + movlw 0x82 + movwf r1 + movlw 0x83 + movwf r2 + movlw 0x84 + movwf r3 + movlw 0x85 + movwf r4 + movlw 0x86 + movwf r5 + movlw 0x87 + movwf r6 + movlw 0x88 + movwf r7 + + + movlw 0x90 + movwf br0 + movlw 0x91 + movwf br1 + movlw 0x92 + movwf br2 + movlw 0x93 + movwf br3 + movlw 0x94 + movwf br4 + movlw 0x95 + movwf br5 + movlw 0x96 + movwf br6 + movlw 0x97 + movwf br7 + movlw 0x98 + movwf br8 + movlw 0x99 + movwf br9 + movlw 0x9a + movwf br10 + movlw 0x9b + movwf br11 + movlw 0x9c + movwf br12 + movlw 0x9d + movwf br13 + movlw 0x9e + movwf br14 + movlw 0x9f + movwf br15 + + bsf FSR,5 ; Select Register Bank 01 + + movlw 0xa0 + movwf br0 + movlw 0xa1 + movwf br1 + movlw 0xa2 + movwf br2 + movlw 0xa3 + movwf br3 + movlw 0xa4 + movwf br4 + movlw 0xa5 + movwf br5 + movlw 0xa6 + movwf br6 + movlw 0xa7 + movwf br7 + movlw 0xa8 + movwf br8 + movlw 0xa9 + movwf br9 + movlw 0xaa + movwf br10 + movlw 0xab + movwf br11 + movlw 0xac + movwf br12 + movlw 0xad + movwf br13 + movlw 0xae + movwf br14 + movlw 0xaf + movwf br15 + + bcf FSR,5 ; Select Register Bank 10 + bsf FSR,6 + + movlw 0xb0 + movwf br0 + movlw 0xb1 + movwf br1 + movlw 0xb2 + movwf br2 + movlw 0xb3 + movwf br3 + movlw 0xb4 + movwf br4 + movlw 0xb5 + movwf br5 + movlw 0xb6 + movwf br6 + movlw 0xb7 + movwf br7 + movlw 0xb8 + movwf br8 + movlw 0xb9 + movwf br9 + movlw 0xba + movwf br10 + movlw 0xbb + movwf br11 + movlw 0xbc + movwf br12 + movlw 0xbd + movwf br13 + movlw 0xbe + movwf br14 + movlw 0xbf + movwf br15 + + bsf FSR,5 ; Select Register Bank 11 + bsf FSR,6 + + movlw 0xc0 + movwf br0 + movlw 0xc1 + movwf br1 + movlw 0xc2 + movwf br2 + movlw 0xc3 + movwf br3 + movlw 0xc4 + movwf br4 + movlw 0xc5 + movwf br5 + movlw 0xc6 + movwf br6 + movlw 0xc7 + movwf br7 + movlw 0xc8 + movwf br8 + movlw 0xc9 + movwf br9 + movlw 0xca + movwf br10 + movlw 0xcb + movwf br11 + movlw 0xcc + movwf br12 + movlw 0xcd + movwf br13 + movlw 0xce + movwf br14 + movlw 0xcf + movwf br15 + + movlw r0 + movwf FSR + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + + + movlw br0 + movwf FSR + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + + movlw br0 + movwf FSR + bsf FSR,5 + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + + movlw br0 + movwf FSR + bsf FSR,6 + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + + movlw br0 + movwf FSR + bsf FSR,5 + bsf FSR,6 + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + comf INDF,F + incf FSR,F + + ; Register File TEST 1 + movlw 0x01 + movwf PORTB ; Set Test Number + + movlw r0 + movwf FSR + movlw 0x7e + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x7d + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x7c + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x7b + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x7a + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x79 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x78 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x77 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + + movlw br0 + movwf FSR + movlw 0x6f + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x6e + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x6d + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x6c + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x6b + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x6a + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x69 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x68 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x67 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x66 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x65 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x64 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x63 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x62 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x61 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x60 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + + ; Register File TEST 2 + movlw 0x02 + movwf PORTB ; Set Test Number + + movlw br0 + movwf FSR + bsf FSR,5 + movlw 0x5f + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x5e + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x5d + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x5c + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x5b + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x5a + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x59 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x58 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x57 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x56 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x55 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x54 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x53 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x52 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x51 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x50 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + + ; Register File TEST 3 + movlw 0x03 + movwf PORTB ; Set Test Number + + movlw br0 + movwf FSR + bsf FSR,6 + movlw 0x4f + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x4e + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x4d + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x4c + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x4b + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x4a + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x49 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x48 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x47 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x46 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x45 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x44 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x43 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x42 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x41 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x40 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + + ; Register File TEST 4 + movlw 0x04 + movwf PORTB ; Set Test Number + + movlw br0 + movwf FSR + bsf FSR,5 + bsf FSR,6 + movlw 0x3f + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x3e + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x3d + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x3c + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x3b + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x3a + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x39 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x38 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x37 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x36 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x35 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x34 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x33 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x32 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x31 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + movlw 0x30 + incf FSR,F + subwf INDF,W + btfss STATUS,Z + goto lerr + + nop + nop + nop + nop + movlw 0x01 + movwf PORTA + nop + nop + nop + nop +good ; Loop in good on success + goto good + nop + nop + nop + nop + +lerr + movlw 0xff + movwf PORTA + + nop + nop + nop + nop +lerr_loop ; Loop in lerr on failure + goto lerr_loop + nop + nop + nop + nop + + END + Index: trunk/scode/sanity2.asm =================================================================== --- trunk/scode/sanity2.asm (nonexistent) +++ trunk/scode/sanity2.asm (revision 3) @@ -0,0 +1,454 @@ +;///////////////////////////////////////////////////////////////////// +;//// //// +;//// Mini-RISC-1 //// +;//// Compliance Test 2 //// +;//// Tests PLC register Rd/Wr //// +;//// //// +;//// Author: Rudolf Usselmann //// +;//// russelmann@hotmail.com //// +;//// //// +;///////////////////////////////////////////////////////////////////// +;//// //// +;//// Copyright (C) 2000 Rudolf Usselmann //// +;//// russelmann@hotmail.com //// +;//// //// +;//// This source file may be used and distributed without //// +;//// restriction provided that this copyright statement is not //// +;//// removed from the file and that any derivative work contains //// +;//// the original copyright notice and the associated disclaimer.//// +;//// //// +;//// THIS SOURCE FILE IS PROVIDED "AS IS" AND WITHOUT ANY //// +;//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, WITHOUT //// +;//// LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND //// +;//// FITNESS FOR A PARTICULAR PURPOSE. //// +;//// //// +;///////////////////////////////////////////////////////////////////// + + list p=16c57 + #include p16c5x.inc + +; global Registers +r0 equ 0x8 +r1 equ 0x9 +r2 equ 0xa +r3 equ 0xb +r4 equ 0xc +r5 equ 0xd +r6 equ 0xe +r7 equ 0xf + +; banked Registers +br0 equ 0x10 +br1 equ 0x11 +br2 equ 0x12 +br3 equ 0x13 +br4 equ 0x14 +br5 equ 0x15 +br6 equ 0x16 +br7 equ 0x17 +br8 equ 0x18 +br9 equ 0x19 +br10 equ 0x1a +br11 equ 0x1b +br12 equ 0x1c +br13 equ 0x1d +br14 equ 0x1e +br15 equ 0x1f + + +; PORTB Indicates Test Number +; PORTA Indicates Status: 0 - Running; 1 - done OK; ff - stoped on error + +main ; Main code entry + ; Port IO Test + ; All ports have a Pull up resistor + + ; SETUP all ports + clrw + movwf FSR + movwf PORTA + movwf PORTB + movwf PORTC + tris PORTA + tris PORTB + tris PORTC + + ; ------------------------------- + ; ---- Test the PLC register ---- + ; ------------------------------- + + ; PLC read test 1 TEST 0 + + movlw pclrd1 + movwf r0 + movf PCL,W +pclrd1 subwf r0,W + btfss STATUS,Z + goto lerr + + ; PLC read test 2 TEST 1 + movlw 0x01 + movwf PORTB ; Set Test Number + + movlw pclrd2 + movwf r3 + movf PCL,W +pclrd2 subwf r3,W + btfss STATUS,Z + goto lerr + + ; PLC write test 2 TEST 2 + movlw 0x02 + movwf PORTB ; Set Test Number + + movlw pclwr1 + movwf PCL + + goto lerr + goto lerr + goto lerr +pclwr1 goto pcl1 + goto lerr + goto lerr + goto lerr + +pcl1 + ; PLC write test 2 TEST 3 + movlw 0x03 + movwf PORTB ; Set Test Number + + movlw pclwr2 + movwf PCL + + goto lerr + goto lerr + goto lerr +pclwr2 goto pcl2 + goto lerr + goto lerr + goto lerr + +pcl2 ; Test other instructions that modify PC + ; This are ADDWF PC, BSF PC,X and BCF PC,X + ; (movwf pc already tested above) + + ; PLC write test 3 TEST 4 + ; test addwf PC + movlw 0x04 + movwf PORTB ; Set Test Number + + movlw pcl3b + movwf r0 + movlw pcl3a + subwf r0,W +pcl3a addwf PCL,1 + + goto lerr + goto lerr +pcl3b goto lerr + goto pcl3c + goto lerr + goto lerr + goto lerr +pcl3c + + ; PLC write test 4 TEST 5 + ; test addwf PC + movlw 0x05 + movwf PORTB ; Set Test Number + + movlw pcl4b + movwf br8 + movlw pcl4a + subwf br8,W +pcl4a addwf PCL,1 + + goto lerr + goto lerr +pcl4b goto lerr + goto pcl4c + goto lerr + goto lerr + goto lerr +pcl4c + + ; PLC write test 5 TEST 6 + ; test bsf PC,N + movlw 0x06 + movwf PORTB ; Set Test N + +; allign memory + goto pcl50 + +pcl50 org 0x60 + + bsf PCL,1 ; 60 + goto lerr ; 61 + goto lerr ; 62 + goto pcl5a ; 63 + goto lerr ; 64 + goto lerr ; 65 + goto lerr ; 66 + goto lerr ; 67 + +pcl5a + + ; PLC write test 6 TEST 7 + ; test bsf PC,N + movlw 0x07 + movwf PORTB ; Set Test N + + bsf PCL,2 ; 6A + goto lerr ; 6B + goto lerr ; 6C + goto lerr ; 6D + goto lerr ; 6E + goto pcl6a ; 6F + goto lerr ; 70 + goto lerr ; 71 + +pcl6a + + ; PLC write test 7 TEST 8 + ; test bcf PC,N + movlw 0x08 + movwf PORTB ; Set Test N + + goto pcl7a ; 74 + goto lerr ; 75 + goto lerr ; 76 + goto lerr ; 77 + goto lerr ; 78 + goto pcl7b ; 79 + goto lerr ; 7a + goto lerr ; 7b + +pcl7a + bcf PCL,2 ; 7c + +pcl7b + + + ; Make sure goto works + movlw 0x09 ; TEST 9 + movwf PORTB ; Set Test Number + + + goto gt1 + nop + nop + nop + nop + movlw 0xff + movwf PORTA + nop + nop + nop + nop +gt1 + + ; Make sure call works + movlw 0x0a ; TEST 10 + movwf PORTB ; Set Test Number + + call cal1 + movwf r0 + movlw 0x55 + subwf r0,w + btfss STATUS,Z + goto lerr + + call cal2 + movwf r0 + movlw 0xaa + subwf r0,w + btfss STATUS,Z + goto lerr + + call cal3 + movwf r0 + movlw 0xc3 + subwf r0,w + btfss STATUS,Z + goto lerr + + call cal4 + movwf r0 + movlw 0x3c + subwf r0,w + btfss STATUS,Z + goto lerr + + goto next1 + +cal1 + retlw 0x55 + goto lerr + +cal2 + nop + retlw 0xaa + goto lerr + +cal3 + nop + nop + retlw 0xc3 + goto lerr + +cal4 + nop + nop + nop + retlw 0x3c + goto lerr + +table1 + addwf PCL,F + retlw 0xff + retlw 0xfe + retlw 0xfd + retlw 0xfc + retlw 0xfb + retlw 0xfa + retlw 0xf9 + retlw 0xf8 + retlw 0xf7 + retlw 0xf6 + retlw 0xf5 + goto lerr + goto lerr + goto lerr + goto lerr + goto lerr + goto lerr + +next1 + + + ; Make sure call works (2) + movlw 0x0b ; TEST 11 + movwf PORTB ; Set Test Number + + movlw 0x0 + movwf r0 + call table1 + comf r0,F + subwf r0,F + btfss STATUS,Z + goto lerr + + movlw 0x1 + movwf r0 + call table1 + comf r0,F + subwf r0,F + btfss STATUS,Z + goto lerr + + movlw 0x2 + movwf r0 + call table1 + comf r0,F + subwf r0,F + btfss STATUS,Z + goto lerr + + movlw 0x3 + movwf r0 + call table1 + comf r0,F + subwf r0,F + btfss STATUS,Z + goto lerr + + movlw 0x4 + movwf r0 + call table1 + comf r0,F + subwf r0,F + btfss STATUS,Z + goto lerr + + movlw 0x5 + movwf r0 + call table1 + comf r0,F + subwf r0,F + btfss STATUS,Z + goto lerr + + movlw 0x6 + movwf r0 + call table1 + comf r0,F + subwf r0,F + btfss STATUS,Z + goto lerr + + movlw 0x7 + movwf r0 + call table1 + comf r0,F + subwf r0,F + btfss STATUS,Z + goto lerr + + movlw 0x8 + movwf r0 + call table1 + comf r0,F + subwf r0,F + btfss STATUS,Z + goto lerr + + movlw 0x9 + movwf r0 + call table1 + comf r0,F + subwf r0,F + btfss STATUS,Z + goto lerr + + movlw 0xa + movwf r0 + call table1 + comf r0,F + subwf r0,F + btfss STATUS,Z + goto lerr + + nop + nop + nop + nop + movlw 0x01 + movwf PORTA + nop + nop + nop + nop +good ; Loop in good on success + goto good + nop + nop + nop + nop + +lerr + movlw 0xff + movwf PORTA + + nop + nop + nop + nop +lerr_loop ; Loop in lerr on failure + goto lerr_loop + nop + nop + nop + nop + + END + Index: trunk/scode/rf3.asm =================================================================== --- trunk/scode/rf3.asm (nonexistent) +++ trunk/scode/rf3.asm (revision 3) @@ -0,0 +1,338 @@ +;///////////////////////////////////////////////////////////////////// +;//// //// +;//// Mini-RISC-1 //// +;//// Register File Test 3 //// +;//// Tests Register File //// +;//// //// +;//// Author: Rudolf Usselmann //// +;//// russelmann@hotmail.com //// +;//// //// +;///////////////////////////////////////////////////////////////////// +;//// //// +;//// Copyright (C) 2000 Rudolf Usselmann //// +;//// russelmann@hotmail.com //// +;//// //// +;//// This source file may be used and distributed without //// +;//// restriction provided that this copyright statement is not //// +;//// removed from the file and that any derivative work contains //// +;//// the original copyright notice and the associated disclaimer.//// +;//// //// +;//// THIS SOURCE FILE IS PROVIDED "AS IS" AND WITHOUT ANY //// +;//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, WITHOUT //// +;//// LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND //// +;//// FITNESS FOR A PARTICULAR PURPOSE. //// +;//// //// +;///////////////////////////////////////////////////////////////////// + + list p=16c57 + #include p16c5x.inc + +; global Registers +r0 equ 0x8 +r1 equ 0x9 +r2 equ 0xa +r3 equ 0xb +r4 equ 0xc +r5 equ 0xd +r6 equ 0xe +r7 equ 0xf + +; banked Registers +br0 equ 0x10 +br1 equ 0x11 +br2 equ 0x12 +br3 equ 0x13 +br4 equ 0x14 +br5 equ 0x15 +br6 equ 0x16 +br7 equ 0x17 +br8 equ 0x18 +br9 equ 0x19 +br10 equ 0x1a +br11 equ 0x1b +br12 equ 0x1c +br13 equ 0x1d +br14 equ 0x1e +br15 equ 0x1f + + +; PORTB Indicates Test Number +; PORTA Indicates Status: 0 - Running; 1 - done OK; ff - stoped on error + +main ; Main code entry + ; Port IO Test + ; All ports have a Pull up resistor + + ; SETUP all ports + clrw + movwf FSR + movwf PORTA + movwf PORTB + movwf PORTC + tris PORTA + tris PORTB + tris PORTC + + ; --------------------------------------- + ; ---- Test RMW on Register fil ---- + ; --------------------------------------- + + movlw 0x01 ; TEST 1 + movwf PORTB ; Set Test Number + + movlw 0xfc + movwf r0 + incf r0,F + incf r0,F + incf r0,F + incf r0,F + btfss STATUS,Z + goto lerr + + movlw 0xfc + movwf br8 + incf br8,F + incf br8,F + incf br8,F + incf br8,F + btfss STATUS,Z + goto lerr + + movlw 0x02 ; TEST 2 + movwf PORTB ; Set Test Number + + movlw r1 + movwf FSR + movlw 0xfc + movwf INDF + incf INDF,F + incf INDF,F + incf INDF,F + incf INDF,F + btfss STATUS,Z + goto lerr + + movlw br9 + movwf FSR + movlw 0xfc + movwf INDF + incf INDF,F + incf INDF,F + incf INDF,F + incf INDF,F + btfss STATUS,Z + goto lerr + + + + movlw 0x03 ; TEST 3 + movwf PORTB ; Set Test Number + + movlw 0x04 + movwf r0 + decf r0,F + decf r0,F + decf r0,F + decf r0,F + btfss STATUS,Z + goto lerr + + + movlw 0x04 + movwf br0 + decf br0,F + decf br0,F + decf br0,F + decf br0,F + btfss STATUS,Z + goto lerr + + + movlw 0x04 ; TEST 4 + movwf PORTB ; Set Test Number + + movlw r1 + movwf FSR + movlw 0x04 + movwf INDF + decf INDF,F + decf INDF,F + decf INDF,F + decf INDF,F + btfss STATUS,Z + goto lerr + + movlw br9 + movwf FSR + movlw 0x04 + movwf INDF + decf INDF,F + decf INDF,F + decf INDF,F + decf INDF,F + btfss STATUS,Z + goto lerr + + + movlw 0x05 ; TEST 5 + movwf PORTB ; Set Test Number + + movlw 0xfc + movwf r4 + incfsz r4,F + incfsz r4,F + incfsz r4,F + incfsz r4,F + goto lerr + + movlw 0xfc + movwf br8 + incfsz br8,F + incfsz br8,F + incfsz br8,F + incfsz br8,F + goto lerr + + + movlw 0x06 ; TEST 6 + movwf PORTB ; Set Test Number + + movlw r1 + movwf FSR + movlw 0xfc + movwf INDF + incfsz INDF,F + incfsz INDF,F + incfsz INDF,F + incfsz INDF,F + goto lerr + + movlw br9 + movwf FSR + movlw 0xfc + movwf INDF + incfsz INDF,F + incfsz INDF,F + incfsz INDF,F + incfsz INDF,F + goto lerr + + movlw 0x07 ; TEST 7 + movwf PORTB ; Set Test Number + + movlw 0x04 + movwf r0 + decfsz r0,F + decfsz r0,F + decfsz r0,F + decfsz r0,F + goto lerr + + + movlw 0x04 + movwf br0 + decfsz br0,F + decfsz br0,F + decfsz br0,F + decfsz br0,F + goto lerr + + + movlw 0x08 ; TEST 8 + movwf PORTB ; Set Test Number + + movlw r1 + movwf FSR + movlw 0x04 + movwf INDF + decfsz INDF,F + decfsz INDF,F + decfsz INDF,F + decfsz INDF,F + goto lerr + + movlw br9 + movwf FSR + movlw 0x04 + movwf INDF + decfsz INDF,F + decfsz INDF,F + decfsz INDF,F + decfsz INDF,F + goto lerr + + + movlw 0x09 ; TEST 9 + movwf PORTB ; Set Test Number + + movlw 0xfc + movwf FSR + incf FSR,F + incf FSR,F + incf FSR,F + incf FSR,F + btfss STATUS,Z + goto lerr + + movlw 0x04 + movwf FSR + movlw 0x7f + decf FSR,F + decf FSR,F + decf FSR,F + decf FSR,F + andwf FSR,F + btfss STATUS,Z + goto lerr + + movlw 0x0a ; TEST 10 + movwf PORTB ; Set Test Number + + movlw 0xfc + movwf STATUS + movlw 0x18 + incf STATUS,F + incf STATUS,F + incf STATUS,F + incf STATUS,F + subwf STATUS,W + btfss STATUS,Z + goto lerr + + + + + nop + nop + nop + nop + movlw 0x01 + movwf PORTA + nop + nop + nop + nop +good ; Loop in good on success + goto good + nop + nop + nop + nop + +lerr + movlw 0xff + movwf PORTA + + nop + nop + nop + nop +lerr_loop ; Loop in lerr on failure + goto lerr_loop + nop + nop + nop + nop + + END + Index: trunk/scode/tmr_wdt.rom =================================================================== --- trunk/scode/tmr_wdt.rom (nonexistent) +++ trunk/scode/tmr_wdt.rom (revision 3) @@ -0,0 +1,63 @@ + +@000 040 +@001 024 +@002 025 +@003 026 +@004 027 +@005 005 +@006 006 +@007 007 +@008 C01 +@009 026 +@00A C00 +@00B 002 +@00C 021 +@00D 004 +@00E 000 +@00F 000 +@010 000 +@011 000 +@012 040 +@013 029 +@014 040 +@015 028 +@016 201 +@017 2E8 +@018 A16 +@019 2E9 +@01A A14 +@01B 000 +@01C 000 +@01D 000 +@01E 000 +@01F 000 +@020 000 +@021 040 +@022 021 +@023 004 +@024 000 +@025 000 +@026 000 +@027 000 +@028 C01 +@029 025 +@02A 000 +@02B 000 +@02C 000 +@02D 000 +@02E A2E +@02F 000 +@030 000 +@031 000 +@032 000 +@033 CFF +@034 025 +@035 000 +@036 000 +@037 000 +@038 000 +@039 A39 +@03A 000 +@03B 000 +@03C 000 +@03D 000 Index: trunk/scode/hex2v.c =================================================================== --- trunk/scode/hex2v.c (nonexistent) +++ trunk/scode/hex2v.c (revision 3) @@ -0,0 +1,125 @@ +/* *********************************************************************** + The Free IP Project + Free-RISC8 -- Verilog 8-bit Microcontroller + (c) 1999, The Free IP Project and Thomas Coonan + + + FREE IP GENERAL PUBLIC LICENSE + TERMS AND CONDITIONS FOR USE, COPYING, DISTRIBUTION, AND MODIFICATION + + 1. You may copy and distribute verbatim copies of this core, as long + as this file, and the other associated files, remain intact and + unmodified. Modifications are outlined below. + 2. You may use this core in any way, be it academic, commercial, or + military. Modified or not. + 3. Distribution of this core must be free of charge. Charging is + allowed only for value added services. Value added services + would include copying fees, modifications, customizations, and + inclusion in other products. + 4. If a modified source code is distributed, the original unmodified + source code must also be included (or a link to the Free IP web + site). In the modified source code there must be clear + identification of the modified version. + 5. Visit the Free IP web site for additional information. + http://www.free-ip.com + +*********************************************************************** */ + +// Intel HEX to Verilog converter. +// +// Usage: +// hex2v +// +// You probably want to simply redirect the output into a file. +// +#include +#include +#include + +// Input and Output file streams. +FILE *fpi; + +// Well.. Let's read stuff in completely before outputting.. Programs +// should be pretty small.. +// +#define MAX_MEMORY_SIZE 2048 +struct { + unsigned int nAddress; + unsigned int byData; +} Memory[MAX_MEMORY_SIZE]; + +char szLine[80]; +unsigned int start_address, address, ndata_bytes, ndata_words; +unsigned int data; +unsigned int nMemoryCount; + +int main (int argc, char *argv[]) +{ + int i; + + if (argc != 2) { + printf ("\nThe Synthetic PIC --- Intel HEX File to Verilog memory file"); + printf ("\nUsage: hex2verilog "); + printf ("\n"); + return 0; + } + + + // Open input HEX file + fpi=fopen(argv[1], "r"); + if (!fpi) { + printf("\nCan't open input file %s.\n", argv[1]); + return 1; + } + + // Read in the HEX file + // + // !! Note, that things are a little strange for us, because the PIC is + // a 12-bit instruction, addresses are 16-bit, and the hex format is + // 8-bit oriented!! + // + nMemoryCount = 0; + while (!feof(fpi)) { + // Get one Intel HEX line + fgets (szLine, 80, fpi); + if (strlen(szLine) >= 10) { + // This is the PIC, with its 12-bit "words". We're interested in these + // words and not the bytes. Read 4 hex digits at a time for each + // address. + // + sscanf (&szLine[1], "%2x%4x", &ndata_bytes, &start_address); + if (start_address >= 0 && start_address <= 20000 && ndata_bytes > 0) { + // Suck up data bytes starting at 9th byte. + i = 9; + + // Words.. not bytes.. + ndata_words = ndata_bytes/2; + start_address = start_address/2; + + // Spit out all the data that is supposed to be on this line. + for (address = start_address; address < start_address + ndata_words; address++) { + // Scan out 4 hex digits for a word. This will be one address. + sscanf (&szLine[i], "%04x", &data); + + // Need to swap bytes... + data = ((data >> 8) & 0x00ff) | ((data << 8) & 0xff00); + i += 4; + + // Store in our memory buffer + Memory[nMemoryCount].nAddress = address; + Memory[nMemoryCount].byData = data; + nMemoryCount++; + } + } + } + } + fclose (fpi); + + // Now output the Verilog $readmemh format! + // + for (i = 0; i < nMemoryCount; i++) { + printf ("\n@%03X %03X", Memory[i].nAddress, Memory[i].byData); + } + printf ("\n"); + +}

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