URL
https://opencores.org/ocsvn/minsoc/minsoc/trunk
Subversion Repositories minsoc
Compare Revisions
- This comparison shows the changes necessary to convert path
/minsoc/branches/rc-1.0
- from Rev 110 to Rev 109
- ↔ Reverse comparison
Rev 110 → Rev 109
/prj/scripts/altvprj.sh
File deleted
prj/scripts/altvprj.sh
Property changes :
Deleted: svn:executable
## -1 +0,0 ##
-*
\ No newline at end of property
Index: prj/scripts/altvhdprj.sh
===================================================================
--- prj/scripts/altvhdprj.sh (revision 110)
+++ prj/scripts/altvhdprj.sh (nonexistent)
@@ -1,64 +0,0 @@
-#!/bin/bash
-
-#system workings
-MINSOC_DIR=`pwd`/..
-
-PROJECT=$1
-OUTPUT=$2
-
-ENV=`uname -o`
-
-function adaptpath
-{
- if [ "$ENV" == "Cygwin" ]
- then
- local cygpath=`cygpath -w $1`
- local result=`echo $cygpath | sed 's/\\\\/\\//g'`
- echo "$result"
- else
- echo "$1"
- fi
-}
-
-if [ ! -f $PROJECT ]
-then
- echo "Unexistent project file."
- exit 1
-fi
-
-if [ -z "$OUTPUT" ]
-then
- echo "Second argument should be the destintion file for the file and directory inclusions."
- exit 1
-fi
-echo -n "" > $OUTPUT
-
-source $PROJECT
-
-for dir in "${PROJECT_DIR[@]}"
-do
- adapted_dir=`adaptpath $MINSOC_DIR/$dir`
- echo "set_global_assignment -name SEARCH_PATH $adapted_dir" >> $OUTPUT
-done
-
-for file in "${PROJECT_SRC[@]}"
-do
- FOUND=0
-
- for dir in "${PROJECT_DIR[@]}"
- do
- if [ -f $MINSOC_DIR/$dir/$file ]
- then
- adapted_file=`adaptpath $MINSOC_DIR/$dir/$file`
- echo "set_global_assignment -name VHDL_FILE $adapted_file" >> $OUTPUT
- FOUND=1
- break
- fi
- done
-
- if [ $FOUND != 1 ]
- then
- echo "FILE NOT FOUND: $file"
- exit 1
- fi
-done
prj/scripts/altvhdprj.sh
Property changes :
Deleted: svn:executable
## -1 +0,0 ##
-*
\ No newline at end of property
Index: prj/scripts/simvhdl.sh
===================================================================
--- prj/scripts/simvhdl.sh (revision 110)
+++ prj/scripts/simvhdl.sh (revision 109)
@@ -52,7 +52,7 @@
if [ $FOUND != 1 ]
then
- echo "FILE NOT FOUND: $file"
+ echo "FILE NOT FOUND"
exit 1
fi
done
/prj/scripts/xilinxprj.sh
54,7 → 54,7
|
if [ $FOUND != 1 ] |
then |
echo "FILE NOT FOUND: $file" |
echo "FILE NOT FOUND" |
exit 1 |
fi |
done |
/prj/scripts/simverilog.sh
58,7 → 58,7
|
if [ $FOUND != 1 ] |
then |
echo "FILE NOT FOUND: $file" |
echo "FILE NOT FOUND" |
exit 1 |
fi |
done |
/prj/scripts/altprj.sh
0,0 → 1,70
#!/bin/bash |
|
#system workings |
MINSOC_DIR=`pwd`/.. |
|
PROJECT=$1 |
OUTPUT=$2 |
|
ENV=`uname -o` |
|
function adaptpath |
{ |
if [ "$ENV" == "Cygwin" ] |
then |
local cygpath=`cygpath -w $1` |
local result=`echo $cygpath | sed 's/\\\\/\\//g'` |
echo "$result" |
else |
echo "$1" |
fi |
} |
|
if [ ! -f $PROJECT ] |
then |
echo "Unexistent project file." |
exit 1 |
fi |
|
if [ -z "$OUTPUT" ] |
then |
echo "Second argument should be the destintion file for the file and directory inclusions." |
exit 1 |
fi |
echo -n "" > $OUTPUT |
|
source $PROJECT |
|
for dir in "${PROJECT_DIR[@]}" |
do |
adapted_dir=`adaptpath $MINSOC_DIR/$dir` |
echo "set_global_assignment -name SEARCH_PATH $adapted_dir" >> $OUTPUT |
done |
|
for file in "${PROJECT_SRC[@]}" |
do |
FOUND=0 |
|
for dir in "${PROJECT_DIR[@]}" |
do |
if [ -f $MINSOC_DIR/$dir/$file ] |
then |
adapted_file=`adaptpath $MINSOC_DIR/$dir/$file` |
is_vhdl=`ls $MINSOC_DIR/$dir/$file | grep vhd` |
if [ -z $is_vhdl ] |
then |
echo "set_global_assignment -name VERILOG_FILE $adapted_file" >> $OUTPUT |
else |
echo "set_global_assignment -name VHDL_FILE $adapted_file" >> $OUTPUT |
fi |
FOUND=1 |
break |
fi |
done |
|
if [ $FOUND != 1 ] |
then |
echo "FILE NOT FOUND" |
exit 1 |
fi |
done |
prj/scripts/altprj.sh
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: prj/Makefile
===================================================================
--- prj/Makefile (revision 110)
+++ prj/Makefile (revision 109)
@@ -11,19 +11,15 @@
SIM_VERILOG_FILES = $(addprefix $(SIMULATION_DIR)/, $(addsuffix .verilog, $(basename $(VERILOG_PROJECTS))))
SIM_VHDL_FILES = $(addprefix $(SIMULATION_DIR)/, $(addsuffix .vhdl, $(basename $(VHDL_PROJECTS))))
-
XILINX_PRJ_FILES = $(addprefix $(XILINX_DIR)/, $(addsuffix .prj, $(basename $(PROJECTS))))
XILINX_XST_FILES = $(addprefix $(XILINX_DIR)/, $(addsuffix .xst, $(basename $(PROJECTS))))
+ALTERA_PRJ_FILES = $(addprefix $(ALTERA_DIR)/, $(addsuffix .prj, $(basename $(PROJECTS))))
-ALTERA_VERILOG_PRJ_FILES = $(addprefix $(ALTERA_DIR)/, $(addsuffix .vprj, $(basename $(VERILOG_PROJECTS))))
-ALTERA_VHD_PRJ_FILES = $(addprefix $(ALTERA_DIR)/, $(addsuffix .vhdprj, $(basename $(VHDL_PROJECTS))))
+all: $(SIMULATION_DIR)/minsoc_verilog.src $(SIMULATION_DIR)/minsoc_vhdl.src $(XILINX_PRJ_FILES) $(XILINX_XST_FILES) $(ALTERA_PRJ_FILES)
-all: $(SIMULATION_DIR)/minsoc_verilog.src $(SIMULATION_DIR)/minsoc_vhdl.src $(XILINX_PRJ_FILES) $(XILINX_XST_FILES) $(ALTERA_VERILOG_PRJ_FILES) $(ALTERA_VHDL_PRJ_FILES)
-
clean:
- rm -rf $(SIMULATION_DIR)/*.verilog $(SIMULATION_DIR)/*.vhdl $(SIMULATION_DIR)/*.src $(XILINX_DIR)/*.prj $(XILINX_DIR)/*.xst $(ALTERA_DIR)/*.vprj $(ALTERA_DIR)/*.vhdprj
+ rm -rf $(SIMULATION_DIR)/*.verilog $(SIMULATION_DIR)/*.vhdl $(SIMULATION_DIR)/*.src $(XILINX_DIR)/*.prj $(XILINX_DIR)/*.xst $(ALTERA_DIR)/*.prj
-
$(XILINX_DIR)/minsoc_top.xst: $(SRC_DIR)/minsoc_top.prj
bash $(SCRIPTS_DIR)/xilinxxst.sh $^ $@ minsoc_top.prj minsoc_top topmodule
@@ -36,14 +32,9 @@
$(XILINX_DIR)/%.prj: $(SRC_DIR)/%.prj
bash $(SCRIPTS_DIR)/xilinxprj.sh $^ $@
+$(ALTERA_DIR)/%.prj: $(SRC_DIR)/%.prj
+ bash $(SCRIPTS_DIR)/altprj.sh $^ $@
-$(ALTERA_DIR)/%.vprj: $(SRC_DIR)/%.prj
- bash $(SCRIPTS_DIR)/altvprj.sh $^ $@
-
-$(ALTERA_DIR)/%.vhdprj: $(SRC_DIR)/%.prj
- bash $(SCRIPTS_DIR)/altvhdprj.sh $^ $@
-
-
$(SIMULATION_DIR)/minsoc_verilog.src: $(SIM_VERILOG_FILES)
cat $(SIM_VERILOG_FILES) > $(SIMULATION_DIR)/minsoc_verilog.src
/prj/src/or1200_top.prj
57,4 → 57,8
or1200_spram_128x32.v |
or1200_dc_fsm.v |
or1200_wb_biu.v |
or1200_spram_64x22.v) |
or1200_spram_64x22.v |
or1200_fpu.v |
or1200_spram.v |
or1200_spram_32_bw.v |
or1200_dpram.v) |
/utils/setup/minsoc-configure.sh
File deleted
utils/setup/minsoc-configure.sh
Property changes :
Deleted: svn:executable
## -1 +0,0 ##
-*
\ No newline at end of property
Index: utils/setup/configure.sh
===================================================================
--- utils/setup/configure.sh (revision 110)
+++ utils/setup/configure.sh (nonexistent)
@@ -1,37 +0,0 @@
-. beautify.sh
-
-#Configuring MinSoC
-cecho "\nConfiguring MinSoC"
-execcmd "cd ${DIR_TO_INSTALL}/minsoc/backend/std"
-execcmd "Configuring MinSoC as standard board (simulatable but not synthesizable)" "./configure"
-execcmd "cd ${DIR_TO_INSTALL}"
-
-
-#Configuring Advanced Debug System to work with MinSoC
-cecho "\nConfiguring Advanced Debug System to work with MinSoC"
-execcmd "cd ${DIR_TO_INSTALL}/minsoc/rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog"
-sed "s%\`define DBG_JSP_SUPPORTED%//\`define DBG_JSP_SUPPORTED%" adbg_defines.v > TMPFILE && mv TMPFILE adbg_defines.v
-
-#Compiling and moving adv_jtag_bridge debug modules for simulation
-execcmd "cd ${DIR_TO_INSTALL}/minsoc/rtl/verilog/adv_debug_sys/Software/adv_jtag_bridge/sim_lib/icarus"
-execcmd "make"
-execcmd "cp jp-io-vpi.vpi ${DIR_TO_INSTALL}/minsoc/bench/verilog/vpi"
-
-#Patching OpenRISC Release 1 with Advanced Debug System patch for Watchpoints
-execcmd "cd ${DIR_TO_INSTALL}/minsoc/rtl/verilog/or1200/rtl/verilog"
-execcmd "patch -p0 < ${DIR_TO_INSTALL}/minsoc/rtl/verilog/adv_debug_sys/Patches/OR1200v1/or1200v1_hwbkpt.patch"
-
-
-#Precompiling firmwares
-cecho "\nPrecompiling delivered firmwares";
-execcmd "cd ${DIR_TO_INSTALL}/minsoc/sw/utils"
-execcmd "Make utils" "make"
-
-execcmd "cd ${DIR_TO_INSTALL}/minsoc/sw/support"
-execcmd "Make support tools" "make"
-
-execcmd "cd ${DIR_TO_INSTALL}/minsoc/sw/drivers"
-execcmd "Make drivers" "make"
-
-execcmd "cd ${DIR_TO_INSTALL}/minsoc/sw/uart"
-execcmd "Make UART" "make"
Index: utils/setup/minsoc-install.sh
===================================================================
--- utils/setup/minsoc-install.sh (revision 110)
+++ utils/setup/minsoc-install.sh (revision 109)
@@ -1,12 +1,31 @@
#!/bin/bash
-# Author: Constantinos Xanthopoulos & Raul Fajardo
+# Author: Constantinos Xanthopoulos
# This script install MinSOC tree
# under a specific directory.
# ===== CONFIGURATIONS =====
# ==========================
-MINSOC_SVN_URL="http://opencores.org/ocsvn/minsoc/minsoc/branches/rc-0.1"
+# Where should I put the dir. minsoc?
+# ex. /home/conx/Thesis/
+DIR_TO_INSTALL=`pwd`
+
+# This variable should be set to trunk
+# or to stable.
+VERSION=""
+
+# This variable should take one of
+# the following values depending
+# to your system: linux, cygwin, freebsd
+ENV=""
+
+# !!! DO NOT EDIT BELLOW THIS LINE !!!
+# ===================================
+
+# ===== SCRIPT ======
+# ===================
+
+
# Debug ?
export DEBUG=0;
. beautify.sh
@@ -69,7 +88,6 @@
# Wizard
-DIR_TO_INSTALL=`pwd`
if [ -z "${ALTDIR}" ]
then
cnecho "Give full path (ex. /home/foo/) for installation directory or leave empty for "${DIR_TO_INSTALL}": ";
@@ -98,7 +116,7 @@
cecho "\nDownloading packages"
cd ${DIR_TO_INSTALL}
cecho "Download MinSoC"
-svn co -q ${MINSOC_SVN_URL} minsoc #user need to input password, execcmd omits command output and should be this way
+svn co -q http://opencores.org/ocsvn/minsoc/minsoc/trunk/ minsoc #user need to input password, execcmd omits command output and should be this way
execcmd "cd ${DIR_TO_INSTALL}/download"
if [ "$ENV" == "Cygwin" ]
then
@@ -225,11 +243,39 @@
execcmd "make install"
-#Configuring MinSoC, Advanced Debug System and patching OpenRISC
-export ${DIR_TO_INSTALL}
-bash configure.sh
+#Configuring MinSoC
+cecho "\nConfiguring MinSoC"
+execcmd "cd ${DIR_TO_INSTALL}/minsoc/backend/std"
+execcmd "Configuring MinSoC as standard board (simulatable but not synthesizable)" "./configure"
+execcmd "cd ${DIR_TO_INSTALL}"
+#Configuring Advanced Debug System to work with MinSoC
+cecho "\nConfiguring Advanced Debug System to work with MinSoC"
+execcmd "cd ${DIR_TO_INSTALL}/minsoc/rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog"
+sed "s%\`define DBG_JSP_SUPPORTED%//\`define DBG_JSP_SUPPORTED%" adbg_defines.v > TMPFILE && mv TMPFILE adbg_defines.v
+
+#Compiling and moving adv_jtag_bridge debug modules for simulation
+execcmd "cd ${DIR_TO_INSTALL}/minsoc/rtl/verilog/adv_debug_sys/Software/adv_jtag_bridge/sim_lib/icarus"
+execcmd "make"
+execcmd "cp jp-io-vpi.vpi ${DIR_TO_INSTALL}/minsoc/bench/verilog/vpi"
+
+
+#Precompiling firmwares
+cecho "\nPrecompiling delivered firmwares";
+execcmd "cd ${DIR_TO_INSTALL}/minsoc/sw/utils"
+execcmd "Make utils" "make"
+
+execcmd "cd ${DIR_TO_INSTALL}/minsoc/sw/support"
+execcmd "Make support tools" "make"
+
+execcmd "cd ${DIR_TO_INSTALL}/minsoc/sw/drivers"
+execcmd "Make drivers" "make"
+
+execcmd "cd ${DIR_TO_INSTALL}/minsoc/sw/uart"
+execcmd "Make UART" "make"
+
+
#Setting-up new variables
cecho "\nSystem configurations"
execcmd "Adding MinSoC tools to PATH" "echo \"PATH=\\\$PATH:$DIR_TO_INSTALL/tools/bin\" >> /home/$(whoami)/.bashrc;";
/backend/altera_3c25_board/configure
17,7 → 17,7
|
PROJECT_FILE=minsoc_top.qsf |
|
SYN_FILES=(adbg_top.vprj jtag_top.vprj or1200_top.vprj uart_top.vprj minsoc_top.vprj altera_virtual_jtag.vhdprj) |
SYN_FILES=(adbg_top.prj jtag_top.prj or1200_top.prj uart_top.prj minsoc_top.prj altera_virtual_jtag.prj) |
MAKEFILE=Makefile |
|
FIND_PART='DEVICE_PART' |
rtl/verilog
Property changes :
Modified: svn:externals
## -1,5 +1,5 ##
-adv_debug_sys -r58 http://opencores.org/ocsvn/adv_debug_sys/adv_debug_sys/trunk
-ethmac -r366 http://opencores.org/ocsvn/ethmac/ethmac/trunk
-or1200 http://opencores.org/ocsvn/openrisc/openrisc/tags/or1200/rel1
-uart16550 -r108 http://opencores.org/ocsvn/uart16550/uart16550/trunk
+adv_debug_sys http://opencores.org/ocsvn/adv_debug_sys/adv_debug_sys/trunk
+ethmac http://opencores.org/ocsvn/ethmac/ethmac/trunk
+or1200 http://opencores.org/ocsvn/openrisc/openrisc/trunk/or1200
+uart16550 http://opencores.org/ocsvn/uart16550/uart16550/trunk