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URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

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  • This comparison shows the changes necessary to convert path
    /minsoc/trunk/bench
    from Rev 7 to Rev 8
    Reverse comparison

Rev 7 → Rev 8

/verilog/minsoc_bench.v
49,7 → 49,11
integer initialize, final, ptr;
reg [8*64:0] file_name;
reg load_file;
 
initial begin
reset = 1'b0;
clock = 1'b0;
 
load_file = 1'b0;
`ifdef INITIALIZE_MEMORY_MODEL
load_file = 1'b1;
57,6 → 61,7
`ifdef START_UP
load_file = 1'b1;
`endif
 
//get firmware hex file from command line input
if ( load_file ) begin
if ( ! $value$plusargs("file_name=%s", file_name) || file_name == 0 ) begin
211,19 → 216,12
 
 
//
// Regular clocking, reset and output
// Regular clocking and output
//
initial begin
clock <= 1'b0;
reset <= 1'b0;
 
end
 
always begin
#((`CLK_PERIOD)/2) clock <= ~clock;
end
 
 
`ifdef VCD_OUTPUT
initial begin
$dumpfile("../results/minsoc_wave.vcd");

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