URL
https://opencores.org/ocsvn/minsoc/minsoc/trunk
Subversion Repositories minsoc
Compare Revisions
- This comparison shows the changes necessary to convert path
/minsoc/trunk
- from Rev 91 to Rev 90
- ↔ Reverse comparison
Rev 91 → Rev 90
/prj/sim/minsoc_top.src
7,6 → 7,9
+incdir+/home/raul/or1k/minsoc/prj/../rtl/verilog/uart16550/rtl/verilog |
/home/raul/or1k/minsoc/prj/../backend/minsoc_defines.v |
/home/raul/or1k/minsoc/prj/../rtl/verilog/timescale.v |
/home/raul/or1k/minsoc/prj/../rtl/verilog/or1200/rtl/verilog/timescale.v |
/home/raul/or1k/minsoc/prj/../rtl/verilog/ethmac/rtl/verilog/timescale.v |
/home/raul/or1k/minsoc/prj/../rtl/verilog/uart16550/rtl/verilog/timescale.v |
/home/raul/or1k/minsoc/prj/../rtl/verilog/minsoc_top.v |
/home/raul/or1k/minsoc/prj/../rtl/verilog/minsoc_tc_top.v |
/home/raul/or1k/minsoc/prj/../rtl/verilog/minsoc_onchip_ram.v |
/prj/sim/minsoc.src
18,6 → 18,9
+incdir+/home/raul/or1k/minsoc/prj/../rtl/verilog/uart16550/rtl/verilog |
/home/raul/or1k/minsoc/prj/../backend/minsoc_defines.v |
/home/raul/or1k/minsoc/prj/../rtl/verilog/timescale.v |
/home/raul/or1k/minsoc/prj/../rtl/verilog/or1200/rtl/verilog/timescale.v |
/home/raul/or1k/minsoc/prj/../rtl/verilog/ethmac/rtl/verilog/timescale.v |
/home/raul/or1k/minsoc/prj/../rtl/verilog/uart16550/rtl/verilog/timescale.v |
/home/raul/or1k/minsoc/prj/../rtl/verilog/minsoc_top.v |
/home/raul/or1k/minsoc/prj/../rtl/verilog/minsoc_tc_top.v |
/home/raul/or1k/minsoc/prj/../rtl/verilog/minsoc_onchip_ram.v |
/prj/xilinx/minsoc_top.prj
1,5 → 1,8
`include "/home/raul/or1k/minsoc/prj/../backend/minsoc_defines.v" |
`include "/home/raul/or1k/minsoc/prj/../rtl/verilog/timescale.v" |
`include "/home/raul/or1k/minsoc/prj/../rtl/verilog/or1200/rtl/verilog/timescale.v" |
`include "/home/raul/or1k/minsoc/prj/../rtl/verilog/ethmac/rtl/verilog/timescale.v" |
`include "/home/raul/or1k/minsoc/prj/../rtl/verilog/uart16550/rtl/verilog/timescale.v" |
`include "/home/raul/or1k/minsoc/prj/../rtl/verilog/minsoc_top.v" |
`include "/home/raul/or1k/minsoc/prj/../rtl/verilog/minsoc_tc_top.v" |
`include "/home/raul/or1k/minsoc/prj/../rtl/verilog/minsoc_onchip_ram.v" |
/prj/scripts/xilinxprj.sh
34,7 → 34,6
echo -n "$MINSOC_DIR/$dir/$file" >> $SRC_OUTPUT |
echo '"' >> $SRC_OUTPUT |
FOUND=1 |
break |
fi |
done |
|
/prj/scripts/simprj.sh
36,7 → 36,6
then |
echo "$MINSOC_DIR/$dir/$file" >> $OUTPUT |
FOUND=1 |
break |
fi |
done |
|