OpenCores
URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

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  • This comparison shows the changes necessary to convert path
    /minsoc
    from Rev 36 to Rev 35
    Reverse comparison

Rev 36 → Rev 35

trunk/utils/cable_parallel.c Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: trunk/utils/minsoc_wb_32_8_bridge.v =================================================================== --- trunk/utils/minsoc_wb_32_8_bridge.v (revision 36) +++ trunk/utils/minsoc_wb_32_8_bridge.v (nonexistent) @@ -1,52 +0,0 @@ - -module minsoc_wb_32_8_bridge( - wb_32_sel_i, - wb_32_dat_i, wb_32_dat_o, wb_32_adr_i, - - wb_8_dat_i, wb_8_dat_o, wb_8_adr_i -); - -input [3:0] wb_32_sel_i; - -input [31:0] wb_32_dat_i; -output reg [31:0] wb_32_dat_o; -input [31:0] wb_32_adr_i; - -output reg [7:0] wb_8_dat_i; -input [7:0] wb_8_dat_o; -output [31:0] wb_8_adr_i; - -reg [1:0] wb_8_adr; - -// put output to the correct byte in 32 bits using select line -always @(wb_32_sel_i or wb_8_dat_o) - case (wb_32_sel_i) - 4'b0001: wb_32_dat_o <= #1 {24'b0, wb_8_dat_o}; - 4'b0010: wb_32_dat_o <= #1 {16'b0, wb_8_dat_o , 8'b0}; - 4'b0100: wb_32_dat_o <= #1 {8'b0, wb_8_dat_o , 16'b0}; - 4'b1000: wb_32_dat_o <= #1 {wb_8_dat_o , 24'b0}; - 4'b1111: wb_32_dat_o <= #1 {24'b0, wb_8_dat_o}; - default: wb_32_dat_o <= #1 0; - endcase // case(wb_sel_i) - -always @(wb_32_sel_i or wb_32_dat_i) -begin - case (wb_32_sel_i) - 4'b0001 : wb_8_dat_i = wb_32_dat_i[7:0]; - 4'b0010 : wb_8_dat_i = wb_32_dat_i[15:8]; - 4'b0100 : wb_8_dat_i = wb_32_dat_i[23:16]; - 4'b1000 : wb_8_dat_i = wb_32_dat_i[31:24]; - default : wb_8_dat_i = wb_32_dat_i[7:0]; - endcase // case(wb_sel_i) - case (wb_32_sel_i) - 4'b0001 : wb_8_adr = 2'h3; - 4'b0010 : wb_8_adr = 2'h2; - 4'b0100 : wb_8_adr = 2'h1; - 4'b1000 : wb_8_adr = 2'h0; - default : wb_8_adr = 2'h0; - endcase // case(wb_sel_i) -end - -assign wb_8_adr_i = { wb_32_adr_i[31:2] , wb_8_adr }; - -endmodule Index: trunk/doc/src/INSTALL.odt =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: trunk/doc/src/FAQ.odt =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: trunk/doc/src/HOWTO.odt =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: trunk/doc/FAQ.pdf =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: trunk/doc/INSTALL.pdf =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: trunk/doc/HOWTO.pdf =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: trunk/sw/drivers/uart.h =================================================================== --- trunk/sw/drivers/uart.h (revision 36) +++ trunk/sw/drivers/uart.h (nonexistent) @@ -1,9 +0,0 @@ - -#include "../support/uart.h" - -void uart_print_str(char *); -void uart_print_long(unsigned long); - -void uart_interrupt(); -void uart_print_short(unsigned long ul); - Index: trunk/sw/drivers/eth.c =================================================================== --- trunk/sw/drivers/eth.c (revision 36) +++ trunk/sw/drivers/eth.c (nonexistent) @@ -1,102 +0,0 @@ -#include "../support/board.h" -#include "../support/support.h" -#include "eth.h" - -int eth_tx_done; -int eth_rx_done; -int eth_rx_len; -unsigned char eth_tx_packet[1536]; //max length -unsigned char eth_rx_packet[1536]; -unsigned char * eth_tx_data; -unsigned char * eth_rx_data; - -void eth_recv_ack(void) -{ - eth_rx_done = 0; - eth_rx_len = 0; - //accept further data (reset RXBD to empty) - REG32(ETH_BASE + ETH_RXBD0L) = RX_READY; //len = 0 | IRQ & WR = 1 | EMPTY = 1 -} - -void eth_init() -{ - //TXEN & RXEN = 1; PAD & CRC = 1; FULLD = 1 - REG32(ETH_BASE + ETH_MODER) = ETH_TXEN | ETH_RXEN | ETH_PAD | ETH_CRCEN | ETH_FULLD; - //PHY Address = 0x001 - REG32(ETH_BASE + ETH_MIIADDRESS) = 0x00000001; - - //enable all interrupts - REG32(ETH_BASE + ETH_INT_MASK) = ETH_RXB | ETH_TXB; - - //set MAC ADDRESS - REG32(ETH_BASE + ETH_MAC_ADDR1) = (OWN_MAC_ADDRESS_5 << 8) | OWN_MAC_ADDRESS_4; //low word = mac address high word - REG32(ETH_BASE + ETH_MAC_ADDR0) = (OWN_MAC_ADDRESS_3 << 24) | (OWN_MAC_ADDRESS_2 << 16) - | (OWN_MAC_ADDRESS_1 << 8) | OWN_MAC_ADDRESS_0; //mac address rest - - //configure TXBD0 - REG32(ETH_BASE + ETH_TXBD0H) = eth_tx_packet; //address used for tx_data - REG32(ETH_BASE + ETH_TXBD0L) = TX_READY; //length = 0 | PAD & CRC = 1 | IRQ & WR = 1 - - //configure RXBD0 - REG32(ETH_BASE + ETH_RXBD0H) = eth_rx_packet; //address used for tx_data - REG32(ETH_BASE + ETH_RXBD0L) = RX_READY; //len = 0 | IRQ & WR = 1 | EMPTY = 1 - - //set txdata - eth_tx_packet[0] = BROADCAST_ADDRESS_5; - eth_tx_packet[1] = BROADCAST_ADDRESS_4; - eth_tx_packet[2] = BROADCAST_ADDRESS_3; - eth_tx_packet[3] = BROADCAST_ADDRESS_2; - eth_tx_packet[4] = BROADCAST_ADDRESS_1; - eth_tx_packet[5] = BROADCAST_ADDRESS_0; - - eth_tx_packet[6] = OWN_MAC_ADDRESS_5; - eth_tx_packet[7] = OWN_MAC_ADDRESS_4; - eth_tx_packet[8] = OWN_MAC_ADDRESS_3; - eth_tx_packet[9] = OWN_MAC_ADDRESS_2; - eth_tx_packet[10] = OWN_MAC_ADDRESS_1; - eth_tx_packet[11] = OWN_MAC_ADDRESS_0; - - //erase interrupts - REG32(ETH_BASE + ETH_INT_SOURCE) = ETH_RXC | ETH_TXC | ETH_BUSY | ETH_RXE | ETH_RXB | ETH_TXE | ETH_TXB; - - eth_tx_done = 1; - eth_rx_done = 0; - eth_rx_len = 0; - eth_tx_data = ð_tx_packet[HDR_LEN]; - eth_rx_data = ð_rx_packet[HDR_LEN]; -} - -int eth_send(int length) -{ - if (!eth_tx_done) //if previous command not fully processed, bail out - return -1; - - int i; - - eth_tx_done = 0; - eth_tx_packet[12] = length >> 8; - eth_tx_packet[13] = length; - - REG32(ETH_BASE + ETH_TXBD0L) = (( 0x0000FFFF & ( length + HDR_LEN ) ) << 16) | BD_SND; - - return length; -} - -void eth_interrupt() -{ - unsigned long source = REG32(ETH_BASE + ETH_INT_SOURCE); - if ( source & ETH_TXB ) - { - eth_tx_done = 1; - //erase interrupt - REG32(ETH_BASE + ETH_INT_SOURCE) |= ETH_TXB; - } - if ( source & ETH_RXB ) - { - eth_rx_done = 1; - eth_rx_len = (REG32(ETH_BASE + ETH_RXBD0L) >> 16) - HDR_LEN - CRC_LEN; - //erase interrupt - REG32(ETH_BASE + ETH_INT_SOURCE) |= ETH_RXB; - } -} - Index: trunk/sw/drivers/can.c =================================================================== --- trunk/sw/drivers/can.c (revision 36) +++ trunk/sw/drivers/can.c (nonexistent) @@ -1,150 +0,0 @@ -#include "../support/board.h" -#include "../support/support.h" -#include "can.h" - -int can_rx_done, can_tx_done; - -int can_rx_rd_ptr; -int can_rx_wr_ptr; -int can_rx_buf_overflow; - -can_type can_rx_data[CAN_BUF_LEN], can_tx_data; - -can_type * can_get(void) -{ - if ( !can_rx_done ) - return NULL; - - can_rx_done--; - - int tmp; - tmp = can_rx_rd_ptr; - - if (can_rx_rd_ptr < CAN_BUF_LEN-1) - can_rx_rd_ptr++; - else - can_rx_rd_ptr = 0; - - return &can_rx_data[tmp]; -} - -void can_init(void) -{ - unsigned char sync_jmp, baudrate_presc, timing_seg1, timing_seg2, tripple_samp = 0; - unsigned char acpt_code, acpt_mask = 0; - unsigned char clk_div = 0 & CAN_BUS_CLKDIV_MASK; - - sync_jmp = 1; - baudrate_presc = 1; - timing_seg1 = 11; - timing_seg2 = 2; - tripple_samp = 1; - - acpt_code = 0x81; - acpt_mask = 0xFF; - - char timing0, timing1 = 0; - - timing0 = (sync_jmp << CAN_BUS_TIMING_0_SYNC_JMP_SHIFT) & CAN_BUS_TIMING_0_SYNC_JMP; - timing0 |= baudrate_presc & CAN_BUS_TIMING_0_BAUD_PRESC; - - timing1 = (tripple_samp << CAN_BUS_TIMING_1_TRIPLE_SAMP_SHIFT) & CAN_BUS_TIMING_1_TRIPLE_SAMP; - timing1 |= (timing_seg2 << CAN_BUS_TIMING_1_TIME_SEG2_SHIFT) & CAN_BUS_TIMING_1_TIME_SEG2; - timing1 |= timing_seg1 & CAN_BUS_TIMING_1_TIME_SEG1; - - REG8(CAN_BASE+CAN_MODE) = CAN_MODE_RESET; - - REG8(CAN_BASE+CAN_BUS_TIMING_0) = timing0; - REG8(CAN_BASE+CAN_BUS_TIMING_1) = timing1; - - REG8(CAN_BASE+CAN_ACPT_CODE0) = acpt_code; - REG8(CAN_BASE+CAN_ACPT_MASK0) = acpt_mask; - - REG8(CAN_BASE+CAN_BUS_MODE) &= ~CAN_BUS_MODE_CLOCK_OFF & ~CAN_BUS_MODE_EXTENDED_MODE; - - REG8(CAN_BASE+CAN_MODE) &= ~CAN_MODE_RESET; - REG8(CAN_BASE+CAN_BUS_CLKDIV) = clk_div; - - REG8(CAN_BASE+CAN_MODE) |= CAN_MODE_TX_IRQ_EN | CAN_MODE_RECV_IRQ_EN; - - can_tx_done = 1; - can_rx_done = 0; - can_rx_rd_ptr = 0; - can_rx_wr_ptr = 0; - can_rx_buf_overflow = 0; -} - -void can_recv_basic() -{ - unsigned char byte0, byte1; - - byte0 = REG8(CAN_BASE+CAN_RX_BUF); - byte1 = REG8(CAN_BASE+CAN_RX_BUF+1); - - can_rx_data[can_rx_wr_ptr].data[0] = REG8(CAN_BASE+CAN_RX_BUF+2); - can_rx_data[can_rx_wr_ptr].data[1] = REG8(CAN_BASE+CAN_RX_BUF+3); - can_rx_data[can_rx_wr_ptr].data[2] = REG8(CAN_BASE+CAN_RX_BUF+4); - can_rx_data[can_rx_wr_ptr].data[3] = REG8(CAN_BASE+CAN_RX_BUF+5); - can_rx_data[can_rx_wr_ptr].data[4] = REG8(CAN_BASE+CAN_RX_BUF+6); - can_rx_data[can_rx_wr_ptr].data[5] = REG8(CAN_BASE+CAN_RX_BUF+7); - can_rx_data[can_rx_wr_ptr].data[6] = REG8(CAN_BASE+CAN_RX_BUF+8); - can_rx_data[can_rx_wr_ptr].data[7] = REG8(CAN_BASE+CAN_RX_BUF+9); - - REG8(CAN_BASE+CAN_CMD) = CAN_CMD_RELEASE_BUFFER; - - can_rx_data[can_rx_wr_ptr].identifier = (byte0 << 3) | (byte1 >> 5); - can_rx_data[can_rx_wr_ptr].rtr = byte1 & 0x10; - can_rx_data[can_rx_wr_ptr].len = byte1 & 0x0F; - - if (can_rx_wr_ptr < CAN_BUF_LEN-1) - can_rx_wr_ptr++; - else - can_rx_wr_ptr = 0; - - if (can_rx_wr_ptr == can_rx_rd_ptr+1) //buffer overflow - { - can_rx_done = 1; - can_rx_buf_overflow++; - } - else - can_rx_done++; -} - -int can_send_basic() -{ - if (!can_tx_done) //if previous command not fully processed, bail out - return -1; - - can_tx_done = 0; - REG8(CAN_BASE+CAN_TX_BUF) = can_tx_data.identifier >> 3; - REG8(CAN_BASE+CAN_TX_BUF+1) = (can_tx_data.identifier << 5) | ((can_tx_data.rtr << 4) & 0x10) | (can_tx_data.len & 0x0F); - - REG8(CAN_BASE+CAN_TX_BUF+2) = can_tx_data.data[0]; - REG8(CAN_BASE+CAN_TX_BUF+3) = can_tx_data.data[1]; - REG8(CAN_BASE+CAN_TX_BUF+4) = can_tx_data.data[2]; - REG8(CAN_BASE+CAN_TX_BUF+5) = can_tx_data.data[3]; - REG8(CAN_BASE+CAN_TX_BUF+6) = can_tx_data.data[4]; - REG8(CAN_BASE+CAN_TX_BUF+7) = can_tx_data.data[5]; - REG8(CAN_BASE+CAN_TX_BUF+8) = can_tx_data.data[6]; - REG8(CAN_BASE+CAN_TX_BUF+9) = can_tx_data.data[7]; - - REG8(CAN_BASE+CAN_CMD) = CAN_CMD_TX_REQ; - - return can_tx_data.len; -} - -void can_irq(void) -{ - unsigned char irq_req, rx_done; - irq_req = REG8(CAN_BASE+IRQ_READ); - rx_done = irq_req & CAN_IRQ_READ_RX; - can_tx_done = irq_req & CAN_IRQ_READ_TX; - if (rx_done) - can_recv_basic(); -} - -void can_abort(void) -{ - REG8(CAN_BASE+CAN_CMD) = CAN_CMD_ABORT_TX; -} - Index: trunk/sw/drivers/i2c.h =================================================================== --- trunk/sw/drivers/i2c.h (revision 36) +++ trunk/sw/drivers/i2c.h (nonexistent) @@ -1,62 +0,0 @@ - -struct i2c_type -{ - unsigned char address; - unsigned char pointer; - unsigned short data; -}; - -struct i2c_mode -{ - unsigned char read_write; - unsigned char byte_word; - unsigned char ptr_set; -}; - -typedef struct i2c_type i2c_type; -typedef struct i2c_mode i2c_mode; - -#define I2C_BUF_LEN 10 - -void i2c_init(void); -void i2c_irq(void); - -i2c_type * i2c_get(void); //return pointer to first non read received data - -void i2c_set_ack_lvl(int ack_lvl, int final_ack_lvl); -int i2c_trans(i2c_mode * mode, i2c_type * data); //return (-1) or length (still processing previous) or asserted - -#define I2C_PRESC_LO 0x00 -#define I2C_PRESC_HI 0x01 - -#define I2C_CTR 0x02 - -#define I2C_TXR 0x03 -#define I2C_RXR 0x03 - -#define I2C_CR 0x04 -#define I2C_SR 0x04 - - -//BITS -#define I2C_CTR_EN 0x80 -#define I2C_CTR_IRQ_EN 0x40 - -#define I2C_TXR_ADR 0xFE -#define I2C_TXR_W 0x00 -#define I2C_TXR_R 0x01 - -#define I2C_CR_STA 0x80 -#define I2C_CR_STO 0x40 -#define I2C_CR_RD 0x20 -#define I2C_CR_WR 0x10 -#define I2C_CR_ACK 0x00 -#define I2C_CR_NACK 0x08 -#define I2C_CR_CLR_IRQ 0x01 - -#define I2C_SR_R_ACK 0x80 -#define I2C_SR_BUSY 0x40 -#define I2C_SR_ARB_LOST 0x20 -#define I2C_SR_TX_BUSY 0x02 -#define I2C_SR_IRQ_FLAG 0x01 - Index: trunk/sw/drivers/eth.h =================================================================== --- trunk/sw/drivers/eth.h (revision 36) +++ trunk/sw/drivers/eth.h (nonexistent) @@ -1,111 +0,0 @@ - -void eth_init(); -void eth_interrupt(); -void eth_recv_ack(void); - -int eth_send(int length); //return (-1) or length (still processing previous) or asserted - -#define ETH_MODER 0x00 -#define ETH_INT_SOURCE 0x04 -#define ETH_INT_MASK 0x08 -#define ETH_IPGT 0x0C -#define ETH_IPGR1 0x10 -#define ETH_IPGR2 0x14 -#define ETH_PACKETLEN 0x18 -#define ETH_COLLCONF 0x1C -#define ETH_TX_BD_NUM 0x20 -#define ETH_CTRLMODER 0x24 -#define ETH_MIIMODER 0x28 -#define ETH_MIICOMMAND 0x2C -#define ETH_MIIADDRESS 0x30 -#define ETH_MIITX_DATA 0x34 -#define ETH_MIIRX_DATA 0x38 -#define ETH_MIISTATUS 0x3C -#define ETH_MAC_ADDR0 0x40 -#define ETH_MAC_ADDR1 0x44 -#define ETH_HASH0_ADR 0x48 -#define ETH_HASH1_ADR 0x4C -#define ETH_TXCTRL 0x50 - -#define ETH_TXBD0H 0x404 -#define ETH_TXBD0L 0x400 - -#define ETH_RXBD0H 0x604 //this depends on TX_BD_NUM but this is the standard value -#define ETH_RXBD0L 0x600 //this depends on TX_BD_NUM but this is the standard value - -//MODER BITS -#define ETH_RECSMALL 0x00010000 -#define ETH_PAD 0x00008000 -#define ETH_HUGEN 0x00004000 -#define ETH_CRCEN 0x00002000 -#define ETH_DLYCRCEN 0x00001000 -#define ETH_FULLD 0x00000400 -#define ETH_EXDFREN 0x00000200 -#define ETH_NOBCKOF 0x00000100 -#define ETH_LOOPBCK 0x00000080 -#define ETH_IFG 0x00000040 -#define ETH_PRO 0x00000020 -#define ETH_IAM 0x00000010 -#define ETH_BRO 0x00000008 -#define ETH_NOPRE 0x00000004 -#define ETH_TXEN 0x00000002 -#define ETH_RXEN 0x00000001 - -//INTERRUPTS BITS -#define ETH_RXC 0x00000040 -#define ETH_TXC 0x00000020 -#define ETH_BUSY 0x00000010 -#define ETH_RXE 0x00000008 -#define ETH_RXB 0x00000004 -#define ETH_TXE 0x00000002 -#define ETH_TXB 0x00000001 - -//BUFFER DESCRIPTOR BITS -#define ETH_RXBD_EMPTY 0x00008000 -#define ETH_RXBD_IRQ 0x00004000 -#define ETH_RXBD_WRAP 0x00002000 -#define ETH_RXBD_CF 0x00000100 -#define ETH_RXBD_MISS 0x00000080 -#define ETH_RXBD_OR 0x00000040 -#define ETH_RXBD_IS 0x00000020 -#define ETH_RXBD_DN 0x00000010 -#define ETH_RXBD_TL 0x00000008 -#define ETH_RXBD_SF 0x00000004 -#define ETH_RXBD_CRC 0x00000002 -#define ETH_RXBD_LC 0x00000001 - -#define ETH_TXBD_READY 0x00008000 -#define ETH_TXBD_IRQ 0x00004000 -#define ETH_TXBD_WRAP 0x00002000 -#define ETH_TXBD_PAD 0x00001000 -#define ETH_TXBD_CRC 0x00000800 -#define ETH_TXBD_UR 0x00000100 -#define ETH_TXBD_RL 0x00000008 -#define ETH_TXBD_LC 0x00000004 -#define ETH_TXBD_DF 0x00000002 -#define ETH_TXBD_CS 0x00000001 - -//user defines -#define OWN_MAC_ADDRESS_5 0x55 -#define OWN_MAC_ADDRESS_4 0x47 -#define OWN_MAC_ADDRESS_3 0x34 -#define OWN_MAC_ADDRESS_2 0x22 -#define OWN_MAC_ADDRESS_1 0x88 -#define OWN_MAC_ADDRESS_0 0x92 - -#define BROADCAST_ADDRESS_5 0xFF -#define BROADCAST_ADDRESS_4 0xFF -#define BROADCAST_ADDRESS_3 0xFF -#define BROADCAST_ADDRESS_2 0xFF -#define BROADCAST_ADDRESS_1 0xFF -#define BROADCAST_ADDRESS_0 0xFF - -#define HDR_LEN 14 -#define CRC_LEN 4 -#define BD_SND ( ETH_TXBD_READY | ETH_TXBD_IRQ | ETH_TXBD_WRAP | ETH_TXBD_PAD | ETH_TXBD_CRC ) -#define RX_READY ( ETH_RXBD_EMPTY | ETH_RXBD_IRQ | ETH_RXBD_WRAP ) -#define TX_READY ( ETH_TXBD_IRQ | ETH_TXBD_WRAP | ETH_TXBD_PAD | ETH_TXBD_CRC ) - -//~user defines - - Index: trunk/sw/drivers/can.h =================================================================== --- trunk/sw/drivers/can.h (revision 36) +++ trunk/sw/drivers/can.h (nonexistent) @@ -1,158 +0,0 @@ - -struct can_type -{ - unsigned char rtr; - unsigned char len; - unsigned short identifier; - unsigned char data[8]; -}; - -typedef struct can_type can_type; - -#define CAN_BUF_LEN 10 - -void can_init(void); -void can_irq(void); - -can_type * can_get(void); //return pointer to first non read received data - -int can_send_basic(); //return (-1) or length (still processing previous) or asserted -void can_abort(void); - -//BOTH MODES -#define CAN_MODE 0x00 -#define CAN_CMD 0x01 -#define CAN_STATUS 0x02 -#define IRQ_READ 0x03 - -#define CAN_ACPT_CODE0 0x04 //only writable while in reset mode -#define CAN_ACPT_MASK0 0x05 //only writable while in reset mode - -#define CAN_BUS_TIMING_0 0x06 //only writable while in reset mode -#define CAN_BUS_TIMING_1 0x07 //only writable while in reset mode - -#define CAN_BUS_CLKDIV 0x1F //only writable while NOT in reset mode - -#define CAN_TX_BUF 0x0A //only accessable while NOT in reset mode -#define CAN_TX_LEN 10 - -#define CAN_RX_BUF 0x14 //free read access for basic mode -#define CAN_RX_LEN 10 - -//only accessable while in reset mode -#define CAN_BUS_MODE 0x1F - - -//EXTENDED MODE ONLY -//only for extended mode & only accessable while in reset mode -#define CAN_IRQ_EN_EXT 0x04 //also writable if NOT in reset mode - -//read only regs -#define CAN_ARBIT_LOSS_CNT 0x0B //cnt of arbitration loss -#define CAN_ERROR_CAPTURE_CODE 0x0C -#define CAN_RX_MSG_CNT 0x1D -//~read only regs - -#define CAN_ERROR_WARN_LIMIT 0x0D - -#define CAN_RX_ERR_CNT 0x0E -#define CAN_TX_ERR_CNT 0x0F - -#define CAN_ACPT_CODE0_EXT 0x10 //also writable if NOT in reset mode -#define CAN_ACPT_CODE1 0x11 -#define CAN_ACPT_CODE2 0x12 -#define CAN_ACPT_CODE3 0x13 - -#define CAN_ACPT_MASK0_EXT 0x14 //also writable if NOT in reset mode -#define CAN_ACPT_MASK1 0x15 -#define CAN_ACPT_MASK2 0x16 -#define CAN_ACPT_MASK3 0x17 - -#define CAN_TX_BUF_EXT 0x10 //accessable if transmit_buffer_status=1 -#define CAN_TX_LEN_EXT 13 //ignores reset mode - -#define CAN_RX_BUF_EXT 0x10 //read access only in NOT reset mode -#define CAN_RX_LEN_EXT 13 - - -//BITS DEFINITIONS - -//BASIC MODE -#define CAN_MODE_RESET 0x01 -#define CAN_MODE_LISTEN_ONLY_BASIC 0x20 -#define CAN_MODE_RECV_IRQ_EN 0x02 -#define CAN_MODE_TX_IRQ_EN 0x04 -#define CAN_MODE_ERROR_IRQ_EN 0x08 -#define CAN_MODE_OVERRUN_IRQ_EN 0x10 -//EXTENDED MODE -#define CAN_MODE_LISTEN_ONLY_EXT 0x02 -#define CAN_MODE_SELF_TEST_MODE 0x04 -#define CAN_MODE_ACPT_FILTER_MODE 0x08 - -//CMD -#define CAN_CMD_CLR_DATA_OVERRUN 0x08 -#define CAN_CMD_RELEASE_BUFFER 0x04 -#define CAN_CMD_TX_REQ 0x11 -#define CAN_CMD_ABORT_TX 0x02 - -//STATUS -#define CAN_STATUS_NODE_BUS_OFF 0x80 -#define CAN_STATUS_ERROR 0x40 -#define CAN_STATUS_TX 0x20 -#define CAN_STATUS_RX 0x10 -#define CAN_STATUS_TX_COMPLETE 0x08 -#define CAN_STATUS_TX_BUF 0x04 -#define CAN_STATUS_OVERRUN 0x02 -#define CAN_STATUS_RX_BUF 0x01 - -//IRQ READ -#define CAN_IRQ_READ_BUS_ERROR 0x80 -#define CAN_IRQ_READ_ARBIT_LOST 0x40 -#define CAN_IRQ_READ_ERROR_PASSIV 0x20 -#define CAN_IRQ_READ_OVERRUN 0x08 -#define CAN_IRQ_READ_ERROR 0x04 -#define CAN_IRQ_READ_TX 0x02 -#define CAN_IRQ_READ_RX 0x01 - -//BUS_TIMING_0 -#define CAN_BUS_TIMING_0_SYNC_JMP_SHIFT 6 -#define CAN_BUS_TIMING_0_SYNC_JMP 0xC0 -#define CAN_BUS_TIMING_0_BAUD_PRESC 0x3F - -//BUS_TIMING_1 -#define CAN_BUS_TIMING_1_TRIPLE_SAMP_SHIFT 7 -#define CAN_BUS_TIMING_1_TRIPLE_SAMP 0x80 -#define CAN_BUS_TIMING_1_TIME_SEG2_SHIFT 4 -#define CAN_BUS_TIMING_1_TIME_SEG2 0x70 -#define CAN_BUS_TIMING_1_TIME_SEG1 0x0F - -//CLKDIV -//only writable while NOT in reset mode -#define CAN_BUS_CLKDIV_MASK 0x07 - - -//EXTENDED MODE ONLY -//CLKMODE -//only writable while in reset mode -#define CAN_BUS_MODE_CLOCK_OFF 0x08 -#define CAN_BUS_MODE_EXTENDED_MODE 0x80 - -//EXTENDED MODE IRQ -#define CAN_IRQ_EN_EXT_BUS_ERROR 0x80 -#define CAN_IRQ_EN_EXT_ARBIT_LOST 0x40 -#define CAN_IRQ_EN_EXT_ERROR_PASSIV 0x20 -#define CAN_IRQ_EN_EXT_OVERRUN 0x08 -#define CAN_IRQ_EN_EXT_ERROR 0x04 -#define CAN_IRQ_EN_EXT_TX 0x02 -#define CAN_IRQ_EN_EXT_RX 0x01 - -//EXTENDED ERROR CODES -#define CAN_ERROR_CAPTURE_CODE_TYPE_SHIFT 6 -#define CAN_ERROR_CAPTURE_CODE_TYPE 0xC0 -#define CAN_ERROR_CAPTURE_CODE_TYPE_BIT 0x0 -#define CAN_ERROR_CAPTURE_CODE_TYPE_FORM 0x1 -#define CAN_ERROR_CAPTURE_CODE_TYPE_STUFF 0x2 -#define CAN_ERROR_CAPTURE_CODE_TYPE_OTHER 0x3 -#define CAN_ERROR_CAPTURE_CODE_DIR 0x40 //1 = TX | 0 = RX -#define CAN_ERROR_CAPTURE_CODE_SEG 0x1F - Index: trunk/sw/drivers/tick.c =================================================================== --- trunk/sw/drivers/tick.c (revision 36) +++ trunk/sw/drivers/tick.c (nonexistent) @@ -1,31 +0,0 @@ -#include "../support/spr_defs.h" -#include "../support/support.h" -#include "tick.h" - -int tick_int; - -void tick_ack(void) -{ - tick_int--; -} - -void tick_init(void) -{ - mtspr(SPR_TTMR, 25000000 & SPR_TTMR_PERIOD); //1s -// mtspr(SPR_TTMR, 125000 & SPR_TTMR_PERIOD); //5ms - - mtspr(SPR_TTMR, mfspr(SPR_TTMR) | SPR_TTMR_RT | SPR_TTMR_IE); //restart after match, enable interrupt - mtspr(SPR_TTMR, mfspr(SPR_TTMR) & ~(SPR_TTMR_IP)); //clears interrupt - - //set OR1200 to accept exceptions - mtspr(SPR_SR, mfspr(SPR_SR) | SPR_SR_TEE); - - tick_int = 0; -} - -void tick_except(void) -{ - tick_int++; - mtspr(SPR_TTMR, mfspr(SPR_TTMR) & ~(SPR_TTMR_IP)); //clears interrupt -} - Index: trunk/sw/drivers/uart.c =================================================================== --- trunk/sw/drivers/uart.c (revision 36) +++ trunk/sw/drivers/uart.c (nonexistent) @@ -1,68 +0,0 @@ -#include "../support/board.h" -#include "../support/support.h" -#include "../support/uart.h" -#include "uart.h" - -void uart_interrupt() -{ - char lala; - unsigned char interrupt_id; - interrupt_id = REG8(UART_BASE + UART_IIR); - if ( interrupt_id & UART_IIR_RDI ) - { - lala = uart_getc(); - uart_putc(lala+1); - } - -} - -void uart_print_str(char *p) -{ - while(*p != 0) { - uart_putc(*p); - p++; - } -} - -void uart_print_long(unsigned long ul) -{ - int i; - char c; - - - uart_print_str("0x"); - for(i=0; i<8; i++) { - - c = (char) (ul>>((7-i)*4)) & 0xf; - if(c >= 0x0 && c<=0x9) - c += '0'; - else - c += 'a' - 10; - uart_putc(c); - } - -} - -void uart_print_short(unsigned long ul) -{ - int i; - char c; - char flag=0; - - - uart_print_str("0x"); - for(i=0; i<8; i++) { - - c = (char) (ul>>((7-i)*4)) & 0xf; - if(c >= 0x0 && c<=0x9) - c += '0'; - else - c += 'a' - 10; - if ((c != '0') || (i==7)) - flag=1; - if(flag) - uart_putc(c); - } - -} - Index: trunk/sw/drivers/Makefile =================================================================== --- trunk/sw/drivers/Makefile (revision 36) +++ trunk/sw/drivers/Makefile (nonexistent) @@ -1,25 +0,0 @@ -all: libdrivers.a - -libdrivers.a: eth.o uart.o interrupts.o can.o i2c.o tick.o - $(OR32_TOOL_PREFIX)-ar cru libdrivers.a eth.o uart.o interrupts.o can.o i2c.o tick.o - $(OR32_TOOL_PREFIX)-ranlib libdrivers.a - -eth.o: eth.c - $(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) $? -c -o $@ - -uart.o: uart.c - $(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) $? -c -o $@ - -interrupts.o: interrupts.c - $(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) $? -c -o $@ - -can.o: can.c - $(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) $? -c -o $@ - -i2c.o: i2c.c - $(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) $? -c -o $@ - -tick.o: tick.c - $(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) $? -c -o $@ - -include ../support/Makefile.inc Index: trunk/sw/drivers/i2c.c =================================================================== --- trunk/sw/drivers/i2c.c (revision 36) +++ trunk/sw/drivers/i2c.c (nonexistent) @@ -1,166 +0,0 @@ -#include "../support/board.h" -#include "../support/support.h" -#include "i2c.h" - -int i2c_rd_done, i2c_wr_done; - -int i2c_pending_write; - -int i2c_rd_ptr, i2c_wr_ptr; - -int i2c_buf_overflow; -i2c_type i2c_data[I2C_BUF_LEN]; - -unsigned char start, pointer_write, write_hbyte, write_lbyte, read_hbyte, read_lbyte; -unsigned char cmd_list[5]; -unsigned char dat_list[5]; -int i2c_index; -int i2c_end; - -i2c_type * i2c_get(void) -{ - if ( !i2c_rd_done ) - return NULL; - - i2c_rd_done--; - - int tmp; - tmp = i2c_rd_ptr; - - if (i2c_rd_ptr < I2C_BUF_LEN-1) - i2c_rd_ptr++; - else - i2c_rd_ptr = 0; - - return &i2c_data[tmp]; -} - -void i2c_init(void) -{ - REG8(I2C_BASE+I2C_PRESC_HI) = 0x00; - REG8(I2C_BASE+I2C_PRESC_LO) = 49; //100kHz - REG8(I2C_BASE+I2C_CTR) = I2C_CTR_EN | I2C_CTR_IRQ_EN; - i2c_rd_done = 0; - i2c_wr_done = 0; - i2c_index = 0; - i2c_wr_ptr = 0; - i2c_rd_ptr = 0; - i2c_buf_overflow = 0; -} - -void i2c_set_ack_lvl(int ack_lvl, int final_ack_lvl) -{ - int ack, final_ack; - - ack = ( ack_lvl ) ? I2C_CR_NACK : I2C_CR_ACK; - final_ack = ( final_ack_lvl ) ? I2C_CR_NACK : I2C_CR_ACK; - - start = I2C_CR_STA | I2C_CR_WR | ack; - pointer_write = I2C_CR_WR | ack; - write_hbyte = I2C_CR_WR | ack; - write_lbyte = I2C_CR_WR | I2C_CR_STO | final_ack; - read_hbyte = I2C_CR_RD | ack; - read_lbyte = I2C_CR_RD | I2C_CR_STO | final_ack; -} - -void i2c_byte_transfer(void) -{ - if ( i2c_index > 0 ) - if ( cmd_list[i2c_index-1] == read_hbyte ) - i2c_data[i2c_wr_ptr].data = (REG8(I2C_BASE+I2C_RXR) << 8) & 0xFF00; - - REG8(I2C_BASE+I2C_TXR) = dat_list[i2c_index]; - REG8(I2C_BASE+I2C_CR) = cmd_list[i2c_index]; - - i2c_index++; -} - -void i2c_irq(void) -{ - REG8(I2C_BASE+I2C_CR) = I2C_CR_CLR_IRQ; - if (i2c_index <= i2c_end ) - i2c_byte_transfer(); - else - { - if ( cmd_list[i2c_index-1] == read_lbyte ) - i2c_data[i2c_wr_ptr].data |= REG8(I2C_BASE+I2C_RXR); - - i2c_index = 0; - - if ( i2c_pending_write ) - i2c_wr_done = 1; - else - { - if (i2c_wr_ptr < I2C_BUF_LEN-1) - i2c_wr_ptr++; - else - i2c_wr_ptr = 0; - - if (i2c_wr_ptr == i2c_rd_ptr+1) - { - i2c_rd_done = 1; - i2c_buf_overflow++; - } - else - i2c_rd_done++; - } - } -} - -int i2c_trans(i2c_mode * mode, i2c_type * data) -{ - if ( i2c_index != 0 ) //if previous command not fully processed, bail out - return -1; - - i2c_wr_done = 0; - - int i = 0; - - if ( mode->ptr_set || mode->read_write ) //start conditions with pointer set: (write always set ptr) - { - dat_list[i] = (data->address << 1) & I2C_TXR_ADR; - dat_list[i] |= I2C_TXR_W; - cmd_list[i++] = start; - - dat_list[i] = data->pointer; - cmd_list[i++] = pointer_write; - - if ( !mode->read_write ) //REstart for read, NO-REstart for write - { - dat_list[i] = (data->address << 1) & I2C_TXR_ADR; - dat_list[i] |= I2C_TXR_R; - cmd_list[i++] = start; - } - } - else //start conditions with NO pointer set (read only): ONE start - { - dat_list[i] = (data->address << 1) & I2C_TXR_ADR; - dat_list[i] |= I2C_TXR_R; - cmd_list[i++] = start; - } - - if ( mode->byte_word ) //read/write high byte - { - dat_list[i] = data->data >> 8; - cmd_list[i++] = (mode->read_write) ? write_hbyte : read_hbyte; - } - - dat_list[i] = data->data; //read/write low byte - cmd_list[i] = (mode->read_write) ? write_lbyte : read_lbyte; - - i2c_end = i; - - if ( !mode->read_write ) //set data to 0 for read, avoid or implications ((short)data |= byte) - { - i2c_data[i2c_wr_ptr] = *data; - i2c_data[i2c_wr_ptr].data = 0x0000; - } - - i2c_pending_write = mode->read_write; - - i2c_index = 0; - i2c_byte_transfer(); - - return mode->read_write+1; -} - Index: trunk/sw/drivers/interrupts.c =================================================================== --- trunk/sw/drivers/interrupts.c (revision 36) +++ trunk/sw/drivers/interrupts.c (nonexistent) @@ -1,15 +0,0 @@ - -// Dummy or32 except vectors -void buserr_except(){} -void dpf_except(){} -void ipf_except(){} -void align_except(){} -void illegal_except(){} -void dtlbmiss_except(){} -void itlbmiss_except(){} -void range_except(){} -void syscall_except(){} -void res1_except(){} -void trap_except(){} -void res2_except(){} - Index: trunk/sw/drivers/tick.h =================================================================== --- trunk/sw/drivers/tick.h (revision 36) +++ trunk/sw/drivers/tick.h (nonexistent) @@ -1,4 +0,0 @@ - -void tick_init(void); - -void tick_ack(void); Index: trunk/sw/support/Makefile.inc =================================================================== --- trunk/sw/support/Makefile.inc (revision 36) +++ trunk/sw/support/Makefile.inc (revision 35) @@ -4,7 +4,7 @@ #GCC_LIB_OPTS= -lgcc -liberty -GCC_OPT=-mhard-mul -g -nostdlib +GCC_OPT=-mhard-mul -g ifdef UART_PRINTF GCC_OPT += -DUART_PRINTF
/trunk/sw/support/except.S
64,7 → 64,7
 
l.movhi r9,hi(end_except) //set return addr to end_except instruction
l.ori r9,r9,lo(end_except) //set return addr to end_except instruction
l.j _tick_except
l.j _lpint_except
l.nop
 
.org 0x400
106,7 → 106,7
 
l.movhi r9,hi(end_except) //set return addr to end_except instruction
l.ori r9,r9,lo(end_except) //set return addr to end_except instruction
l.j _ext_except //jmp to C interrupt handler (returns later to end_except)
l.j _hpint_except //jmp to C interrupt handler (returns later to end_except)
l.nop
 
 
/trunk/sw/support/uart.c
29,7 → 29,7
 
void uart_init(void)
{
int divisor;
int devisor;
/* Reset receiver and transmiter */
/* Set RX interrupt for each byte */
36,16 → 36,16
REG8(UART_BASE + UART_FCR) = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | UART_FCR_TRIGGER_1;
/* Enable RX interrupt */
REG8(UART_BASE + UART_IER) = UART_IER_RDI | UART_IER_THRI;
REG8(UART_BASE + UART_IER) = 0x01;
/* Set 8 bit char, 1 stop bit, no parity */
REG8(UART_BASE + UART_LCR) = UART_LCR_WLEN8 & ~(UART_LCR_STOP | UART_LCR_PARITY);
/* Set baud rate */
divisor = IN_CLK/(16 * UART_BAUD_RATE);
devisor = IN_CLK/(16 * UART_BAUD_RATE);
REG8(UART_BASE + UART_LCR) |= UART_LCR_DLAB;
REG8(UART_BASE + UART_DLL) = divisor & 0x000000ff;
REG8(UART_BASE + UART_DLM) = (divisor >> 8) & 0x000000ff;
REG8(UART_BASE + UART_DLL) = devisor & 0x000000ff;
REG8(UART_BASE + UART_DLM) = (devisor >> 8) & 0x000000ff;
REG8(UART_BASE + UART_LCR) &= ~(UART_LCR_DLAB);
return;
/trunk/sw/support/support.c
15,9 → 15,24
#endif
 
#if OR32
void excpt_dummy();
void int_main();
 
void ext_except()
unsigned long excpt_buserr = (unsigned long) excpt_dummy;
unsigned long excpt_dpfault = (unsigned long) excpt_dummy;
unsigned long excpt_ipfault = (unsigned long) excpt_dummy;
unsigned long excpt_tick = (unsigned long) excpt_dummy;
unsigned long excpt_align = (unsigned long) excpt_dummy;
unsigned long excpt_illinsn = (unsigned long) excpt_dummy;
unsigned long excpt_int = (unsigned long) int_main;
unsigned long excpt_dtlbmiss = (unsigned long) excpt_dummy;
unsigned long excpt_itlbmiss = (unsigned long) excpt_dummy;
unsigned long excpt_range = (unsigned long) excpt_dummy;
unsigned long excpt_syscall = (unsigned long) excpt_dummy;
unsigned long excpt_break = (unsigned long) excpt_dummy;
unsigned long excpt_trap = (unsigned long) excpt_dummy;
 
void hpint_except()
{
int_main();
}
44,7 → 59,7
#define PRINTFBUFFER_SIZE 512
char PRINTFBUFFER[PRINTFBUFFER_SIZE]; // Declare a global printf buffer
 
void minsoc_printf(const char *fmt, ...)
void printf(const char *fmt, ...)
{
// init uart if not done already
if (!uart_init_done)
67,11 → 82,12
uart_putc(PRINTFBUFFER[c++]);
va_end(args);
}
 
#else
/* activate printf support in simulator */
void minsoc_printf(const char *fmt, ...)
void printf(const char *fmt, ...)
{
va_list args;
va_start(args, fmt);
165,3 → 181,6
}
 
#endif
 
 
void excpt_dummy() {}
/trunk/sw/support/vfnprintf.c
96,7 → 96,7
 
// INCLUDES
 
//#include <stdlib.h> // For mbtowc()
#include <stdlib.h> // For mbtowc()
#include <stddef.h>
 
 
113,6 → 113,9
CYG_MACRO_END
 
#include <stdarg.h> // Variable argument definitions
//#include <stdio.h> // Standard header for all stdio files
#include <string.h> // memchr() and strlen() functions
//#include <cyg/libc/stdio/stream.hxx> // C library streams
 
#include "vfnprintf.h"
 
147,31 → 150,7
#define FPT 0x100 /* Floating point number */
#define SIZET 0x200 /* size_t */
 
int
strlen(const char *s)
{
const char *p;
 
for (p = s; *p != '\0'; p++)
;
return (s - p);
}
 
void *
memcpy(void *dst, const void *src, size_t len)
{
const char *csrc;
char *cdst;
int i;
 
cdst = dst;
csrc = src;
for (i = len; i >= 0; i--) {
cdst[i] = csrc[i];
}
return dst;
}
 
// Function which prints back to the buffer, ptr, len bytes
// returns 1 if it should finish up, otherwise 0 to continue
int print_back_to_string(char * ptr, int len, size_t * n, int * ret, char ** stream)
/trunk/sw/support/support.h
16,7 → 16,7
#define REG16(add) *((volatile unsigned short *)(add))
#define REG32(add) *((volatile unsigned long *)(add))
 
void or32_printf(const char *fmt, ...);
void printf(const char *fmt, ...);
 
/* For writing into SPR. */
void mtspr(unsigned long spr, unsigned long value);
30,8 → 30,6
 
#endif /* OR1K */
 
#define printf or32_printf
 
/* Function to be called at entry point - not defined here. */
int main ();
 
65,5 → 63,4
extern unsigned long excpt_break;
extern unsigned long excpt_trap;
 
 
#endif /* SUPPORT_H */
#endif
/trunk/sw/support/board.h
21,11 → 21,6
#define UART_IRQ 2
#define ETH_BASE 0x92000000
#define ETH_IRQ 4
#define I2C_BASE 0x9D000000
#define I2C_IRQ 3
#define CAN_BASE 0x94000000
#define CAN_IRQ 5
 
#define MC_BASE_ADDR 0x60000000
#define SPI_BASE 0xa0000000
 
/trunk/sw/support/Makefile
1,3 → 1,5
include Makefile.inc
 
all: libsupport.a reset-nocache.o reset-ic.o reset-dc.o reset-icdc.o
 
libsupport.a: support.o int.o except.o uart.o vfnprintf.o
33,5 → 35,3
 
int.o: int.c
$(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) -c -o $@ $?
 
include Makefile.inc
/trunk/sw/eth/eth.c
1,32 → 1,202
#include "../support/support.h"
#include "../support/board.h"
#include "../support/uart.h"
 
#include "../support/spr_defs.h"
 
#include "../drivers/uart.h"
#include "../drivers/eth.h"
#include "eth.h"
 
void uart_print_str(char *);
void uart_print_long(unsigned long);
 
extern int eth_rx_len;
extern int eth_rx_done, eth_tx_done;
extern unsigned char * eth_rx_data;
extern unsigned char * eth_tx_data;
// Dummy or32 except vectors
void buserr_except(){}
void dpf_except(){}
void ipf_except(){}
void lpint_except(){}
void align_except(){}
void illegal_except(){}
/*void hpint_except(){
 
}*/
void dtlbmiss_except(){}
void itlbmiss_except(){}
void range_except(){}
void syscall_except(){}
void res1_except(){}
void trap_except(){}
void res2_except(){}
 
 
void uart_interrupt()
{
char lala;
unsigned char interrupt_id;
interrupt_id = REG8(UART_BASE + UART_IIR);
if ( interrupt_id & UART_IIR_RDI )
{
lala = uart_getc();
uart_putc(lala+1);
}
 
}
 
 
void uart_print_str(char *p)
{
while(*p != 0) {
uart_putc(*p);
p++;
}
}
 
void uart_print_long(unsigned long ul)
{
int i;
char c;
 
uart_print_str("0x");
for(i=0; i<8; i++) {
 
c = (char) (ul>>((7-i)*4)) & 0xf;
if(c >= 0x0 && c<=0x9)
c += '0';
else
c += 'a' - 10;
uart_putc(c);
}
 
}
 
void uart_print_short(unsigned long ul)
{
int i;
char c;
char flag=0;
 
uart_print_str("0x");
for(i=0; i<8; i++) {
 
c = (char) (ul>>((7-i)*4)) & 0xf;
if(c >= 0x0 && c<=0x9)
c += '0';
else
c += 'a' - 10;
if ((c != '0') || (i==7))
flag=1;
if(flag)
uart_putc(c);
}
 
}
 
int tx_done;
int rx_done;
int rx_len;
char tx_data[1536]; //max length
char rx_data[1536];
 
void eth_init()
{
//TXEN & RXEN = 1; PAD & CRC = 1; FULLD = 1
REG32(ETH_BASE + ETH_MODER) = ETH_TXEN | ETH_RXEN | ETH_PAD | ETH_CRCEN | ETH_FULLD;
//PHY Address = 0x001
REG32(ETH_BASE + ETH_MIIADDRESS) = 0x00000001;
 
//enable all interrupts
REG32(ETH_BASE + ETH_INT_MASK) = ETH_RXC | ETH_TXC | ETH_BUSY | ETH_RXE | ETH_RXB | ETH_TXE | ETH_TXB;
 
//set MAC ADDRESS
REG32(ETH_BASE + ETH_MAC_ADDR1) = OWN_MAC_ADDRESS >> 32; //low word = mac address high word
REG32(ETH_BASE + ETH_MAC_ADDR0) = OWN_MAC_ADDRESS; //mac address rest
 
//configure TXBD0
REG32(ETH_BASE + ETH_TXBD0H) = tx_data; //address used for tx_data
REG32(ETH_BASE + ETH_TXBD0L) = TX_READY; //length = 0 | PAD & CRC = 1 | IRQ & WR = 1
 
//configure RXBD0
REG32(ETH_BASE + ETH_RXBD0H) = rx_data; //address used for tx_data
REG32(ETH_BASE + ETH_RXBD0L) = RX_READY; //len = 0 | IRQ & WR = 1 | EMPTY = 1
 
//set txdata
tx_data[0] = BROADCAST_ADDRESS >> 40;
tx_data[1] = BROADCAST_ADDRESS >> 32;
tx_data[2] = BROADCAST_ADDRESS >> 24;
tx_data[3] = BROADCAST_ADDRESS >> 16;
tx_data[4] = BROADCAST_ADDRESS >> 8;
tx_data[5] = BROADCAST_ADDRESS;
 
tx_data[6] = OWN_MAC_ADDRESS >> 40;
tx_data[7] = OWN_MAC_ADDRESS >> 32;
tx_data[8] = OWN_MAC_ADDRESS >> 24;
tx_data[9] = OWN_MAC_ADDRESS >> 16;
tx_data[10] = OWN_MAC_ADDRESS >> 8;
tx_data[11] = OWN_MAC_ADDRESS;
 
//erase interrupts
REG32(ETH_BASE + ETH_INT_SOURCE) = ETH_RXC | ETH_TXC | ETH_BUSY | ETH_RXE | ETH_RXB | ETH_TXE | ETH_TXB;
 
tx_done = 1;
rx_done = 0;
rx_len = 0;
}
 
void eth_send(int length)
{
if (!tx_done)
return;
 
tx_done = 0;
tx_data[12] = length >> 8;
tx_data[13] = length;
 
REG32(ETH_BASE + ETH_TXBD0L) = (( 0x0000FFFF & ( length + HDR_LEN ) ) << 16) | BD_SND;
}
 
void eth_receive()
{
int i;
uart_print_str("Length: \n");
uart_print_long(eth_rx_len);
uart_print_long(rx_len - HDR_LEN - CRC_LEN);
uart_print_str("\n");
uart_print_str("Data: \n");
for ( i = 0; i < eth_rx_len; i++ )
for ( i = 0; i < rx_len - HDR_LEN - CRC_LEN; i++ )
{
uart_print_short(eth_rx_data[i]);
uart_print_str("\n");
uart_print_short(rx_data[i+HDR_LEN]);
// uart_print_str("\n");
}
eth_recv_ack();
 
rx_done = 0;
rx_len = 0;
}
 
void eth_interrupt()
{
unsigned long source = REG32(ETH_BASE + ETH_INT_SOURCE);
switch (source)
{
case ETH_TXB:
tx_done = 1;
//erase interrupt
REG32(ETH_BASE + ETH_INT_SOURCE) |= ETH_TXB;
break;
 
case ETH_RXB:
rx_done = 1;
//erase interrupt
REG32(ETH_BASE + ETH_INT_SOURCE) |= ETH_RXB;
//accept further data (reset RXBD to empty)
rx_len = (REG32(ETH_BASE + ETH_RXBD0L) >> 16);
REG32(ETH_BASE + ETH_RXBD0L) = RX_READY; //len = 0 | IRQ & WR = 1 | EMPTY = 1
break;
 
default:
break;
}
}
 
int main()
{
unsigned long lalala;
33,7 → 203,6
uart_init();
 
int_init();
eth_init();
int_add(UART_IRQ, &uart_interrupt);
int_add(ETH_IRQ, &eth_interrupt);
41,16 → 210,18
we don't link C library. */
uart_print_str("Hello World.\n\r");
 
eth_tx_data[0] = 0xFF;
eth_tx_data[1] = 0x2B;
eth_tx_data[2] = 0x40;
eth_tx_data[3] = 0x50;
eth_init();
 
tx_data[14] = 0xFF;
tx_data[15] = 0x2B;
tx_data[16] = 0x40;
tx_data[17] = 0x50;
 
eth_send(4);
 
while(1)
{
if (eth_rx_done)
if (rx_done)
{
eth_receive();
}
/trunk/sw/eth/eth.h
80,8 → 80,8
#define ETH_TXBD_CS 0x00000001
 
//user defines
#define OWN_MAC_ADDRESS 0x554734228892ULL
#define BROADCAST_ADDRESS 0xFFFFFFFFFFFFULL
#define OWN_MAC_ADDRESS 0x554734228892
#define BROADCAST_ADDRESS 0xFFFFFFFFFFFF
 
#define HDR_LEN 14
#define CRC_LEN 4
/trunk/sw/eth/Makefile
1,10 → 1,10
include ../support/Makefile.inc
cases = eth-nocache eth-icdc
common = ../support/libsupport.a ../support/except.o
drivers = ../drivers/libdrivers.a
 
all: $(cases)
 
eth-nocache: eth.o ../support/reset-nocache.o $(common) $(drivers)
eth-nocache: eth.o ../support/reset-nocache.o $(common)
$(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) $(GCC_LIB_OPTS) -T ../support/orp.ld $? -o $@.or32
$(OR32_TOOL_PREFIX)-objcopy -O binary $@.or32 $@.bin
../utils/bin2hex $@.bin 1 -size_word > $@$(FLASH_MEM_HEX_FILE_SUFFIX).hex
11,8 → 11,8
../utils/bin2vmem $@.bin > $@.vmem
 
 
eth-icdc: eth.o ../support/reset-icdc.o $(common) $(drivers)
$(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) $(GCC_LIB_OPTS) -T ../support/orp.ld $? -o $@.or32
eth-icdc: eth.o ../support/reset-icdc.o
$(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) $(GCC_LIB_OPTS) -T ../support/orp.ld $? -o $@.or32 $(common)
$(OR32_TOOL_PREFIX)-objcopy -O binary $@.or32 $@.bin
../utils/bin2hex $@.bin 1 -size_word > $@$(FLASH_MEM_HEX_FILE_SUFFIX).hex
../utils/bin2vmem $@.bin > $@.vmem
21,4 → 21,3
eth.o: eth.c
$(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) $? -c -o $@
 
include ../support/Makefile.inc
/trunk/sw/uart/uart.c
1,10 → 1,96
#include "../support/support.h"
#include "../support/board.h"
#include "../support/uart.h"
 
#include "../support/spr_defs.h"
 
#include "../drivers/uart.h"
void uart_print_str(char *);
void uart_print_long(unsigned long);
 
// Dummy or32 except vectors
void buserr_except(){}
void dpf_except(){}
void ipf_except(){}
void lpint_except(){}
void align_except(){}
void illegal_except(){}
/*void hpint_except(){
 
}*/
void dtlbmiss_except(){}
void itlbmiss_except(){}
void range_except(){}
void syscall_except(){}
void res1_except(){}
void trap_except(){}
void res2_except(){}
 
 
void uart_interrupt()
{
char lala;
unsigned char interrupt_id;
interrupt_id = REG8(UART_BASE + UART_IIR);
if ( interrupt_id & UART_IIR_RDI )
{
lala = uart_getc();
uart_putc(lala+1);
}
}
 
 
void uart_print_str(char *p)
{
while(*p != 0) {
uart_putc(*p);
p++;
}
}
 
void uart_print_long(unsigned long ul)
{
int i;
char c;
 
uart_print_str("0x");
for(i=0; i<8; i++) {
 
c = (char) (ul>>((7-i)*4)) & 0xf;
if(c >= 0x0 && c<=0x9)
c += '0';
else
c += 'a' - 10;
uart_putc(c);
}
 
}
 
void uart_print_short(unsigned long ul)
{
int i;
char c;
char flag=0;
 
uart_print_str("0x");
for(i=0; i<8; i++) {
 
c = (char) (ul>>((7-i)*4)) & 0xf;
if(c >= 0x0 && c<=0x9)
c += '0';
else
c += 'a' - 10;
if ((c != '0') || (i==7))
flag=1;
if(flag)
uart_putc(c);
}
 
}
 
 
 
int main()
{
uart_init();
/trunk/sw/uart/Makefile
1,10 → 1,10
include ../support/Makefile.inc
cases = uart-nocache uart-icdc
common = ../support/libsupport.a ../support/except.o
drivers = ../drivers/libdrivers.a
 
all: $(cases)
 
uart-nocache: uart.o ../support/reset-nocache.o $(common) $(drivers)
uart-nocache: uart.o ../support/reset-nocache.o $(common)
$(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) $(GCC_LIB_OPTS) -T ../support/orp.ld $? -o $@.or32
$(OR32_TOOL_PREFIX)-objcopy -O binary $@.or32 $@.bin
../utils/bin2hex $@.bin 1 -size_word > $@$(FLASH_MEM_HEX_FILE_SUFFIX).hex
11,8 → 11,8
../utils/bin2vmem $@.bin > $@.vmem
 
 
uart-icdc: uart.o ../support/reset-icdc.o $(common) $(drivers)
$(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) $(GCC_LIB_OPTS) -T ../support/orp.ld $? -o $@.or32
uart-icdc: uart.o ../support/reset-icdc.o
$(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) $(GCC_LIB_OPTS) -T ../support/orp.ld $? -o $@.or32 $(common)
$(OR32_TOOL_PREFIX)-objcopy -O binary $@.or32 $@.bin
../utils/bin2hex $@.bin 1 -size_word > $@$(FLASH_MEM_HEX_FILE_SUFFIX).hex
../utils/bin2vmem $@.bin > $@.vmem
21,4 → 21,3
uart.o: uart.c
$(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) $? -c -o $@
 
include ../support/Makefile.inc

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