URL
https://opencores.org/ocsvn/minsoc/minsoc/trunk
Subversion Repositories minsoc
Compare Revisions
- This comparison shows the changes necessary to convert path
/minsoc/tags/release-1.0/sim/modelsim
- from Rev 134 to Rev 151
- ↔ Reverse comparison
Rev 134 → Rev 151
/run_sim.bat
0,0 → 1,13
@echo off |
set /p target_firmware=Input the target firmware hex file along with its path. Ex: "..\..\sw\uart\uart.hex": |
|
for /f "tokens=*" %%i in ('find /c /v "NOTTHISSTRING" %target_firmware%') do set line_output=%%i |
for /f "tokens=1,2 delims=:" %%a in ("%line_output%") do set firmware_size=%%b |
set firmware_size=%firmware_size: =% |
|
if EXIST %target_firmware% ( |
vsim -lib minsoc minsoc_bench -pli ../../bench/verilog/vpi/jp-io-vpi.dll +file_name=%target_firmware% +firmware_size=%firmware_size% |
) else ( |
echo %target_firmware% could not be found. |
set /p exit=Press ENTER to close this window... |
) |
run_sim.bat
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: run_sim.sh
===================================================================
--- run_sim.sh (nonexistent)
+++ run_sim.sh (revision 151)
@@ -0,0 +1,13 @@
+#!/bin/bash
+
+set -o errexit
+set -o nounset
+set -o pipefail
+set -o posix # Make command substitution subshells inherit the errexit option.
+ # Otherwise, the 'command' in this example will not fail for non-zero exit codes: echo "$(command)"
+
+# A word count should always deliver the number of bytes in the hex file,
+# regardless of the number of hex bytes per line.
+FIRMWARE_SIZE_IN_BYTES="$(wc -w <"$1")"
+
+vsim -lib minsoc minsoc_bench -pli ../../bench/verilog/vpi/jp-io-vpi.so +file_name=$1 +firmware_size="$FIRMWARE_SIZE_IN_BYTES"
run_sim.sh
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: compile_design.bat
===================================================================
--- compile_design.bat (nonexistent)
+++ compile_design.bat (revision 151)
@@ -0,0 +1,5 @@
+@echo off
+vlog -incr -work minsoc -f ../../prj/sim/minsoc_verilog.src
+::vcom -work minsoc -f ../../prj/sim/minsoc_vhdl.src
+echo Finished...
+set /p exit=Press ENTER to close this window...
compile_design.bat
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: prepare_modelsim.bat
===================================================================
--- prepare_modelsim.bat (nonexistent)
+++ prepare_modelsim.bat (revision 151)
@@ -0,0 +1,5 @@
+@echo off
+vlib minsoc
+vmap minsoc ./minsoc
+echo Finished...
+set /p exit=Press ENTER to close this window...
prepare_modelsim.bat
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: compile_design.sh
===================================================================
--- compile_design.sh (nonexistent)
+++ compile_design.sh (revision 151)
@@ -0,0 +1,4 @@
+#!/bin/bash
+
+vlog -incr -work minsoc -f ../../prj/sim/minsoc_verilog.src
+#vcom -work minsoc -f ../../prj/sim/minsoc_vhdl.src
compile_design.sh
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: prepare_modelsim.sh
===================================================================
--- prepare_modelsim.sh (nonexistent)
+++ prepare_modelsim.sh (revision 151)
@@ -0,0 +1,4 @@
+#!/bin/bash
+
+vlib minsoc
+vmap minsoc ./minsoc
prepare_modelsim.sh
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property