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/XUPV5-LX110T_SoC/HOWTO
3,7 → 3,7
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This document is a step-by-step procedure for building the MIPS32 hardware |
and software and running it on the XUPV5-LX110T FPGA development board. With |
minimal changes, other hardware platforms may be used as well (see XXX) |
minimal changes, other hardware platforms may be used as well (see FAQ). |
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Procedure |
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