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URL https://opencores.org/ocsvn/mips32r1/mips32r1/trunk

Subversion Repositories mips32r1

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /mips32r1/trunk/Hardware
    from Rev 6 to Rev 7
    ↔ Reverse comparison
  •

Rev 6 → Rev 7

/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/MIPS32/Processor.v
8,6 → 8,7
* Rev Date Initials Description of Change
* 1.0 23-Jul-2011 GEA Initial design.
* 2.0 26-May-2012 GEA Release version with CP0.
* 2.01 1-Nov-2012 GEA Fixed issue with Jal.
*
* Standards/Formatting:
* Verilog 2001, 4 soft tab, wide column.
384,7 → 385,7
.in0 (ID_ReadData1_RF),
.in1 (M_ALUResult),
.in2 (WB_WriteData),
.in3 (ID_PCAdd4),
.in3 (32'hxxxxxxxx),
.out (ID_ReadData1_End)
);
 
499,7 → 500,7
.in0 (EX_ReadData1_PR),
.in1 (M_ALUResult),
.in2 (WB_WriteData),
.in3 (32'hxxxxxxxx),
.in3 (EX_RestartPC),
.out (EX_ReadData1_Fwd)
);
 
509,7 → 510,7
.in0 (EX_ReadData2_PR),
.in1 (M_ALUResult),
.in2 (WB_WriteData),
.in3 (32'h00000004),
.in3 (32'h00000008),
.out (EX_ReadData2_Fwd)
);
 
/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/MIPS32/Hazard_Detection.v
8,6 → 8,7
* Rev Date Initials Description of Change
* 1.0 23-Jul-2011 GEA Initial design.
* 2.0 26-May-2012 GEA Release version with CP0.
* 2.01 1-Nov-2012 GEA Fixed issue with Jal.
*
* Standards/Formatting:
* Verilog 2001, 4 soft tab, wide column.
164,9 → 165,9
assign IF_Stall = InstMem_Read | InstMem_Ready | IF_Exception_Stall;
// Forwarding Control Final Assignments
assign ID_RsFwdSel = (ID_Link) ? 2'b11 : ((ID_Fwd_1) ? 2'b01 : ((ID_Fwd_3) ? 2'b10 : 2'b00));
assign ID_RtFwdSel = (Mfc0) ? 2'b11 : ((ID_Fwd_2) ? 2'b01 : ((ID_Fwd_4) ? 2'b10 : 2'b00));
assign EX_RsFwdSel = (EX_Fwd_1) ? 2'b01 : ((EX_Fwd_3) ? 2'b10 : 2'b00);
assign ID_RsFwdSel = (ID_Fwd_1) ? 2'b01 : ((ID_Fwd_3) ? 2'b10 : 2'b00);
assign ID_RtFwdSel = (Mfc0) ? 2'b11 : ((ID_Fwd_2) ? 2'b01 : ((ID_Fwd_4) ? 2'b10 : 2'b00));
assign EX_RsFwdSel = (EX_Link) ? 2'b11 : ((EX_Fwd_1) ? 2'b01 : ((EX_Fwd_3) ? 2'b10 : 2'b00));
assign EX_RtFwdSel = (EX_Link) ? 2'b11 : ((EX_Fwd_2) ? 2'b01 : ((EX_Fwd_4) ? 2'b10 : 2'b00));
assign M_WriteDataFwdSel = MEM_Fwd_1;
/MIPS32_Standalone/Processor.v
8,6 → 8,7
* Rev Date Initials Description of Change
* 1.0 23-Jul-2011 GEA Initial design.
* 2.0 26-May-2012 GEA Release version with CP0.
* 2.01 1-Nov-2012 GEA Fixed issue with Jal.
*
* Standards/Formatting:
* Verilog 2001, 4 soft tab, wide column.
384,7 → 385,7
.in0 (ID_ReadData1_RF),
.in1 (M_ALUResult),
.in2 (WB_WriteData),
.in3 (ID_PCAdd4),
.in3 (32'hxxxxxxxx),
.out (ID_ReadData1_End)
);
 
499,7 → 500,7
.in0 (EX_ReadData1_PR),
.in1 (M_ALUResult),
.in2 (WB_WriteData),
.in3 (32'hxxxxxxxx),
.in3 (EX_RestartPC),
.out (EX_ReadData1_Fwd)
);
 
509,7 → 510,7
.in0 (EX_ReadData2_PR),
.in1 (M_ALUResult),
.in2 (WB_WriteData),
.in3 (32'h00000004),
.in3 (32'h00000008),
.out (EX_ReadData2_Fwd)
);
 
/MIPS32_Standalone/Hazard_Detection.v
8,6 → 8,7
* Rev Date Initials Description of Change
* 1.0 23-Jul-2011 GEA Initial design.
* 2.0 26-May-2012 GEA Release version with CP0.
* 2.01 1-Nov-2012 GEA Fixed issue with Jal.
*
* Standards/Formatting:
* Verilog 2001, 4 soft tab, wide column.
164,9 → 165,9
assign IF_Stall = InstMem_Read | InstMem_Ready | IF_Exception_Stall;
// Forwarding Control Final Assignments
assign ID_RsFwdSel = (ID_Link) ? 2'b11 : ((ID_Fwd_1) ? 2'b01 : ((ID_Fwd_3) ? 2'b10 : 2'b00));
assign ID_RtFwdSel = (Mfc0) ? 2'b11 : ((ID_Fwd_2) ? 2'b01 : ((ID_Fwd_4) ? 2'b10 : 2'b00));
assign EX_RsFwdSel = (EX_Fwd_1) ? 2'b01 : ((EX_Fwd_3) ? 2'b10 : 2'b00);
assign ID_RsFwdSel = (ID_Fwd_1) ? 2'b01 : ((ID_Fwd_3) ? 2'b10 : 2'b00);
assign ID_RtFwdSel = (Mfc0) ? 2'b11 : ((ID_Fwd_2) ? 2'b01 : ((ID_Fwd_4) ? 2'b10 : 2'b00));
assign EX_RsFwdSel = (EX_Link) ? 2'b11 : ((EX_Fwd_1) ? 2'b01 : ((EX_Fwd_3) ? 2'b10 : 2'b00));
assign EX_RtFwdSel = (EX_Link) ? 2'b11 : ((EX_Fwd_2) ? 2'b01 : ((EX_Fwd_4) ? 2'b10 : 2'b00));
assign M_WriteDataFwdSel = MEM_Fwd_1;

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