URL
https://opencores.org/ocsvn/mips789/mips789/trunk
Subversion Repositories mips789
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/mips789
- from Rev 53 to Rev 54
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Rev 53 → Rev 54
/trunk/rtl/verilog/ulit.v
214,7 → 214,7
module r5_reg_cls(input[`R5_LEN-1:0] r5_i,output reg[`R5_LEN-1:0] r5_o,input clk,input cls);always@(posedge clk)if(cls) r5_o<=r5_o;else r5_o<=r5_i;endmodule |
module r32_reg_cls(input[`R32_LEN-1:0] r32_i,output reg[`R32_LEN-1:0] r32_o,input clk,input cls);always@(posedge clk)if(cls) r32_o<=r32_o;else r32_o<=r32_i;endmodule |
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/// |
*/ |
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