OpenCores

/fpga_papilio_xc3/top.vhd File deleted

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/fpga_papilio_xc3/fpga_papilio_xc3s250e.bit

fpga_papilio_xc3/fpga_papilio_xc3s250e.bit Property changes : Deleted: svn:mime-type ## -1 +0,0 ## -application/octet-stream \ No newline at end of property Index: fpga_papilio_xc3/Memory Map.txt =================================================================== --- fpga_papilio_xc3/Memory Map.txt (revision 4) +++ fpga_papilio_xc3/Memory Map.txt (nonexistent) @@ -1,13 +0,0 @@ - -Memory Map ----------- - -The XC3S250E has around 24KB of BlockRAM which has been instantiated as 'BootRAM'. -This memory is pre-initialised with a bootloader image which can be used to load new code via the serial port using X-Modem file transfer protocol. - -Map: -0x0000 - 0x2000 = Bootloader -0x2000 - 0x6000 = Application space - - -The bootloader section 0x0000 - 0x2000 (8KBytes) can be re-used for BSS & Data sections for the application (thus overwriting the bootloader post boot). Index: fpga_papilio_xc3/components.vhd =================================================================== --- fpga_papilio_xc3/components.vhd (revision 4) +++ fpga_papilio_xc3/components.vhd (nonexistent) @@ -1,133 +0,0 @@ -------------------------------------------------------------------- --- MPX 32-bit Soft-Core Processor --- V0.1 --- Ultra-Embedded.com --- Copyright 2011 - 2012 --- --- Email: admin@ultra-embedded.com --- --- License: LGPL --- --- If you would like a version with a different license for use --- in commercial projects please contact the above email address --- for more details. -------------------------------------------------------------------- --- --- Copyright (C) 2011 - 2012 Ultra-Embedded.com --- --- This source file may be used and distributed without --- restriction provided that this copyright statement is not --- removed from the file and that any derivative work contains --- the original copyright notice and the associated disclaimer. --- --- This source file is free software; you can redistribute it --- and/or modify it under the terms of the GNU Lesser General --- Public License as published by the Free Software Foundation; --- either version 2.1 of the License, or (at your option) any --- later version. --- --- This source is distributed in the hope that it will be --- useful, but WITHOUT ANY WARRANTY; without even the implied --- warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR --- PURPOSE. See the GNU Lesser General Public License for more --- details. --- --- You should have received a copy of the GNU Lesser General --- Public License along with this source; if not, write to the --- Free Software Foundation, Inc., 59 Temple Place, Suite 330, --- Boston, MA 02111-1307 USA -------------------------------------------------------------------- -library IEEE; -use IEEE.STD_LOGIC_1164.all; -use IEEE.STD_LOGIC_ARITH.ALL; -use IEEE.STD_LOGIC_UNSIGNED.ALL; - -package peripherals is - -------------------------------------------------------------------- --- Components: -------------------------------------------------------------------- -component mpx_soc -generic -( - CLK_KHZ : integer := 12288; - UART_BAUD : integer := 115200; - EXTERNAL_INTERRUPTS : integer := 1; - CORE_ID : std_logic_vector := X"00000000"; - BOOT_VECTOR : std_logic_vector := X"00000000"; - ISR_VECTOR : std_logic_vector := X"0000003C" -); -port -( - -- General - clocking & rst_i - clk_i : in std_logic; - rst_i : in std_logic; - en_i : in std_logic; - ext_intr_i : in std_logic_vector(EXTERNAL_INTERRUPTS-1 downto 0); - fault_o : out std_logic; - - -- UART - uart_tx_o : out std_logic; - uart_rx_i : in std_logic; - - -- BootRAM - int_mem_addr_o : out std_logic_vector(32-1 downto 0); - int_mem_data_o : out std_logic_vector(32-1 downto 0); - int_mem_data_i : in std_logic_vector(32-1 downto 0); - int_mem_wr_o : out std_logic_vector(3 downto 0); - int_mem_rd_o : out std_logic; - - -- External IO - ext_io_addr_o : out std_logic_vector(32-1 downto 0); - ext_io_data_o : out std_logic_vector(32-1 downto 0); - ext_io_data_i : in std_logic_vector(32-1 downto 0); - ext_io_wr_o : out std_logic_vector(3 downto 0); - ext_io_rd_o : out std_logic; - ext_io_pause_i : in std_logic; - - -- Debug Register Access - dbg_reg_addr_i : in std_logic_vector(8 downto 0); - dbg_reg_out_o : out std_logic_vector(31 downto 0); - dbg_pc_o : out std_logic_vector(31 downto 0); - - -- Debug UART Output - dbg_uart_data_o : out std_logic_vector(7 downto 0); - dbg_uart_wr_o : out std_logic -); -end component; - -component ClockDCM is -generic -( - CLK_IN_MHZ : integer := 32; - CLK_OUT_MHZ : integer := 64 -); -port -( - CLKIN_IN : in std_logic; - CLKFX_OUT : out std_logic; - CLKIN_IBUFG_OUT : out std_logic -); -end component; - -component ram -generic -( - memory_type : string := "DEFAULT"; - --Number of 8KB blocks of internal RAM, up to 64KB (1 to 8) - block_count : integer := 1 -); -port(clk : in std_logic; - enable : in std_logic; - write_byte_enable : in std_logic_vector(3 downto 0); - address : in std_logic_vector(31 downto 2); - data_write : in std_logic_vector(31 downto 0); - data_read : out std_logic_vector(31 downto 0)); -end component; - - -end peripherals; - -package body peripherals is - -end; --package body Index: fpga_papilio_xc3/program.vhd =================================================================== --- fpga_papilio_xc3/program.vhd (revision 4) +++ fpga_papilio_xc3/program.vhd (nonexistent) @@ -1,2628 +0,0 @@ -------------------------------------------------------------------- --- MPX 32-bit Soft-Core Processor IP --- V0.1 --- Ultra-Embedded.com --- --- This file was derived from the Plasma project by Steve Rhoads. --- It has been modified to support dual port block RAM and contains --- the FPGA-Audio Bootloader image. --- --- Original copyright notice: --- --- TITLE: Random Access Memory for Xilinx --- AUTHOR: Steve Rhoads (rhoadss@yahoo.com) --- DATE CREATED: 11/06/05 --- PROJECT: Plasma CPU core --- COPYRIGHT: Software placed into the public domain by the author. --- Software 'as is' without warranty. Author liable for nothing. --- UPDATED: 09/07/10 Olivier Rinaudo (orinaudo@gmail.com) --- new behaviour: 8KB expandable to 64KB of internal RAM --- -------------------------------------------------------------------- -library ieee; -use ieee.std_logic_1164.all; -use ieee.std_logic_unsigned.all; - -library UNISIM; -use UNISIM.vcomponents.all; - -entity ram is - generic(memory_type : string := "DEFAULT"; - --Number of 8KB blocks of internal RAM, up to 64KB (1 to 8) - block_count : integer := 1); - port(clk : in std_logic; - enable : in std_logic; - write_byte_enable : in std_logic_vector(3 downto 0); - address : in std_logic_vector(31 downto 2); - data_write : in std_logic_vector(31 downto 0); - data_read : out std_logic_vector(31 downto 0)); -end; --entity ram - -architecture logic of ram is - --type - type mem32_vector IS ARRAY (NATURAL RANGE<>) OF std_logic_vector(31 downto 0); - - --Which 8KB block - alias block_sel: std_logic_vector(2 downto 0) is address(15 downto 13); - - --Address within a 8KB block (without lower two bits) - alias block_addr : std_logic_vector(10 downto 0) is address(12 downto 2); - - --Block enable with 1 bit per memory block - signal block_enable: std_logic_vector(7 downto 0); - - --Block Data Out - signal block_do: mem32_vector(7 downto 0); - - --Remember which block was selected - signal block_sel_buf: std_logic_vector(2 downto 0); - - constant ZERO : std_logic_vector(31 downto 0) := "00000000000000000000000000000000"; - -begin - block_enable<= "00000001" when (enable='1') and (block_sel="000") else - "00000010" when (enable='1') and (block_sel="001") else - "00000100" when (enable='1') and (block_sel="010") else - "00001000" when (enable='1') and (block_sel="011") else - "00010000" when (enable='1') and (block_sel="100") else - "00100000" when (enable='1') and (block_sel="101") else - "01000000" when (enable='1') and (block_sel="110") else - "10000000" when (enable='1') and (block_sel="111") else - "00000000"; - - proc_blocksel: process (clk, block_sel) is - begin - if rising_edge(clk) then - block_sel_buf <= block_sel; - end if; - end process; - - proc_do: process (block_do, block_sel_buf) is - begin - data_read <= block_do(conv_integer(block_sel_buf)); - end process; - - -- BLOCKS generation - block0: if (block_count > 0) generate - begin - - ram_byte3 : RAMB16_S9 - generic map ( -INIT_00 => X"00008c0000243c000300142c000c40000008000c241400ac273c243c243c273c", -INIT_01 => X"082424243c3c3c24082424243c3c3c24082424243c3c3c24082424243c3c3c00", -INIT_02 => X"3c2703008f240c240c3c40af27000824082424243c3c3c24082424243c3c3c24", -INIT_03 => X"24a0009000002424013c8c3c00148d2d3c01a0142400900000243c001800108d", -INIT_04 => X"0cafafaf3c2424af3c3cae3caf27ad08001424108d2d3c01110003ad01ad0014", -INIT_05 => X"2c00008e00040000008e8e3c3cafafafaf2700080000008eae04ae020c263c3c", -INIT_06 => X"10008e3c0010afafafafafafafafaf8e3caf27ac033cac3c27038f8f8f8f0014", -INIT_07 => X"8f00142c00008f8e00040000008eaf008e00008f3c24243cafafaf0000242424", -INIT_08 => X"3c040000008eaf008eafafa22610248f0010001000088e0018008faf00002400", -INIT_09 => X"008f8e0004af00008e8eaf08241400008f8faf0c000024008f00142c00008f8e", -INIT_0A => X"91a01025af003c0024248f8f00082400008e240c001400040000008e00102c00", -INIT_0B => X"8f8f8f8f8f8f028f0002002400008e000c0008af0caf000024248f0011300091", -INIT_0C => X"0000301024000824002490240025313c010091912512af0824a22427038f8f8f", -INIT_0D => X"24003c000800153000919126af08241530242410008f00140014301424380004", -INIT_0E => X"00008e2400008e2400008e240c0008af0caf000024008f241000913014002490", -INIT_0F => X"1430008c3caf12240000af270003240826088eafafaf243024248f2402000824", -INIT_10 => X"008000afaf2730038c3c240300038c001030008c3c3c08240c27038f00ac8f3c", -INIT_11 => X"082700a304afafafafafafaf27908c8c8c8c243c27038f8f00140082260c2610", -INIT_12 => X"080027038f8f8f001002260c82a014022424a02424102414a000900027300002", -INIT_13 => X"00140000008c3c8c3c000327038f8f27088f8f0212000c8faf0c0010afaf2724", -INIT_14 => X"21225422004c22215f220041226e706521432243500000000000000000000003", -INIT_15 => X"00000000000000000000000000000000000000000000000000433834300a740a", -INIT_16 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_17 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_18 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_19 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_1A => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_1B => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_1C => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_1D => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_1E => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_1F => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_20 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_21 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_22 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_23 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_24 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_25 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_26 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_27 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_28 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_29 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_2A => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_2B => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_2C => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_2D => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_2E => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_2F => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_30 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_31 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_32 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_33 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_34 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_35 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_36 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_37 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_38 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_39 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_3A => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_3B => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_3C => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_3D => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_3E => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_3F => X"0000000000000000000000000000000000000000000000000000000000000000" -) - port map ( - DO => block_do(0)(31 downto 24), - DOP => open, - ADDR => block_addr, - CLK => clk, - DI => data_write(31 downto 24), - DIP => ZERO(0 downto 0), - EN => block_enable(0), - SSR => ZERO(0), - WE => write_byte_enable(3)); - - ram_byte2 : RAMB16_S9 - generic map ( -INIT_00 => X"4000824404420200e00040820000040000000000a560a4a0bd1d8404a5059c1c", -INIT_01 => X"00c6a5840605040700c6a5840605040700c6a5840605040700c6a58406050400", -INIT_02 => X"08bde000bf040084000480bfbd00000700c6a5840605040700c6a58406050407", -INIT_03 => X"4243006344e246e76207420200404b220a25664542e26682e9e70700a000a009", -INIT_04 => X"00bfb2b31184a5b104050410b0bd0900006003404b220a252000e04565004446", -INIT_05 => X"42510002004100400042111012b1bfb0b2bd0000004000024040602000311213", -INIT_06 => X"600023118040b0b1b3b4b5b7bebfb64212b2bd45e0024402bde0b0b1b2bf0040", -INIT_07 => X"a50040424400a402004100400022a300030040a415171e10a6a5a30000060503", -INIT_08 => X"034100400022a30003a0a6a286a303a50057005e00004200a000a5a20202a200", -INIT_09 => X"00a4030041a640002206a6000640c300a3a6a2000202a200a50040424400a402", -INIT_0A => X"22826029a6a6096663c6a5a60000044000421300005700400040002200606364", -INIT_0B => X"b3b4b5b6b7be60bf00c0000440004200000000a500a202026205a30002420228", -INIT_0C => X"0502c26063a200e70503e58700294a04420a222a2680a40014a204bde0b0b1b2", -INIT_0D => X"8200040000000242022822a9a300030242c205c800a6004a00e9426063c202a1", -INIT_0E => X"400042044000420440004213000000a500a202026200a3054300226346654245", -INIT_0F => X"4042006203bf02021004b0bd00e01300730042a5a3a20542c203a684c0000004", -INIT_10 => X"008480bfb0bd42e0420202e000e04200606300430203000400bde0b00050bf02", -INIT_11 => X"00b100a280a3a5a6a7b0b1bfbd42436745466203bde0b0bf0080000410001080", -INIT_12 => X"0004bde0b0b1bf0040111000046040117043430370a04380430463c3a6836020", -INIT_13 => X"0060646200a305420200e0bde0b0bfbd00b0bf0000a000a5a500c080bfb0bd05", -INIT_14 => X"2244214d005446224945004b422e7478224153004100000000000000000000e0", -INIT_15 => X"0000000000000000000000000000000000000000000000000044393531005242", -INIT_16 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_17 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_18 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_19 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_1A => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_1B => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_1C => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_1D => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_1E => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_1F => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_20 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_21 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_22 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_23 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_24 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_25 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_26 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_27 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_28 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_29 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_2A => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_2B => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_2C => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_2D => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_2E => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_2F => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_30 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_31 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_32 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_33 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_34 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_35 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_36 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_37 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_38 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_39 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_3A => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_3B => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_3C => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_3D => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_3E => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_3F => X"0000000000000000000000000000000000000000000000000000000000000000" -) - port map ( - DO => block_do(0)(23 downto 16), - DOP => open, - ADDR => block_addr, - CLK => clk, - DI => data_write(23 downto 16), - DIP => ZERO(0 downto 0), - EN => block_enable(0), - SSR => ZERO(0), - WE => write_byte_enable(2)); - - ram_byte1 : RAMB16_S9 - generic map ( -INIT_00 => X"00000020200a000000000000000068000000000000ff18000d000d000a008a00", -INIT_01 => X"000a0a0a00000000000a0a0a00000000000a0a0a00000000000a0a0a00000000", -INIT_02 => X"000000000020000a02006000ff000000000a0a0a00000000000a0a0a00000000", -INIT_03 => X"000000001820000a10000a0018000a00004800ff00180018380a00100000000a", -INIT_04 => X"000000000007080000000a0000ff0a0000ff00ff0a000048ff10000a280a18ff", -INIT_05 => X"0310000000ff00f8000b00200000000000ff000000f8000a0aff0a2000010000", -INIT_06 => X"01000b00b0010000000000000000000b0000ff0b00000b0000000000000000ff", -INIT_07 => X"0000ff0310000000000000f8000b00000000f80000000020000000a098000000", -INIT_08 => X"000000f8000b00000000000b000000000000000000000b00000000001616ff00", -INIT_09 => X"000000000000f8000b00000100001000000000001616ff000000ff0310000000", -INIT_0A => X"0000ff0b001800200b000000000100f8000bff0000ff00ff00f8000b00ff0318", -INIT_0B => X"000000000000100028f82000f8000b000000010000001616ff00000000001000", -INIT_0C => X"2c2cff00ff1001002a00000b1000ff005052000000000001000b000000000000", -INIT_0D => X"0b1800000100ff001000000b0001000000ff0000000000ff00ffffffff1030ff", -INIT_0E => X"f8000b00f8000b00f8000bff0000010000001616ff000000ff000000ff180000", -INIT_0F => X"ff00000020000000868600ff0000ff0100000b00000000000000000bf8000100", -INIT_10 => X"0000800000ff00000020ff000000000000000000202001000100000010000020", -INIT_11 => X"020028000000000000000000ff00000a00000a000000000000ff00ff00010000", -INIT_12 => X"0220000000000000ff10ff0100000010ff000000ff0000ff0021001800001010", -INIT_13 => X"00ff18180000200020000000000000000200002000200200000280000000ff00", -INIT_14 => X"00492255002141004e58002152636963004c59004e0101010100000000000000", -INIT_15 => X"0000000000000000000000000000000000000000000000000045413632004f6f", -INIT_16 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_17 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_18 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_19 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_1A => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_1B => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_1C => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_1D => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_1E => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_1F => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_20 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_21 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_22 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_23 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_24 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_25 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_26 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_27 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_28 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_29 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_2A => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_2B => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_2C => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_2D => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_2E => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_2F => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_30 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_31 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_32 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_33 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_34 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_35 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_36 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_37 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_38 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_39 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_3A => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_3B => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_3C => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_3D => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_3E => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_3F => X"0000000000000000000000000000000000000000000000000000000000000000" -) - port map ( - DO => block_do(0)(15 downto 8), - DOP => open, - ADDR => block_addr, - CLK => clk, - DI => data_write(15 downto 8), - DIP => ZERO(0 downto 0), - EN => block_enable(0), - SSR => ZERO(0), - WE => write_byte_enable(1)); - - ram_byte0 : RAMB16_S9 - generic map ( -INIT_00 => X"08000021800800000800030900140000000e005304fd2a00b000c000a0009001", -INIT_01 => X"5140642c000000335140582c0000003051404c2c0000002d5140342c00000000", -INIT_02 => X"00180800140092801a000014e800513e5140782c0000003a5140702c00000036", -INIT_03 => X"01000000212380ac2100a000211ba480002100fb0121002121ac00210a0025a8", -INIT_04 => X"c8241c2000d02c180000a00014d8a88300e501e7a4800021fd2108a421a821fb", -INIT_05 => X"e823001000fa00090030100000141c1018e000ac000900a0a8fca421cd7c0000", -INIT_06 => X"100030002115282c34383c44484c402c0030b03008002c0020081014181c00f5", -INIT_07 => X"1800f4e823001010001500090030100010000914001804002014182121014310", -INIT_08 => X"003500090030100010141c34827243140027006200ec2c00cb0018180300ff00", -INIT_09 => X"001010000e1009003010140515812a00141c18ae0300ff001800f4e823001010", -INIT_0A => X"0200b934142a002134011c1400780609002cffae00c500f40009003000cde823", -INIT_0B => X"34383c404448214c2109210609002c00ae000514ae180300ff15180026ff2701", -INIT_0C => X"0300ff09ff269e01000800372183ff002100848383321c160134835008282c30", -INIT_0D => X"372100008a00abff2701023414050622ffff8036002000bc00eefff9ff2140fa", -INIT_0E => X"09002c1809002c1809002cffae000514ae180300ff001815e20083fffc210100", -INIT_0F => X"fc08000400140d0a030010e80008ff7880ec2c14182006ff0110203709007818", -INIT_10 => X"0000211410e801080400ff0800080800040100040000fc0df418081021081400", -INIT_11 => X"42242120221c1814104c5054a8100c8c08048c001808101400fb00ff01f40107", -INIT_12 => X"3e2358084c505400fb2bfff40000072bff02012dff0501f800020021100f2121", -INIT_13 => X"00fb2a23001000100000082008181c201a181c2105212c10101a21041c18e001", -INIT_14 => X"0056004c002255005454002245006f65004c53004924240404e4c4a4845c0008", -INIT_15 => X"0000000000000000000000000000000000000000000000000046423733004d6f", -INIT_16 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_17 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_18 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_19 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_1A => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_1B => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_1C => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_1D => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_1E => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_1F => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_20 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_21 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_22 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_23 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_24 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_25 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_26 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_27 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_28 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_29 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_2A => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_2B => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_2C => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_2D => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_2E => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_2F => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_30 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_31 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_32 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_33 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_34 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_35 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_36 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_37 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_38 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_39 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_3A => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_3B => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_3C => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_3D => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_3E => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_3F => X"0000000000000000000000000000000000000000000000000000000000000000" -) - port map ( - DO => block_do(0)(7 downto 0), - DOP => open, - ADDR => block_addr, - CLK => clk, - DI => data_write(7 downto 0), - DIP => ZERO(0 downto 0), - EN => block_enable(0), - SSR => ZERO(0), - WE => write_byte_enable(0)); - end generate; --block0 - - - block1: if (block_count > 1) generate - begin - - ram_byte3 : RAMB16_S9 - generic map ( -INIT_00 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_01 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_02 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_03 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_04 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_05 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_06 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_07 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_08 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_09 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_0A => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_0B => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_0C => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_0D => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_0E => 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X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_2B => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_2C => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_2D => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_2E => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_2F => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_30 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_31 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_32 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_33 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_34 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_35 => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_36 => 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X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_3C => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_3D => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_3E => X"0000000000000000000000000000000000000000000000000000000000000000", -INIT_3F => X"0000000000000000000000000000000000000000000000000000000000000000" -) - port map ( - DO => block_do(7)(7 downto 0), - DOP => open, - ADDR => block_addr, - CLK => clk, - DI => data_write(7 downto 0), - DIP => ZERO(0 downto 0), - EN => block_enable(7), - SSR => ZERO(0), - WE => write_byte_enable(0)); - - end generate; --block7 - -end; --architecture logic Index: fpga_papilio_xc3/fpga.ucf =================================================================== --- fpga_papilio_xc3/fpga.ucf (revision 4) +++ fpga_papilio_xc3/fpga.ucf (nonexistent) @@ -1,78 +0,0 @@ -################################################################################## -## BPC3003_2.03+.ucf -## -## Author: Jack Gassett -## -## Details: http://gadgetforge.gadgetfactory.net/gf/project/butterfly_one/ -## -## Contains assignment and iostandard information for -## all used pins as well as timing and area constraints for Papilio One 2.03 and higher boards. Papilio One boards started using 32Mhz oscillators at version 2.02 and above. -## -################################################################################## - -# Crystal Clock - use 32MHz onboard oscillator -NET "clk" LOC = "P89" | IOSTANDARD = LVCMOS25 | PERIOD = 31.25ns ; - -# Wing1 Column A -NET "W1A<0>" LOC = "P18" ; -NET "W1A<1>" LOC = "P23" ; -NET "W1A<2>" LOC = "P26" ; -NET "W1A<3>" LOC = "P33" ; -NET "W1A<4>" LOC = "P35" ; -NET "W1A<5>" LOC = "P40" ; -NET "W1A<6>" LOC = "P53" ; -NET "W1A<7>" LOC = "P57" ; -NET "W1A<8>" LOC = "P60" ; -NET "W1A<9>" LOC = "P62" ; -NET "W1A<10>" LOC = "P65" ; -NET "W1A<11>" LOC = "P67" ; -NET "W1A<12>" LOC = "P70" ; -NET "W1A<13>" LOC = "P79" ; -NET "W1A<14>" LOC = "P84" ; -NET "W1A<15>" LOC = "P86" ; - -# Wing1 Column B -NET "W1B<0>" LOC = "P85" ; -NET "W1B<1>" LOC = "P83" ; -NET "W1B<2>" LOC = "P78" ; -NET "W1B<3>" LOC = "P71" ; -NET "W1B<4>" LOC = "P68" ; -NET "W1B<5>" LOC = "P66" ; -NET "W1B<6>" LOC = "P63" ; -NET "W1B<7>" LOC = "P61" ; -NET "W1B<8>" LOC = "P58" ; -NET "W1B<9>" LOC = "P54" ; -NET "W1B<10>" LOC = "P41" ; -NET "W1B<11>" LOC = "P36" ; -NET "W1B<12>" LOC = "P34" ; -NET "W1B<13>" LOC = "P32" ; -NET "W1B<14>" LOC = "P25" ; -NET "W1B<15>" LOC = "P22" ; - -# Wing2 Column C -NET "W2C<0>" LOC = "P91" ; -NET "W2C<1>" LOC = "P92" ; -NET "W2C<2>" LOC = "P94" ; -NET "W2C<3>" LOC = "P95" ; -NET "W2C<4>" LOC = "P98" ; -NET "W2C<5>" LOC = "P2" ; -NET "W2C<6>" LOC = "P3" ; -NET "W2C<7>" LOC = "P4" ; -NET "W2C<8>" LOC = "P5" ; -NET "W2C<9>" LOC = "P9" ; -NET "W2C<10>" LOC = "P10" ; -NET "W2C<11>" LOC = "P11" ; -NET "W2C<12>" LOC = "P12" ; -NET "W2C<13>" LOC = "P15" ; -NET "W2C<14>" LOC = "P16" ; -NET "W2C<15>" LOC = "P17" ; - -## RS232 -NET "rx" LOC = "P88" | IOSTANDARD = LVCMOS25 ; -NET "tx" LOC = "P90" | IOSTANDARD = LVCMOS25 | DRIVE = 4 | SLEW = SLOW ; - -# SPI Flash -NET "flash_cs" LOC = "P24" ; -NET "flash_si" LOC = "P27" ; -NET "flash_so" LOC = "P44" ; -NET "flash_sck" LOC = "P50" ; Index: fpga_papilio_xc3/ClockDCM.vhd =================================================================== --- fpga_papilio_xc3/ClockDCM.vhd (revision 4) +++ fpga_papilio_xc3/ClockDCM.vhd (nonexistent) @@ -1,96 +0,0 @@ --------------------------------------------------------------------------------- --- Copyright (c) 1995-2011 Xilinx, Inc. All rights reserved. --------------------------------------------------------------------------------- --- ____ ____ --- / /\/ / --- /___/ \ / Vendor: Xilinx --- \ \ \/ Version : 13.1 --- \ \ Application : xaw2vhdl --- / / Filename : ClockDCM.vhd --- /___/ /\ Timestamp : 09/17/2011 00:07:38 --- \ \ / \ --- \___\/\___\ --- ---Command: xaw2vhdl-st D:\vhdl\mwips\fpga\ipcore_dir\.\ClockDCM.xaw D:\vhdl\mwips\fpga\ipcore_dir\.\ClockDCM ---Design Name: ClockDCM ---Device: xc3s250e-4vq100 --- --- Module ClockDCM --- Generated by Xilinx Architecture Wizard --- Written for synthesis tool: XST --- Period Jitter (unit interval) for block DCM_SP_INST = 0.07 UI --- Period Jitter (Peak-to-Peak) for block DCM_SP_INST = 1.36 ns - -library ieee; -use ieee.std_logic_1164.ALL; -use ieee.numeric_std.ALL; -library UNISIM; -use UNISIM.Vcomponents.ALL; - -entity ClockDCM is -generic -( - CLK_IN_MHZ : integer := 32; - CLK_OUT_MHZ : integer := 64 -); -port -( - CLKIN_IN : in std_logic; - CLKFX_OUT : out std_logic; - CLKIN_IBUFG_OUT : out std_logic -); -end ClockDCM; - -architecture BEHAVIORAL of ClockDCM is - signal CLKFX_BUF : std_logic; - signal CLKIN_IBUFG : std_logic; - signal GND_BIT : std_logic; -begin - GND_BIT <= '0'; - CLKIN_IBUFG_OUT <= CLKIN_IBUFG; - CLKFX_BUFG_INST : BUFG - port map (I=>CLKFX_BUF, - O=>CLKFX_OUT); - - CLKIN_IBUFG_INST : IBUFG - port map (I=>CLKIN_IN, - O=>CLKIN_IBUFG); - - DCM_SP_INST : DCM_SP - generic map( CLK_FEEDBACK => "NONE", - CLKDV_DIVIDE => 2.0, - CLKFX_DIVIDE => (CLK_IN_MHZ / 2), - CLKFX_MULTIPLY => (CLK_OUT_MHZ / 2), - CLKIN_DIVIDE_BY_2 => FALSE, - CLKIN_PERIOD => 31.250, - CLKOUT_PHASE_SHIFT => "NONE", - DESKEW_ADJUST => "SYSTEM_SYNCHRONOUS", - DFS_FREQUENCY_MODE => "LOW", - DLL_FREQUENCY_MODE => "LOW", - DUTY_CYCLE_CORRECTION => TRUE, - FACTORY_JF => x"C080", - PHASE_SHIFT => 0, - STARTUP_WAIT => FALSE) - port map (CLKFB=>GND_BIT, - CLKIN=>CLKIN_IBUFG, - DSSEN=>GND_BIT, - PSCLK=>GND_BIT, - PSEN=>GND_BIT, - PSINCDEC=>GND_BIT, - RST=>GND_BIT, - CLKDV=>open, - CLKFX=>CLKFX_BUF, - CLKFX180=>open, - CLK0=>open, - CLK2X=>open, - CLK2X180=>open, - CLK90=>open, - CLK180=>open, - CLK270=>open, - LOCKED=>open, - PSDONE=>open, - STATUS=>open); - -end BEHAVIORAL; - - Index: fpga_papilio_xc3 =================================================================== --- fpga_papilio_xc3 (revision 4) +++ fpga_papilio_xc3 (nonexistent)

fpga_papilio_xc3 Property changes : Deleted: bugtraq:number ## -1 +0,0 ## -true \ No newline at end of property Index: soc/mpx_soc_defs.v =================================================================== --- soc/mpx_soc_defs.v (revision 4) +++ soc/mpx_soc_defs.v (revision 3) @@ -41,9 +41,9 @@ //----------------------------------------------------------------- // Memory Map //----------------------------------------------------------------- -`define MEM_REGION_INTERNAL 3'b000 +`define MEM_REGION_INTERNAL 3'b001 `define MEM_REGION_CORE_IO 3'b010 -`define MEM_REGION_EXT_IO 3'b011 +`define MEM_REGION_EXT_IO 3'b011 //----------------------------------------------------------------- // I/O

/sim/mpx_top.v

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/sim/mpx_top.cpp

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/sim/test_image.bin Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream

/sim/Readme.txt

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