URL
https://opencores.org/ocsvn/nand_controller/nand_controller/trunk
Subversion Repositories nand_controller
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- This comparison shows the changes necessary to convert path
/nand_controller
- from Rev 11 to Rev 12
- ↔ Reverse comparison
Rev 11 → Rev 12
/trunk/Doc/NAND Controller.docx
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trunk/Doc/NAND Controller.docx
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Index: trunk/Doc/NAND Controller.pdf
===================================================================
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Index: trunk/Doc/NAND Controller.pdf
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--- trunk/Doc/NAND Controller.pdf (nonexistent)
+++ trunk/Doc/NAND Controller.pdf (revision 12)
trunk/Doc/NAND Controller.pdf
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Index: trunk/VHDL/onfi_package.vhd
===================================================================
--- trunk/VHDL/onfi_package.vhd (revision 11)
+++ trunk/VHDL/onfi_package.vhd (revision 12)
@@ -38,7 +38,7 @@
constant t_rst : integer := integer(5000.0 / clock_cycle);
constant t_bers : integer := integer(700000.0 / clock_cycle);
constant t_whr : integer := integer(80.0 / clock_cycle);
- constant t_prog : integer := integer(600000000.0 / clock_cycle);
+ constant t_prog : integer := integer(600000.0 / clock_cycle);
constant t_adl : integer := integer(70.0 / clock_cycle);
type latch_t is (LATCH_CMD, LATCH_ADDR);
/trunk/VHDL/nand_master.vhd
26,6 → 26,7
( |
-- System clock |
clk : in std_logic; |
enable : in std_logic; |
-- NAND chip control hardware interface. These signals should be bound to physical pins. |
nand_cle : out std_logic := '0'; |
nand_ale : out std_logic := '0'; |
280,7 → 281,7
-- elsif(activate = '1')then |
-- state <= state_switch(to_integer(unsigned(cmd_in))); |
|
elsif(rising_edge(clk))then |
elsif(rising_edge(clk) and enable = '0')then |
case state is |
-- RESET state. Speaks for itself |
when M_RESET => |
312,6 → 313,7
cle_data_in <= x"00ff"; |
state <= M_WAIT; |
n_state <= M_IDLE; |
delay <= t_wb + 8; |
|
-- Read the status register of the controller |
when MI_GET_STATUS => |
769,7 → 771,9
|
-- Wait for latch and IO modules to become ready as well as for NAND's R/B# to be '1' |
when M_WAIT => |
if('0' = (cle_busy or ale_busy or io_rd_busy or io_wr_busy or (not nand_rnb)))then |
if(delay > 1)then |
delay <= delay - 1; |
elsif('0' = (cle_busy or ale_busy or io_rd_busy or io_wr_busy or (not nand_rnb)))then |
state <= n_state; |
end if; |
|