URL
https://opencores.org/ocsvn/neo430/neo430/trunk
Subversion Repositories neo430
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 173 to Rev 174
- ↔ Reverse comparison
Rev 173 → Rev 174
/neo430/trunk/neo430/README.md
62,7 → 62,7
- `GNU Make` |
- Completely described in behavioral, platform-independent VHDL |
- Fully synchronous design, no latches, no gated clocks |
- Very small outline and high operating frequency |
- Very low resource requirements and high operating frequency |
- Internal DMEN (RAM, for data) and IMEM (RAM or ROM, for code), configurable sizes |
- One external interrupt line |
- Customizable processor hardware configuration: |
165,7 → 165,7
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* Follow the instructions from the "Let's Get It Started" section of the NEO430 documentary: |
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![NEO430 Datasheet](http://raw.githubusercontent.com/stnolting/neo430/master/doc/figures/PDF_32.png)[NEO430 Datasheet](https://raw.githubusercontent.com/stnolting/neo430/master/doc/NEO430.pdf "NEO430 Datasheet from GitHub") |
![NEO430 Datasheet](https://raw.githubusercontent.com/stnolting/neo430/master/doc/figures/PDF_32.png)[NEO430 Datasheet](https://raw.githubusercontent.com/stnolting/neo430/master/doc/NEO430.pdf "NEO430 Datasheet from GitHub") |
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* The NEO430 documentary will guide you to create a simple test setup, which serves as "hello world" FPGA demo: |
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181,7 → 181,7
## Contact |
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If you have any questions, bug reports, ideas or if you are facing problems with the NEO430, feel free to drop me a line. |
I'm always happy to hear what cool projects you are realizing with this core :smiley: |
Also, I'm always happy to hear what cool projects you are realizing with this core :smiley: |
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stnolting@gmail.com |
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/neo430/trunk/neo430/doc/NEO430.pdf
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
/neo430/trunk/neo430/rtl/core/neo430_top.vhd
663,6 → 663,28
end generate; |
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-- Reserved ----------------------------------------------------------------- |
-- ----------------------------------------------------------------------------- |
--neo430_???_inst_true: |
--if (???_USE = true) generate |
-- neo430_???_inst: neo430_??? |
-- port map ( |
-- -- host access -- |
-- clk_i => clk_i, -- global clock line |
-- rden_i => io_rd_en, -- read enable |
-- wren_i => io_wr_en, -- write enable |
-- addr_i => cpu_bus.addr, -- address |
-- data_i => cpu_bus.wdata, -- data in |
-- data_o => ???_rdata -- data out |
-- ); |
--end generate; |
-- |
--neo430_???_inst_false: |
--if (???_USE = false) generate |
-- ???_rdata <= (others => '0'); |
--end generate; |
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-- System Configuration ----------------------------------------------------- |
-- ----------------------------------------------------------------------------- |
neo430_sysconfig_inst: neo430_sysconfig |
/neo430/trunk/neo430/sw/lib/neo430/include/neo430.h
1,9 → 1,9
// ################################################################################################# |
// # < neo430.h - MAIN NEO430 INCLUDE FILE > # |
// # ********************************************************************************************* # |
// # This file is crucial for all NEO430 software projects! # |
// # You only need to include THIS file into your project code (all sub-libraries are included # |
// # within this library file). # |
// # This file is crucial for all NEO430 software projects! # |
// # You only need to include THIS file into your project code (all sub-libraries are included # |
// # within this library file). # |
// # ********************************************************************************************* # |
// # This file is part of the NEO430 Processor project: https://github.com/stnolting/neo430 # |
// # Copyright by Stephan Nolting: stnolting@gmail.com # |
23,7 → 23,7
// # You should have received a copy of the GNU Lesser General Public License along with this # |
// # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html # |
// # ********************************************************************************************* # |
// # Stephan Nolting, Hannover, Germany 13.11.2019 # |
// # Stephan Nolting, Hannover, Germany 19.11.2019 # |
// ################################################################################################# |
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#ifndef neo430_h |
54,9 → 54,9
#define REG8 (volatile uint8_t*) // memory-mapped register |
#define REG16 (volatile uint16_t*) // memory-mapped register |
#define REG32 (volatile uint32_t*) // memory-mapped register |
#define ROM8 (const volatile uint8_t*) // read-only |
#define ROM16 (const volatile uint16_t*) // read-only |
#define ROM32 (const volatile uint32_t*) // read-only |
#define ROM8 (const volatile uint8_t*) // memory-mapped read-only constant |
#define ROM16 (const volatile uint16_t*) // memory-mapped read-only constant |
#define ROM32 (const volatile uint32_t*) // memory-mapped read-only constant |
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// ---------------------------------------------------------------------------- |
328,25 → 328,28
// TWI data register flags |
#define TWI_DT_ACK 15 // r/-: ACK received |
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/* |
// ---------------------------------------------------------------------------- |
// Reserved |
// ---------------------------------------------------------------------------- |
//#define TRNG_DATA (*(REG16 0xFFEC)) |
//#define TRNG_DATA (*(REG16 0xFFEE)) |
#define ???_CT (*(REG16 0xFFEC)) // -/w: control register |
#define ???_DATA (*(ROM16 0xFFEE)) // r/-: data register |
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// ??? control register |
#define ???_CT_EN 0 // -/w: ??? enable |
*/ |
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// ---------------------------------------------------------------------------- |
// System Configuration (SYSCONFIG) |
// ---------------------------------------------------------------------------- |
#define CPUID0 (*(ROM16 0xFFF0)) // r/-: HW version |
#define CPUID1 (*(ROM16 0xFFF2)) // r/-: system configuration |
#define CPUID2 (*(ROM16 0xFFF4)) // r/-: CPU identifier |
#define CPUID0 (*(ROM16 0xFFF0)) // r/-: HW version number |
#define CPUID1 (*(ROM16 0xFFF2)) // r/-: synthesized system features |
#define CPUID2 (*(ROM16 0xFFF4)) // r/-: custom user code |
#define CPUID3 (*(ROM16 0xFFF6)) // r/-: IMEM/ROM size in bytes |
#define CPUID4 (*(ROM16 0xFFF8)) // r/-: DMEM/RAM base address |
#define CPUID5 (*(ROM16 0xFFFA)) // r/-: DMEM/RAM size in bytes |
#define CPUID6 (*(ROM16 0xFFFC)) // r/-: clock speed lo |
#define CPUID7 (*(ROM16 0xFFFE)) // r/-: clock speed hi |
#define CPUID6 (*(ROM16 0xFFFC)) // r/-: clock speed (in Hz) low part |
#define CPUID7 (*(ROM16 0xFFFE)) // r/-: clock speed (in Hz) high part |
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// Aliases |
#define HW_VERSION CPUID0 // r/-: HW version number |
359,23 → 362,25
#define CLOCKSPEED_HI CPUID7 // r/-: clock speed (in Hz) high part |
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// SysConfig - 32-bit register access |
#define CLOCKSPEED_32bit (*(REG32 (&CLOCKSPEED_LO))) // r/-: clock speed (in Hz) |
#define CLOCKSPEED_32bit (*(ROM32 (&CLOCKSPEED_LO))) // r/-: clock speed (in Hz) |
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// SYS features |
#define SYS_MULDIV_EN 0 // MULDIV synthesized |
#define SYS_WB32_EN 1 // WB32 synthesized |
#define SYS_WDT_EN 2 // WDT synthesized |
#define SYS_GPIO_EN 3 // GPIO synthesized |
#define SYS_TIMER_EN 4 // timer synthesized |
#define SYS_UART_EN 5 // UART synthesized |
#define SYS_DADD_EN 6 // DADD instruction synthesized |
#define SYS_BTLD_EN 7 // Bootloader installed and enabled? |
#define SYS_IROM_EN 8 // Implement IMEM as true ROM? |
#define SYS_CRC_EN 9 // CRC synthesized |
#define SYS_CFU_EN 10 // CFU synthesized |
#define SYS_PWM_EN 11 // PWM controller synthesized |
#define SYS_TWI_EN 12 // TWI synthesized |
#define SYS_SPI_EN 13 // SPI synthesized |
#define SYS_MULDIV_EN 0 // r/-: MULDIV synthesized |
#define SYS_WB32_EN 1 // r/-: WB32 synthesized |
#define SYS_WDT_EN 2 // r/-: WDT synthesized |
#define SYS_GPIO_EN 3 // r/-: GPIO synthesized |
#define SYS_TIMER_EN 4 // r/-: TIMER synthesized |
#define SYS_UART_EN 5 // r/-: UART synthesized |
#define SYS_DADD_EN 6 // r/-: DADD instruction synthesized |
#define SYS_BTLD_EN 7 // r/-: Bootloader installed and enabled |
#define SYS_IROM_EN 8 // r/-: Implement IMEM as true ROM |
#define SYS_CRC_EN 9 // r/-: CRC synthesized |
#define SYS_CFU_EN 10 // r/-: CFU synthesized |
#define SYS_PWM_EN 11 // r/-: PWM controller synthesized |
#define SYS_TWI_EN 12 // r/-: TWI synthesized |
#define SYS_SPI_EN 13 // r/-: SPI synthesized |
//define reserved_EN 14 // r/-: reserved |
//define reserved_EN 15 // r/-: reserved |
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// ---------------------------------------------------------------------------- |
/neo430/trunk/neo430/sw/tools/image_gen/main.cpp
19,7 → 19,7
// # You should have received a copy of the GNU Lesser General Public License along with this # |
// # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html # |
// # ********************************************************************************************* # |
// # Stephan Nolting, Hannover, Germany 13.10.2017 # |
// # Stephan Nolting, Hannover, Germany 19.11.2019 # |
// ################################################################################################# |
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#include <stdint.h> |
37,7 → 37,7
" -app_img : Generate application raw executable memory image (text file, no header!)\n" |
" -bld_img : Generate bootloader raw executable memory image (text file, no header!)\n" |
"2nd: Input file (raw binary image)\n" |
"3rd: Output file (as selected)\n"); |
"3rd: Output file\n"); |
return 1; |
} |
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75,7 → 75,7
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// ------------------------------------------------------------ |
// Generate BINARY executable (with header!!!) |
// Generate BINARY executable (with header!!!) for bootloader upload |
// ------------------------------------------------------------ |
if (option == 1) { |
// reserve space for header |