OpenCores
URL https://opencores.org/ocsvn/neo430/neo430/trunk

Subversion Repositories neo430

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /
    from Rev 177 to Rev 178
    ↔ Reverse comparison
  •

Rev 177 → Rev 178

/neo430/trunk/neo430/README.md
66,7 → 66,7
- Optional multiplier/divider unit ([MULDIV](https://github.com/stnolting/neo430/blob/master/rtl/core/neo430_muldiv.vhd))
- Optional high-precision timer ([TIMER](https://github.com/stnolting/neo430/blob/master/rtl/core/neo430_timer.vhd))
- Optional universal asynchronous receiver and transmitter ([UART](https://github.com/stnolting/neo430/blob/master/rtl/core/neo430_uart.vhd))
- Optional serial peripheral interface ([SPI](https://github.com/stnolting/neo430/blob/master/rtl/core/neo430_spi.vhd))
- Optional serial peripheral interface ([SPI](https://github.com/stnolting/neo430/blob/master/rtl/core/neo430_spi.vhd)), 8 or 16 bit tansfer data size, 6 dedicated CS lines
- Optional I2C-compatible two wire serial interface ([TWI](https://github.com/stnolting/neo430/blob/master/rtl/core/neo430_twi.vhd)) supporting clock stretching
- Optional general purpose parallel IO port ([GPIO](https://github.com/stnolting/neo430/blob/master/rtl/core/neo430_gpio.vhd)), 16 inputs & 16 outputs, with pin-change interrupt and PWM option
- Optional 32-bit Wishbone bus interface adapter ([WB32](https://github.com/stnolting/neo430/blob/master/rtl/core/neo430_wb_interface.vhd)) - including bridges to [Avalon (TM](https://github.com/stnolting/neo430/blob/master/rtl/top_templates/neo430_top_avm.vhd)) bus and [AXI4-Lite (TM](https://github.com/stnolting/neo430/blob/master/rtl/top_templates/neo430_top_axi4lite.vhd))
73,8 → 73,8
- Optional watchdog timer ([WDT](https://github.com/stnolting/neo430/blob/master/rtl/core/neo430_wdt.vhd))
- Optional cyclic redundancy check unit ([CRC16/32](https://github.com/stnolting/neo430/blob/master/rtl/core/neo430_crc.vhd))
- Optional custom functions unit ([CFU](https://github.com/stnolting/neo430/blob/master/rtl/core/neo430_cfu.vhd)) for user-defined processor extensions
- Optional 4 channel PWM controller with 1 to 8 bit resolution ([PWM](https://github.com/stnolting/neo430/blob/master/rtl/core/neo430_pwm.vhd))
- Optional Galois Ring Oscillator (GARO) based true random number generator ([TRNG](https://github.com/stnolting/neo430/blob/master/rtl/core/neo430_trng.vhd))
- Optional 4 channel PWM controller with 4 or 8 bit resolution ([PWM](https://github.com/stnolting/neo430/blob/master/rtl/core/neo430_pwm.vhd))
- Optional Galois Ring Oscillator (GARO) based true random number generator ([TRNG](https://github.com/stnolting/neo430/blob/master/rtl/core/neo430_trng.vhd)) with de-biasing and internal post-processing
- Optional external interrupts controller with 8 independent channels ([EXIRQ](https://github.com/stnolting/neo430/blob/master/rtl/core/neo430_exirq.vhd)), can also be used for software-triggered interrupts (traps, breakpoints, etc.)
- Optional internal [bootloader](https://github.com/stnolting/neo430/blob/master/sw/bootloader/bootloader.c) (2kB ROM) with serial user console and automatic boot from external SPI EEPROM
 
199,7 → 199,7
multi-cycle scheme requiring several clock cycles to complete. When explicitly using the NEO430 MULDIV unit for performing
the matrix-operations benchmark scenario (among other operations, it is based on matrix-scalar, matrix-vector and
matrix-matrix multiplications) the **coremark score is increased to 12.56**. By using additional HW accelerators from the
NEO430 ecosystem (like the CRC unit) or by using the MULDIV unit also for address and index computations the perfromance
NEO430 ecosystem (like the CRC unit) or by using the MULDIV unit also for address and index computations the performance
and thus, the coremark score can be further increased
 
 
/neo430/trunk/neo430/doc/NEO430.pdf Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
/neo430/trunk/neo430/rtl/core/neo430_bootloader_image.vhd
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000345 => x"436c",
000345 => x"426c",
000346 => x"1289",
000347 => x"4c0a",
000348 => x"474d",
000349 => x"426c",
000350 => x"1289",
000351 => x"4c81",
000352 => x"0002",
000353 => x"421e",
000354 => x"fff6",
000355 => x"9a0e",
000356 => x"2814",
000357 => x"c312",
000358 => x"100a",
000359 => x"4a04",
000360 => x"5a04",
000361 => x"4348",
000362 => x"480c",
000363 => x"503c",
000364 => x"0006",
000365 => x"9408",
000366 => x"200d",
000367 => x"c312",
000368 => x"100e",
000369 => x"9e0a",
000370 => x"2814",
000371 => x"9116",
000372 => x"0002",
000373 => x"2419",
000374 => x"427c",
000375 => x"4030",
000376 => x"f280",
000377 => x"426c",
000378 => x"4030",
000379 => x"f280",
000380 => x"474d",
000381 => x"4e81",
000347 => x"4c81",
000348 => x"0002",
000349 => x"421e",
000350 => x"fff6",
000351 => x"9a0e",
000352 => x"2814",
000353 => x"c312",
000354 => x"100a",
000355 => x"4a04",
000356 => x"5a04",
000357 => x"4348",
000358 => x"480c",
000359 => x"503c",
000360 => x"0006",
000361 => x"9408",
000362 => x"200d",
000363 => x"c312",
000364 => x"100e",
000365 => x"9e0a",
000366 => x"2814",
000367 => x"9116",
000368 => x"0002",
000369 => x"2419",
000370 => x"427c",
000371 => x"4030",
000372 => x"f278",
000373 => x"426c",
000374 => x"4030",
000375 => x"f278",
000376 => x"474d",
000377 => x"4e81",
000378 => x"0000",
000379 => x"1289",
000380 => x"ec06",
000381 => x"4c88",
000382 => x"0000",
000383 => x"1289",
000384 => x"ec06",
000385 => x"4c88",
000386 => x"0000",
000387 => x"5328",
000388 => x"412e",
000389 => x"4030",
000390 => x"f2d4",
000391 => x"4a0c",
000392 => x"5a0c",
000393 => x"540c",
000394 => x"438c",
000395 => x"0000",
000396 => x"531a",
000397 => x"4030",
000398 => x"f2e2",
000399 => x"403c",
000400 => x"f730",
000401 => x"1285",
000402 => x"5221",
000403 => x"4030",
000404 => x"f67c",
000405 => x"120a",
000406 => x"1209",
000407 => x"1208",
000408 => x"1207",
000409 => x"1206",
000410 => x"1205",
000411 => x"12b0",
000412 => x"f674",
000413 => x"4032",
000414 => x"c000",
000383 => x"5328",
000384 => x"412e",
000385 => x"4030",
000386 => x"f2cc",
000387 => x"4a0c",
000388 => x"5a0c",
000389 => x"540c",
000390 => x"438c",
000391 => x"0000",
000392 => x"531a",
000393 => x"4030",
000394 => x"f2da",
000395 => x"403c",
000396 => x"f716",
000397 => x"1285",
000398 => x"5221",
000399 => x"4030",
000400 => x"f662",
000401 => x"120a",
000402 => x"1209",
000403 => x"1208",
000404 => x"1207",
000405 => x"1206",
000406 => x"1205",
000407 => x"12b0",
000408 => x"f65a",
000409 => x"4032",
000410 => x"c000",
000411 => x"4382",
000412 => x"ffec",
000413 => x"4382",
000414 => x"ff90",
000415 => x"4382",
000416 => x"ffec",
000416 => x"ffe0",
000417 => x"4382",
000418 => x"ff90",
000418 => x"ffe8",
000419 => x"4382",
000420 => x"ffe0",
000421 => x"4382",
000422 => x"ffe8",
000423 => x"4382",
000424 => x"ffee",
000425 => x"40b2",
000426 => x"f00a",
000427 => x"c000",
000428 => x"4382",
000429 => x"ffaa",
000430 => x"435c",
000431 => x"12b0",
000432 => x"f652",
000433 => x"403c",
000434 => x"4b00",
000435 => x"434d",
000436 => x"12b0",
000437 => x"f4b8",
000438 => x"12b0",
000439 => x"f562",
000440 => x"407c",
000441 => x"0003",
000442 => x"12b0",
000443 => x"f5f0",
000444 => x"434c",
000445 => x"12b0",
000446 => x"f638",
000447 => x"4382",
000448 => x"ffb0",
000449 => x"4038",
000450 => x"fffe",
000451 => x"482c",
000420 => x"ffee",
000421 => x"40b2",
000422 => x"f00e",
000423 => x"c000",
000424 => x"40b2",
000425 => x"f00a",
000426 => x"c006",
000427 => x"4382",
000428 => x"ffaa",
000429 => x"435c",
000430 => x"12b0",
000431 => x"f634",
000432 => x"403c",
000433 => x"4b00",
000434 => x"434d",
000435 => x"12b0",
000436 => x"f4b6",
000437 => x"12b0",
000438 => x"f560",
000439 => x"407c",
000440 => x"0003",
000441 => x"12b0",
000442 => x"f5ee",
000443 => x"434c",
000444 => x"12b0",
000445 => x"f61e",
000446 => x"4382",
000447 => x"ffb0",
000448 => x"4038",
000449 => x"fffe",
000450 => x"482c",
000451 => x"5c0c",
000452 => x"5c0c",
000453 => x"5c0c",
000454 => x"533c",
000455 => x"4c82",
000456 => x"ffb4",
000457 => x"40b2",
000458 => x"00ff",
000459 => x"ffb0",
000460 => x"4382",
000461 => x"c004",
000462 => x"12b0",
000463 => x"f664",
000464 => x"12b0",
000465 => x"f65e",
000466 => x"403a",
000467 => x"f568",
000468 => x"403c",
000469 => x"f753",
000470 => x"128a",
000471 => x"4039",
000472 => x"f5d6",
000473 => x"421c",
000474 => x"fff0",
000475 => x"1289",
000476 => x"403c",
000477 => x"f787",
000478 => x"128a",
000479 => x"421c",
000480 => x"fff4",
000481 => x"1289",
000482 => x"403c",
000483 => x"f790",
000484 => x"128a",
000485 => x"482c",
000486 => x"1289",
000487 => x"421c",
000488 => x"fffc",
000489 => x"1289",
000490 => x"403c",
000491 => x"f799",
000492 => x"128a",
000493 => x"421c",
000494 => x"fff6",
000495 => x"1289",
000496 => x"403c",
000497 => x"f7a2",
000498 => x"128a",
000499 => x"421c",
000500 => x"fffa",
000501 => x"1289",
000502 => x"403c",
000503 => x"f7ab",
000504 => x"128a",
000505 => x"421c",
000506 => x"fff2",
000507 => x"1289",
000508 => x"403c",
000509 => x"f7b4",
000510 => x"128a",
000511 => x"4a09",
000512 => x"403e",
000513 => x"c004",
000514 => x"403d",
000515 => x"ffa2",
000516 => x"4e2c",
000517 => x"903c",
000518 => x"0020",
000519 => x"2008",
000520 => x"435c",
000521 => x"12b0",
000522 => x"f260",
000523 => x"403c",
000524 => x"f707",
000525 => x"1289",
000526 => x"12b0",
000527 => x"f02a",
000528 => x"4d2c",
000529 => x"930c",
000530 => x"37f1",
000531 => x"4038",
000532 => x"f046",
000533 => x"1288",
000534 => x"4036",
000535 => x"f54c",
000536 => x"4035",
000537 => x"f538",
000538 => x"4037",
000539 => x"f260",
000540 => x"403c",
000541 => x"f7db",
000542 => x"1289",
000543 => x"1286",
000544 => x"4c4a",
000545 => x"1285",
000546 => x"403c",
000547 => x"f707",
000548 => x"1289",
000549 => x"907a",
000550 => x"0072",
000551 => x"2004",
000552 => x"4030",
000553 => x"f000",
000554 => x"4030",
000555 => x"f438",
000556 => x"907a",
000557 => x"0068",
000558 => x"2003",
000559 => x"1288",
000560 => x"4030",
000561 => x"f438",
000562 => x"907a",
000563 => x"0064",
000564 => x"2004",
000565 => x"12b0",
000566 => x"f050",
000567 => x"4030",
000568 => x"f438",
000569 => x"907a",
000570 => x"0075",
000571 => x"2004",
000572 => x"434c",
000573 => x"1287",
000574 => x"4030",
000575 => x"f438",
000576 => x"907a",
000577 => x"0070",
000578 => x"2004",
000579 => x"12b0",
000580 => x"f1c0",
000581 => x"4030",
000582 => x"f438",
000583 => x"907a",
000584 => x"0065",
000585 => x"2003",
000586 => x"435c",
000587 => x"4030",
000588 => x"f47a",
000589 => x"907a",
000590 => x"0073",
000591 => x"27be",
000592 => x"907a",
000593 => x"0063",
000594 => x"2005",
000595 => x"403c",
000596 => x"f7e3",
000597 => x"1289",
000598 => x"4030",
000599 => x"f438",
000600 => x"403c",
000601 => x"f7f6",
000602 => x"4030",
000603 => x"f4aa",
000604 => x"120a",
000605 => x"1209",
000606 => x"421a",
000607 => x"fffc",
000608 => x"421b",
000609 => x"fffe",
000610 => x"4c0e",
000611 => x"5c0e",
000612 => x"4d0f",
000613 => x"6d0f",
000614 => x"434c",
000615 => x"4f09",
000616 => x"9f0b",
000617 => x"2804",
000618 => x"9b09",
000619 => x"201b",
000620 => x"9e0a",
000621 => x"2c19",
000622 => x"434a",
000623 => x"4079",
000624 => x"0003",
000625 => x"407d",
000626 => x"00ff",
000627 => x"9c0d",
000628 => x"2817",
000629 => x"4382",
000630 => x"ffa0",
000631 => x"4a0d",
000632 => x"5a0d",
000453 => x"533c",
000454 => x"4c82",
000455 => x"ffb4",
000456 => x"40b2",
000457 => x"00ff",
000458 => x"ffb0",
000459 => x"4382",
000460 => x"c004",
000461 => x"12b0",
000462 => x"f646",
000463 => x"12b0",
000464 => x"f640",
000465 => x"403a",
000466 => x"f566",
000467 => x"403c",
000468 => x"f739",
000469 => x"128a",
000470 => x"4039",
000471 => x"f5d4",
000472 => x"421c",
000473 => x"fff0",
000474 => x"1289",
000475 => x"403c",
000476 => x"f76d",
000477 => x"128a",
000478 => x"421c",
000479 => x"fff4",
000480 => x"1289",
000481 => x"403c",
000482 => x"f776",
000483 => x"128a",
000484 => x"482c",
000485 => x"1289",
000486 => x"421c",
000487 => x"fffc",
000488 => x"1289",
000489 => x"403c",
000490 => x"f77f",
000491 => x"128a",
000492 => x"421c",
000493 => x"fff6",
000494 => x"1289",
000495 => x"403c",
000496 => x"f788",
000497 => x"128a",
000498 => x"421c",
000499 => x"fffa",
000500 => x"1289",
000501 => x"403c",
000502 => x"f791",
000503 => x"128a",
000504 => x"421c",
000505 => x"fff2",
000506 => x"1289",
000507 => x"403c",
000508 => x"f79a",
000509 => x"128a",
000510 => x"4a09",
000511 => x"403e",
000512 => x"c004",
000513 => x"403d",
000514 => x"ffa2",
000515 => x"4e2c",
000516 => x"903c",
000517 => x"0020",
000518 => x"2008",
000519 => x"435c",
000520 => x"12b0",
000521 => x"f258",
000522 => x"403c",
000523 => x"f6ed",
000524 => x"1289",
000525 => x"12b0",
000526 => x"f02e",
000527 => x"4d2c",
000528 => x"930c",
000529 => x"37f1",
000530 => x"4038",
000531 => x"f04a",
000532 => x"1288",
000533 => x"4036",
000534 => x"f54a",
000535 => x"4035",
000536 => x"f536",
000537 => x"4037",
000538 => x"f258",
000539 => x"403c",
000540 => x"f7c1",
000541 => x"1289",
000542 => x"1286",
000543 => x"4c4a",
000544 => x"1285",
000545 => x"403c",
000546 => x"f6ed",
000547 => x"1289",
000548 => x"907a",
000549 => x"0072",
000550 => x"2004",
000551 => x"4030",
000552 => x"f000",
000553 => x"4030",
000554 => x"f436",
000555 => x"907a",
000556 => x"0068",
000557 => x"2003",
000558 => x"1288",
000559 => x"4030",
000560 => x"f436",
000561 => x"907a",
000562 => x"0064",
000563 => x"2004",
000564 => x"12b0",
000565 => x"f054",
000566 => x"4030",
000567 => x"f436",
000568 => x"907a",
000569 => x"0075",
000570 => x"2004",
000571 => x"434c",
000572 => x"1287",
000573 => x"4030",
000574 => x"f436",
000575 => x"907a",
000576 => x"0070",
000577 => x"2004",
000578 => x"12b0",
000579 => x"f1b8",
000580 => x"4030",
000581 => x"f436",
000582 => x"907a",
000583 => x"0065",
000584 => x"2003",
000585 => x"435c",
000586 => x"4030",
000587 => x"f478",
000588 => x"907a",
000589 => x"0073",
000590 => x"27be",
000591 => x"907a",
000592 => x"0063",
000593 => x"2005",
000594 => x"403c",
000595 => x"f7c9",
000596 => x"1289",
000597 => x"4030",
000598 => x"f436",
000599 => x"403c",
000600 => x"f7f6",
000601 => x"4030",
000602 => x"f4a8",
000603 => x"120a",
000604 => x"1209",
000605 => x"421a",
000606 => x"fffc",
000607 => x"421b",
000608 => x"fffe",
000609 => x"4c0e",
000610 => x"5c0e",
000611 => x"4d0f",
000612 => x"6d0f",
000613 => x"434c",
000614 => x"4f09",
000615 => x"9f0b",
000616 => x"2804",
000617 => x"9b09",
000618 => x"201b",
000619 => x"9e0a",
000620 => x"2c19",
000621 => x"434a",
000622 => x"4079",
000623 => x"0003",
000624 => x"407d",
000625 => x"00ff",
000626 => x"9c0d",
000627 => x"2817",
000628 => x"4382",
000629 => x"ffa0",
000630 => x"4a0d",
000631 => x"5a0d",
000632 => x"5d0d",
000633 => x"5d0d",
000634 => x"5d0d",
000635 => x"5d0d",
647,386 → 647,386
000636 => x"5d0d",
000637 => x"5d0d",
000638 => x"5d0d",
000639 => x"5d0d",
000640 => x"dc0d",
000641 => x"d03d",
000642 => x"1000",
000643 => x"4d82",
000644 => x"ffa0",
000645 => x"4030",
000646 => x"f686",
000647 => x"8e0a",
000648 => x"7f0b",
000649 => x"531c",
000650 => x"4030",
000651 => x"f4d0",
000652 => x"936a",
000653 => x"2402",
000654 => x"926a",
000655 => x"2008",
000656 => x"490d",
000657 => x"12b0",
000658 => x"f692",
000659 => x"535a",
000660 => x"f03a",
000661 => x"00ff",
000662 => x"4030",
000663 => x"f4e2",
000664 => x"c312",
000665 => x"100c",
000666 => x"4030",
000667 => x"f526",
000668 => x"f03c",
000669 => x"00ff",
000670 => x"403e",
000671 => x"ffa0",
000672 => x"4e2d",
000673 => x"930d",
000674 => x"3bfd",
000675 => x"4c82",
000676 => x"ffa2",
000677 => x"4130",
000678 => x"403d",
000679 => x"ffa2",
000680 => x"4d2c",
000681 => x"930c",
000682 => x"37fd",
000683 => x"4130",
000684 => x"421c",
000685 => x"ffa2",
000686 => x"f03c",
000687 => x"8000",
000688 => x"4130",
000689 => x"421c",
000690 => x"ffa2",
000691 => x"4130",
000692 => x"120a",
000693 => x"1209",
000694 => x"1208",
000695 => x"1207",
000696 => x"4c09",
000697 => x"4038",
000698 => x"f538",
000699 => x"4077",
000700 => x"000d",
000701 => x"496a",
000702 => x"930a",
000703 => x"2002",
000704 => x"4030",
000705 => x"f682",
000706 => x"903a",
000707 => x"000a",
000708 => x"2002",
000709 => x"474c",
000710 => x"1288",
000711 => x"4a4c",
000712 => x"1288",
000713 => x"5319",
000714 => x"4030",
000715 => x"f57a",
000716 => x"f07c",
000717 => x"000f",
000718 => x"407d",
000719 => x"0009",
000720 => x"9c4d",
000721 => x"2805",
000722 => x"503c",
000723 => x"0030",
000724 => x"12b0",
000725 => x"f538",
000726 => x"4130",
000727 => x"507c",
000728 => x"0057",
000729 => x"f03c",
000730 => x"00ff",
000731 => x"4030",
000732 => x"f5a8",
000733 => x"120a",
000734 => x"1209",
000735 => x"4c49",
000736 => x"490c",
000737 => x"426d",
000738 => x"12b0",
000739 => x"f692",
000740 => x"403a",
000741 => x"f598",
000742 => x"128a",
000743 => x"494c",
000744 => x"128a",
000745 => x"4030",
000746 => x"f686",
000747 => x"120a",
000748 => x"1209",
000749 => x"4c09",
000750 => x"427d",
000751 => x"12b0",
000752 => x"f692",
000753 => x"403a",
000754 => x"f5ba",
000755 => x"128a",
000756 => x"494c",
000757 => x"128a",
000758 => x"4030",
000759 => x"f686",
000760 => x"f03c",
000761 => x"00ff",
000762 => x"403d",
000763 => x"ffa4",
000764 => x"438d",
000765 => x"0000",
000639 => x"dc0d",
000640 => x"d03d",
000641 => x"1000",
000642 => x"4d82",
000643 => x"ffa0",
000644 => x"4030",
000645 => x"f66c",
000646 => x"8e0a",
000647 => x"7f0b",
000648 => x"531c",
000649 => x"4030",
000650 => x"f4ce",
000651 => x"936a",
000652 => x"2402",
000653 => x"926a",
000654 => x"2008",
000655 => x"490d",
000656 => x"12b0",
000657 => x"f678",
000658 => x"535a",
000659 => x"f03a",
000660 => x"00ff",
000661 => x"4030",
000662 => x"f4e0",
000663 => x"c312",
000664 => x"100c",
000665 => x"4030",
000666 => x"f524",
000667 => x"f03c",
000668 => x"00ff",
000669 => x"403e",
000670 => x"ffa0",
000671 => x"4e2d",
000672 => x"930d",
000673 => x"3bfd",
000674 => x"4c82",
000675 => x"ffa2",
000676 => x"4130",
000677 => x"403d",
000678 => x"ffa2",
000679 => x"4d2c",
000680 => x"930c",
000681 => x"37fd",
000682 => x"4130",
000683 => x"421c",
000684 => x"ffa2",
000685 => x"f03c",
000686 => x"8000",
000687 => x"4130",
000688 => x"421c",
000689 => x"ffa2",
000690 => x"4130",
000691 => x"120a",
000692 => x"1209",
000693 => x"1208",
000694 => x"1207",
000695 => x"4c09",
000696 => x"4038",
000697 => x"f536",
000698 => x"4077",
000699 => x"000d",
000700 => x"496a",
000701 => x"930a",
000702 => x"2002",
000703 => x"4030",
000704 => x"f668",
000705 => x"903a",
000706 => x"000a",
000707 => x"2002",
000708 => x"474c",
000709 => x"1288",
000710 => x"4a4c",
000711 => x"1288",
000712 => x"5319",
000713 => x"4030",
000714 => x"f578",
000715 => x"f07c",
000716 => x"000f",
000717 => x"407d",
000718 => x"0009",
000719 => x"9c4d",
000720 => x"2805",
000721 => x"503c",
000722 => x"0030",
000723 => x"12b0",
000724 => x"f536",
000725 => x"4130",
000726 => x"507c",
000727 => x"0057",
000728 => x"f03c",
000729 => x"00ff",
000730 => x"4030",
000731 => x"f5a6",
000732 => x"120a",
000733 => x"1209",
000734 => x"4c49",
000735 => x"490c",
000736 => x"426d",
000737 => x"12b0",
000738 => x"f678",
000739 => x"403a",
000740 => x"f596",
000741 => x"128a",
000742 => x"494c",
000743 => x"128a",
000744 => x"4030",
000745 => x"f66c",
000746 => x"120a",
000747 => x"1209",
000748 => x"4c09",
000749 => x"427d",
000750 => x"12b0",
000751 => x"f678",
000752 => x"403a",
000753 => x"f5b8",
000754 => x"128a",
000755 => x"494c",
000756 => x"128a",
000757 => x"4030",
000758 => x"f66c",
000759 => x"f03c",
000760 => x"00ff",
000761 => x"403d",
000762 => x"ffa4",
000763 => x"438d",
000764 => x"0000",
000765 => x"5c0c",
000766 => x"5c0c",
000767 => x"5c0c",
000768 => x"5c0c",
000769 => x"d31c",
000770 => x"4c8d",
000771 => x"0000",
000772 => x"4130",
000773 => x"f03c",
000774 => x"00ff",
000775 => x"403d",
000776 => x"ffa4",
000777 => x"f0bd",
000778 => x"fc3f",
000779 => x"0000",
000780 => x"5c0c",
000781 => x"5c0c",
000782 => x"5c0c",
000783 => x"5c0c",
000784 => x"5c0c",
000785 => x"5c0c",
000786 => x"dd2c",
000787 => x"d03c",
000788 => x"0200",
000789 => x"4c8d",
000790 => x"0000",
000791 => x"4130",
000792 => x"f0b2",
000793 => x"fdff",
000794 => x"ffa4",
000795 => x"4130",
000796 => x"403d",
000797 => x"ffa6",
000798 => x"f03c",
000799 => x"00ff",
000800 => x"4c8d",
000801 => x"0000",
000802 => x"403e",
000803 => x"ffa4",
000804 => x"4e2c",
000805 => x"930c",
000806 => x"3bfd",
000807 => x"4d2c",
000808 => x"4130",
000809 => x"4c82",
000810 => x"ffae",
000811 => x"4130",
000812 => x"ec82",
000813 => x"ffae",
000814 => x"4130",
000815 => x"d232",
000816 => x"4303",
000817 => x"4130",
000818 => x"d032",
000819 => x"4000",
000820 => x"4130",
000821 => x"4c4e",
000822 => x"4d4c",
000823 => x"108e",
000824 => x"de0c",
000825 => x"4130",
000826 => x"40b2",
000827 => x"4700",
000828 => x"ffb8",
000829 => x"4130",
000830 => x"4134",
000831 => x"4135",
000832 => x"4136",
000833 => x"4137",
000834 => x"4138",
000835 => x"4139",
000836 => x"413a",
000837 => x"4130",
000838 => x"533d",
000839 => x"c312",
000840 => x"100c",
000841 => x"930d",
000842 => x"23fb",
000843 => x"4130",
000844 => x"6f42",
000845 => x"746f",
000846 => x"6e69",
000847 => x"2e67",
000848 => x"2e2e",
000849 => x"0a0a",
000850 => x"4300",
000851 => x"444d",
000852 => x"3a73",
000853 => x"200a",
000854 => x"3a64",
000855 => x"4420",
000856 => x"6d75",
000857 => x"2070",
000858 => x"454d",
000859 => x"0a4d",
000860 => x"6520",
000861 => x"203a",
000862 => x"6f4c",
000863 => x"6461",
000769 => x"5c0c",
000770 => x"5c0c",
000771 => x"5c0c",
000772 => x"5c0c",
000773 => x"5c0c",
000774 => x"d03c",
000775 => x"0040",
000776 => x"4c8d",
000777 => x"0000",
000778 => x"4130",
000779 => x"f0b2",
000780 => x"ffc0",
000781 => x"ffa4",
000782 => x"4130",
000783 => x"403d",
000784 => x"ffa6",
000785 => x"4c8d",
000786 => x"0000",
000787 => x"403e",
000788 => x"ffa4",
000789 => x"4e2c",
000790 => x"930c",
000791 => x"3bfd",
000792 => x"4d2c",
000793 => x"4130",
000794 => x"4c82",
000795 => x"ffae",
000796 => x"4130",
000797 => x"ec82",
000798 => x"ffae",
000799 => x"4130",
000800 => x"d232",
000801 => x"4303",
000802 => x"4130",
000803 => x"d032",
000804 => x"4000",
000805 => x"4130",
000806 => x"108c",
000807 => x"4130",
000808 => x"4c4e",
000809 => x"4d4c",
000810 => x"108e",
000811 => x"de0c",
000812 => x"4130",
000813 => x"40b2",
000814 => x"4700",
000815 => x"ffb8",
000816 => x"4130",
000817 => x"4134",
000818 => x"4135",
000819 => x"4136",
000820 => x"4137",
000821 => x"4138",
000822 => x"4139",
000823 => x"413a",
000824 => x"4130",
000825 => x"533d",
000826 => x"c312",
000827 => x"100c",
000828 => x"930d",
000829 => x"23fb",
000830 => x"4130",
000831 => x"6f42",
000832 => x"746f",
000833 => x"6e69",
000834 => x"2e67",
000835 => x"2e2e",
000836 => x"0a0a",
000837 => x"4300",
000838 => x"444d",
000839 => x"3a73",
000840 => x"200a",
000841 => x"3a64",
000842 => x"4420",
000843 => x"6d75",
000844 => x"2070",
000845 => x"454d",
000846 => x"0a4d",
000847 => x"6520",
000848 => x"203a",
000849 => x"6f4c",
000850 => x"6461",
000851 => x"4520",
000852 => x"5045",
000853 => x"4f52",
000854 => x"0a4d",
000855 => x"6820",
000856 => x"203a",
000857 => x"6548",
000858 => x"706c",
000859 => x"200a",
000860 => x"3a70",
000861 => x"5320",
000862 => x"6f74",
000863 => x"6572",
000864 => x"4520",
000865 => x"5045",
000866 => x"4f52",
000867 => x"0a4d",
000868 => x"6820",
000868 => x"7220",
000869 => x"203a",
000870 => x"6548",
000871 => x"706c",
000872 => x"200a",
000873 => x"3a70",
000874 => x"5320",
000875 => x"6f74",
000876 => x"6572",
000877 => x"4520",
000878 => x"5045",
000879 => x"4f52",
000880 => x"0a4d",
000881 => x"7220",
000870 => x"6552",
000871 => x"7473",
000872 => x"7261",
000873 => x"0a74",
000874 => x"7320",
000875 => x"203a",
000876 => x"7453",
000877 => x"7261",
000878 => x"2074",
000879 => x"7061",
000880 => x"0a70",
000881 => x"7520",
000882 => x"203a",
000883 => x"6552",
000884 => x"7473",
000885 => x"7261",
000886 => x"0a74",
000887 => x"7320",
000888 => x"203a",
000889 => x"7453",
000890 => x"7261",
000891 => x"2074",
000892 => x"7061",
000893 => x"0a70",
000894 => x"7520",
000895 => x"203a",
000896 => x"7055",
000897 => x"6f6c",
000898 => x"6461",
000899 => x"0a00",
000900 => x"3a00",
000901 => x"2020",
000902 => x"0700",
000903 => x"450a",
000904 => x"5252",
000905 => x"005f",
000906 => x"7250",
000907 => x"636f",
000908 => x"6565",
000909 => x"2064",
000910 => x"7928",
000911 => x"6e2f",
000912 => x"3f29",
000913 => x"0a00",
000914 => x"7257",
000915 => x"7469",
000916 => x"6e69",
000917 => x"2e67",
000918 => x"2e2e",
000919 => x"0020",
000920 => x"4b4f",
000921 => x"4100",
000922 => x"6177",
000923 => x"7469",
000924 => x"6e69",
000925 => x"2067",
000926 => x"4942",
000883 => x"7055",
000884 => x"6f6c",
000885 => x"6461",
000886 => x"0a00",
000887 => x"3a00",
000888 => x"2020",
000889 => x"0700",
000890 => x"450a",
000891 => x"5252",
000892 => x"005f",
000893 => x"7250",
000894 => x"636f",
000895 => x"6565",
000896 => x"2064",
000897 => x"7928",
000898 => x"6e2f",
000899 => x"3f29",
000900 => x"0a00",
000901 => x"7257",
000902 => x"7469",
000903 => x"6e69",
000904 => x"2e67",
000905 => x"2e2e",
000906 => x"0020",
000907 => x"4b4f",
000908 => x"4100",
000909 => x"6177",
000910 => x"7469",
000911 => x"6e69",
000912 => x"2067",
000913 => x"4942",
000914 => x"454e",
000915 => x"4558",
000916 => x"2e2e",
000917 => x"202e",
000918 => x"4c00",
000919 => x"616f",
000920 => x"6964",
000921 => x"676e",
000922 => x"2e2e",
000923 => x"202e",
000924 => x"0a00",
000925 => x"3c0a",
000926 => x"203c",
000927 => x"454e",
000928 => x"4558",
000929 => x"2e2e",
000930 => x"202e",
000931 => x"4c00",
000932 => x"616f",
000933 => x"6964",
000934 => x"676e",
000935 => x"2e2e",
000936 => x"202e",
000937 => x"0a00",
000938 => x"3c0a",
000939 => x"203c",
000940 => x"454e",
000941 => x"344f",
000942 => x"3033",
000943 => x"4220",
000944 => x"6f6f",
000945 => x"6c74",
000946 => x"616f",
000947 => x"6564",
000948 => x"2072",
000949 => x"3e3e",
000950 => x"0a0a",
000951 => x"4c42",
000952 => x"3a56",
000953 => x"4420",
000954 => x"6365",
000955 => x"3120",
000956 => x"2033",
000957 => x"3032",
000958 => x"3931",
000959 => x"480a",
000960 => x"5657",
000961 => x"203a",
000962 => x"7830",
000963 => x"0a00",
000964 => x"5355",
000965 => x"3a52",
000966 => x"3020",
000967 => x"0078",
000968 => x"430a",
000969 => x"4b4c",
000970 => x"203a",
000971 => x"7830",
000972 => x"0a00",
000973 => x"4f52",
000974 => x"3a4d",
000975 => x"3020",
000976 => x"0078",
000977 => x"520a",
000978 => x"4d41",
000979 => x"203a",
000980 => x"7830",
000981 => x"0a00",
000982 => x"5953",
000983 => x"3a53",
000984 => x"3020",
000985 => x"0078",
000986 => x"0a0a",
000987 => x"7541",
000988 => x"6f74",
000928 => x"344f",
000929 => x"3033",
000930 => x"4220",
000931 => x"6f6f",
000932 => x"6c74",
000933 => x"616f",
000934 => x"6564",
000935 => x"2072",
000936 => x"3e3e",
000937 => x"0a0a",
000938 => x"4c42",
000939 => x"3a56",
000940 => x"4a20",
000941 => x"6e61",
000942 => x"3220",
000943 => x"2039",
000944 => x"3032",
000945 => x"3032",
000946 => x"480a",
000947 => x"5657",
000948 => x"203a",
000949 => x"7830",
000950 => x"0a00",
000951 => x"5355",
000952 => x"3a52",
000953 => x"3020",
000954 => x"0078",
000955 => x"430a",
000956 => x"4b4c",
000957 => x"203a",
000958 => x"7830",
000959 => x"0a00",
000960 => x"4f52",
000961 => x"3a4d",
000962 => x"3020",
000963 => x"0078",
000964 => x"520a",
000965 => x"4d41",
000966 => x"203a",
000967 => x"7830",
000968 => x"0a00",
000969 => x"5953",
000970 => x"3a53",
000971 => x"3020",
000972 => x"0078",
000973 => x"0a0a",
000974 => x"7541",
000975 => x"6f74",
000976 => x"6f62",
000977 => x"746f",
000978 => x"6920",
000979 => x"206e",
000980 => x"7338",
000981 => x"202e",
000982 => x"7250",
000983 => x"7365",
000984 => x"2073",
000985 => x"656b",
000986 => x"2079",
000987 => x"6f74",
000988 => x"6120",
000989 => x"6f62",
000990 => x"746f",
000991 => x"6920",
000992 => x"206e",
000993 => x"7338",
000994 => x"202e",
000995 => x"7250",
000996 => x"7365",
000997 => x"2073",
000998 => x"656b",
000999 => x"2079",
001000 => x"6f74",
001001 => x"6120",
001002 => x"6f62",
001003 => x"7472",
001004 => x"0a2e",
001005 => x"0a00",
001006 => x"4d43",
001007 => x"3a44",
001008 => x"203e",
001009 => x"4200",
001010 => x"2079",
001011 => x"7453",
001012 => x"7065",
001013 => x"6168",
001014 => x"206e",
001015 => x"6f4e",
001016 => x"746c",
001017 => x"6e69",
001018 => x"0067",
000990 => x"7472",
000991 => x"0a2e",
000992 => x"0a00",
000993 => x"4d43",
000994 => x"3a44",
000995 => x"203e",
000996 => x"4200",
000997 => x"2079",
000998 => x"7453",
000999 => x"7065",
001000 => x"6168",
001001 => x"206e",
001002 => x"6f4e",
001003 => x"746c",
001004 => x"6e69",
001005 => x"0a67",
001006 => x"614d",
001007 => x"6564",
001008 => x"6920",
001009 => x"206e",
001010 => x"6148",
001011 => x"6e6e",
001012 => x"766f",
001013 => x"7265",
001014 => x"202c",
001015 => x"6547",
001016 => x"6d72",
001017 => x"6e61",
001018 => x"0079",
001019 => x"6142",
001020 => x"2064",
001021 => x"4d43",
/neo430/trunk/neo430/rtl/core/neo430_package.vhd
19,7 → 19,7
-- # You should have received a copy of the GNU Lesser General Public License along with this #
-- # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
-- # ********************************************************************************************* #
-- # Stephan Nolting, Hannover, Germany 10.12.2019 #
-- # Stephan Nolting, Hannover, Germany 29.01.2020 #
-- #################################################################################################
 
library ieee;
30,7 → 30,7
 
-- Processor Hardware Version -------------------------------------------------------------
-- -------------------------------------------------------------------------------------------
constant hw_version_c : std_ulogic_vector(15 downto 0) := x"0322"; -- no touchy!
constant hw_version_c : std_ulogic_vector(15 downto 0) := x"0330"; -- no touchy!
 
-- Advanced Hardware Configuration --------------------------------------------------------
-- -------------------------------------------------------------------------------------------
350,7 → 350,7
spi_sclk_o : out std_ulogic; -- serial clock line
spi_mosi_o : out std_ulogic; -- serial data line out
spi_miso_i : in std_ulogic; -- serial data line in
spi_cs_o : out std_ulogic_vector(07 downto 0); -- SPI CS 0..7
spi_cs_o : out std_ulogic_vector(05 downto 0); -- SPI CS
twi_sda_io : inout std_logic; -- twi serial data line
twi_scl_io : inout std_logic; -- twi serial clock line
-- 32-bit wishbone interface --
595,7 → 595,7
spi_sclk_o : out std_ulogic; -- SPI serial clock
spi_mosi_o : out std_ulogic; -- SPI master out, slave in
spi_miso_i : in std_ulogic; -- SPI master in, slave out
spi_cs_o : out std_ulogic_vector(07 downto 0); -- SPI CS 0..7
spi_cs_o : out std_ulogic_vector(05 downto 0); -- SPI CS
-- interrupt --
spi_irq_o : out std_ulogic -- transmission done interrupt
);
1012,5 → 1012,4
return tmp_v;
end function xor_all_f;
 
 
end neo430_package;
/neo430/trunk/neo430/rtl/core/neo430_spi.vhd
1,7 → 1,7
-- #################################################################################################
-- # << NEO430 - Serial Peripheral Interface >> #
-- # ********************************************************************************************* #
-- # Frame format: 8-bit, MSB or LSB first, 2 clock modes, 8 clock speeds, 8 dedicated CS lines. #
-- # Frame format: 8-bit or 16-bit, MSB or LSB first, 2 clock modes, 8 clock speeds, 6 CS lines. #
-- # Interrupt: SPI_transfer_done #
-- # ********************************************************************************************* #
-- # This file is part of the NEO430 Processor project: https://github.com/stnolting/neo430 #
22,7 → 22,7
-- # You should have received a copy of the GNU Lesser General Public License along with this #
-- # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
-- # ********************************************************************************************* #
-- # Stephan Nolting, Hannover, Germany 13.11.2019 #
-- # Stephan Nolting, Hannover, Germany 10.01.2020 #
-- #################################################################################################
 
library ieee;
48,7 → 48,7
spi_sclk_o : out std_ulogic; -- SPI serial clock
spi_mosi_o : out std_ulogic; -- SPI master out, slave in
spi_miso_i : in std_ulogic; -- SPI master in, slave out
spi_cs_o : out std_ulogic_vector(07 downto 0); -- SPI CS 0..7
spi_cs_o : out std_ulogic_vector(05 downto 0); -- SPI CS
-- interrupt --
spi_irq_o : out std_ulogic -- transmission done interrupt
);
61,18 → 61,21
constant lo_abb_c : natural := index_size_f(spi_size_c); -- low address boundary bit
 
-- control reg bits --
constant ctrl_spi_en_c : natural := 0; -- r/w: spi enable
constant ctrl_spi_cpha_c : natural := 1; -- r/w: spi clock phase
constant ctrl_spi_irq_en_c : natural := 2; -- r/w: spi transmission done interrupt enable
constant ctrl_spi_prsc0_c : natural := 3; -- r/w: spi prescaler select bit 0
constant ctrl_spi_prsc1_c : natural := 4; -- r/w: spi prescaler select bit 1
constant ctrl_spi_prsc2_c : natural := 5; -- r/w: spi prescaler select bit 2
constant ctrl_spi_cs_sel0_c : natural := 6; -- r/w: spi CS select bit 0
constant ctrl_spi_cs_sel1_c : natural := 7; -- r/w: spi CS select bit 0
constant ctrl_spi_cs_sel2_c : natural := 8; -- r/w: spi CS select bit 0
constant ctrl_spi_cs_set_c : natural := 9; -- r/w: spi CS select enable
constant ctrl_spi_dir_c : natural := 10; -- r/w: shift direction (0: MSB first, 1: LSB first)
-- ...
constant ctrl_spi_cs_sel0_c : natural := 0; -- r/w: spi CS 0
constant ctrl_spi_cs_sel1_c : natural := 1; -- r/w: spi CS 1
constant ctrl_spi_cs_sel2_c : natural := 2; -- r/w: spi CS 2
constant ctrl_spi_cs_sel3_c : natural := 3; -- r/w: spi CS 3
constant ctrl_spi_cs_sel4_c : natural := 4; -- r/w: spi CS 4
constant ctrl_spi_cs_sel5_c : natural := 5; -- r/w: spi CS 5
constant ctrl_spi_en_c : natural := 6; -- r/w: spi enable
constant ctrl_spi_cpha_c : natural := 7; -- r/w: spi clock phase
constant ctrl_spi_irq_en_c : natural := 8; -- r/w: spi transmission done interrupt enable
constant ctrl_spi_prsc0_c : natural := 9; -- r/w: spi prescaler select bit 0
constant ctrl_spi_prsc1_c : natural := 10; -- r/w: spi prescaler select bit 1
constant ctrl_spi_prsc2_c : natural := 11; -- r/w: spi prescaler select bit 2
constant ctrl_spi_dir_c : natural := 12; -- r/w: shift direction (0: MSB first, 1: LSB first)
constant ctrl_spi_size_c : natural := 13; -- r/w: data size(0: 8-bit, 1: 16-bit)
-- reserved : natural := 14;
constant ctrl_spi_busy_c : natural := 15; -- r/-: spi transceiver is busy
 
-- access control --
91,8 → 94,9
signal spi_busy : std_ulogic;
signal spi_state0 : std_ulogic;
signal spi_state1 : std_ulogic;
signal spi_rtx_sreg : std_ulogic_vector(07 downto 0);
signal spi_bitcnt : std_ulogic_vector(03 downto 0);
signal spi_rtx_sreg : std_ulogic_vector(15 downto 0);
signal spi_rx_data : std_ulogic_vector(15 downto 0);
signal spi_bitcnt : std_ulogic_vector(04 downto 0);
signal spi_miso_ff0 : std_ulogic;
signal spi_miso_ff1 : std_ulogic;
 
140,7 → 144,11
-- arbiter --
spi_irq_o <= '0';
if (spi_state0 = '0') or (ctrl(ctrl_spi_en_c) = '0') then -- idle or disabled
spi_bitcnt <= "1000"; -- 8 bit transfer size
if (ctrl(ctrl_spi_size_c) = '0') then -- 8 bit mode
spi_bitcnt <= "01000";
else -- 16 bit mode
spi_bitcnt <= "10000";
end if;
spi_state1 <= '0';
spi_mosi_o <= '0';
spi_sclk_o <= '0';
147,41 → 155,48
if (ctrl(ctrl_spi_en_c) = '0') then -- disabled
spi_busy <= '0';
elsif (wr_en = '1') and (addr = spi_rtx_addr_c) then
spi_rtx_sreg <= data_i(7 downto 0);
spi_busy <= '1';
if (ctrl(ctrl_spi_size_c) = '0') then -- 8 bit mode
spi_rtx_sreg <= data_i(7 downto 0) & "00000000";
else -- 16 bit mode
spi_rtx_sreg <= data_i(15 downto 0);
end if;
spi_busy <= '1';
end if;
spi_state0 <= spi_busy and spi_clk; -- start with next new clock pulse
 
else -- transmission in progress
if (spi_state1 = '0') then -- first half of transmission
 
spi_sclk_o <= ctrl(ctrl_spi_cpha_c);
if (ctrl(ctrl_spi_dir_c) = '0') then
spi_mosi_o <= spi_rtx_sreg(7); -- MSB first
spi_mosi_o <= spi_rtx_sreg(15); -- MSB first
else
spi_mosi_o <= spi_rtx_sreg(0); -- LSB first
end if;
if (spi_clk = '1') then
spi_state1 <= '1';
spi_state1 <= '1';
if (ctrl(ctrl_spi_cpha_c) = '0') then
if (ctrl(ctrl_spi_dir_c) = '0') then
spi_rtx_sreg <= spi_rtx_sreg(6 downto 0) & spi_miso_ff1; -- MSB first
spi_rtx_sreg <= spi_rtx_sreg(14 downto 0) & spi_miso_ff1; -- MSB first
else
spi_rtx_sreg <= spi_miso_ff1 & spi_rtx_sreg(7 downto 1); -- LSB first
spi_rtx_sreg <= spi_miso_ff1 & spi_rtx_sreg(15 downto 1); -- LSB first
end if;
end if;
spi_bitcnt <= std_ulogic_vector(unsigned(spi_bitcnt) - 1);
end if;
else -- second half of transmission
 
spi_sclk_o <= not ctrl(ctrl_spi_cpha_c);
if (spi_clk = '1') then
spi_state1 <= '0';
if (ctrl(ctrl_spi_cpha_c) = '1') then
if (ctrl(ctrl_spi_dir_c) = '0') then
spi_rtx_sreg <= spi_rtx_sreg(6 downto 0) & spi_miso_ff1; -- MSB first
spi_rtx_sreg <= spi_rtx_sreg(14 downto 0) & spi_miso_ff1; -- MSB first
else
spi_rtx_sreg <= spi_miso_ff1 & spi_rtx_sreg(7 downto 1); -- LSB first
spi_rtx_sreg <= spi_miso_ff1 & spi_rtx_sreg(15 downto 1); -- LSB first
end if;
end if;
if (spi_bitcnt = "0000") then
if (spi_bitcnt = "00000") then
spi_state0 <= '0';
spi_busy <= '0';
spi_irq_o <= ctrl(ctrl_spi_irq_en_c);
192,15 → 207,16
end if;
end process spi_rtx_unit;
 
-- SPI receiver output --
spi_rx_data <= (x"00" & spi_rtx_sreg(7 downto 0)) when (ctrl(ctrl_spi_size_c) = '0') else spi_rtx_sreg(15 downto 0);
 
-- direct user-defined CS --
spi_cs_o(0) <= '0' when (ctrl(ctrl_spi_cs_set_c) = '1') and (ctrl(ctrl_spi_cs_sel2_c downto ctrl_spi_cs_sel0_c) = "000") else '1';
spi_cs_o(1) <= '0' when (ctrl(ctrl_spi_cs_set_c) = '1') and (ctrl(ctrl_spi_cs_sel2_c downto ctrl_spi_cs_sel0_c) = "001") else '1';
spi_cs_o(2) <= '0' when (ctrl(ctrl_spi_cs_set_c) = '1') and (ctrl(ctrl_spi_cs_sel2_c downto ctrl_spi_cs_sel0_c) = "010") else '1';
spi_cs_o(3) <= '0' when (ctrl(ctrl_spi_cs_set_c) = '1') and (ctrl(ctrl_spi_cs_sel2_c downto ctrl_spi_cs_sel0_c) = "011") else '1';
spi_cs_o(4) <= '0' when (ctrl(ctrl_spi_cs_set_c) = '1') and (ctrl(ctrl_spi_cs_sel2_c downto ctrl_spi_cs_sel0_c) = "100") else '1';
spi_cs_o(5) <= '0' when (ctrl(ctrl_spi_cs_set_c) = '1') and (ctrl(ctrl_spi_cs_sel2_c downto ctrl_spi_cs_sel0_c) = "101") else '1';
spi_cs_o(6) <= '0' when (ctrl(ctrl_spi_cs_set_c) = '1') and (ctrl(ctrl_spi_cs_sel2_c downto ctrl_spi_cs_sel0_c) = "110") else '1';
spi_cs_o(7) <= '0' when (ctrl(ctrl_spi_cs_set_c) = '1') and (ctrl(ctrl_spi_cs_sel2_c downto ctrl_spi_cs_sel0_c) = "111") else '1';
spi_cs_o(0) <= '0' when (ctrl(ctrl_spi_cs_sel0_c) = '1') else '1';
spi_cs_o(1) <= '0' when (ctrl(ctrl_spi_cs_sel1_c) = '1') else '1';
spi_cs_o(2) <= '0' when (ctrl(ctrl_spi_cs_sel2_c) = '1') else '1';
spi_cs_o(3) <= '0' when (ctrl(ctrl_spi_cs_sel3_c) = '1') else '1';
spi_cs_o(4) <= '0' when (ctrl(ctrl_spi_cs_sel4_c) = '1') else '1';
spi_cs_o(5) <= '0' when (ctrl(ctrl_spi_cs_sel5_c) = '1') else '1';
 
 
-- Read access --------------------------------------------------------------
217,14 → 233,17
data_o(ctrl_spi_prsc0_c) <= ctrl(ctrl_spi_prsc0_c);
data_o(ctrl_spi_prsc1_c) <= ctrl(ctrl_spi_prsc1_c);
data_o(ctrl_spi_prsc2_c) <= ctrl(ctrl_spi_prsc2_c);
data_o(ctrl_spi_dir_c) <= ctrl(ctrl_spi_dir_c);
data_o(ctrl_spi_size_c) <= ctrl(ctrl_spi_size_c);
data_o(ctrl_spi_cs_sel0_c) <= ctrl(ctrl_spi_cs_sel0_c);
data_o(ctrl_spi_cs_sel1_c) <= ctrl(ctrl_spi_cs_sel1_c);
data_o(ctrl_spi_cs_sel2_c) <= ctrl(ctrl_spi_cs_sel2_c);
data_o(ctrl_spi_cs_set_c) <= ctrl(ctrl_spi_cs_set_c);
data_o(ctrl_spi_dir_c) <= ctrl(ctrl_spi_dir_c);
data_o(ctrl_spi_cs_sel3_c) <= ctrl(ctrl_spi_cs_sel3_c);
data_o(ctrl_spi_cs_sel4_c) <= ctrl(ctrl_spi_cs_sel4_c);
data_o(ctrl_spi_cs_sel5_c) <= ctrl(ctrl_spi_cs_sel5_c);
data_o(ctrl_spi_busy_c) <= spi_busy;
else -- spi_rtx_addr_c
data_o(7 downto 0) <= spi_rtx_sreg;
data_o(15 downto 0) <= spi_rx_data;
end if;
end if;
end if;
/neo430/trunk/neo430/rtl/core/neo430_timer.vhd
24,7 → 24,7
-- # You should have received a copy of the GNU Lesser General Public License along with this #
-- # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
-- # ********************************************************************************************* #
-- # tephan Nolting, Hannover, Germany 10.12.2019 #
-- # tephan Nolting, Hannover, Germany 16.01.2020 #
-- #################################################################################################
 
library ieee;
146,7 → 146,7
match <= '1' when (cnt = thres) else '0';
 
-- interrupt line --
irq_fire <= match and ctrl(ctrl_en_bit_c) and ctrl(ctrl_irq_en_bit_c);
irq_fire <= match and ctrl(ctrl_en_bit_c) and ctrl(ctrl_irq_en_bit_c) and ctrl(ctrl_run_c);
 
-- edge detector --
irq_o <= irq_fire and (not irq_fire_ff);
/neo430/trunk/neo430/rtl/core/neo430_top.vhd
46,7 → 46,7
-- # You should have received a copy of the GNU Lesser General Public License along with this #
-- # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
-- # ********************************************************************************************* #
-- # Stephan Nolting, Hannover, Germany 09.12.2019 #
-- # Stephan Nolting, Hannover, Germany 10.01.2020 #
-- #################################################################################################
 
library ieee;
98,7 → 98,7
spi_sclk_o : out std_ulogic; -- serial clock line
spi_mosi_o : out std_ulogic; -- serial data line out
spi_miso_i : in std_ulogic; -- serial data line in
spi_cs_o : out std_ulogic_vector(07 downto 0); -- SPI CS 0..7
spi_cs_o : out std_ulogic_vector(05 downto 0); -- SPI CS
twi_sda_io : inout std_logic; -- twi serial data line
twi_scl_io : inout std_logic; -- twi serial clock line
-- 32-bit wishbone interface --
/neo430/trunk/neo430/rtl/core/neo430_trng.vhd
7,13 → 7,17
-- # these latches are used as additional delay element. By using unique enable signals for each #
-- # latch, the synthesis tool cannot "optimize" one of the inverters out of the design. Further- #
-- # more, the latches prevent the synthesis tool from detecting combinatorial loops. #
-- # The output of the GARO is de-biased by a simple von Neuman random extractor and is further #
-- # post-processed by an 8-bit LFSR for improved whitening. #
-- # #
-- # Sources: #
-- # - GARO: "Enhancing the Randomness of a Combined True Random Number Generator Based on the #
-- # Ring Oscillator Sampling Method" by Mieczyslaw Jessa and Lukasz Matuszewski #
-- # - GARO: "Experimental Assessment of FIRO- and GARO-based Noise Sources for Digital TRNG #
-- # Designs on FPGAs" by Martin Schramm, Reiner Dojen and Michael Heigly, 2017 #
-- # - Latches for platform independence: "Extended Abstract: The Butterfly PUF Protecting IP #
-- # on every FPGA" by Sandeep S. Kumar, Jorge Guajardo, Roel Maesyz, Geert-Jan Schrijen and #
-- # Pim Tuyls, Philips Research Europe, 2008 #
-- # - Von Neumann De-Biasing: "Iterating Von Neumann’s Post-Processing under Hardware #
-- # Constraints" by Vladimir Rozic, Bohan Yang, Wim Dehaene and Ingrid Verbauwhede, 2016 #
-- # ********************************************************************************************* #
-- # This file is part of the NEO430 Processor project: https://github.com/stnolting/neo430 #
-- # Copyright by Stephan Nolting: stnolting@gmail.com #
33,7 → 37,7
-- # You should have received a copy of the GNU Lesser General Public License along with this #
-- # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
-- # ********************************************************************************************* #
-- # Stephan Nolting, Hannover, Germany 27.11.2019 #
-- # Stephan Nolting, Hannover, Germany 10.01.2020 #
-- #################################################################################################
 
library ieee;
57,15 → 61,17
 
architecture neo430_trng_rtl of neo430_trng is
 
-- user configuration --------------------------------------------------------------------------------
constant num_oscs_c : natural := 5; -- number of oscillators (default=5)
constant garo_taps_c : std_ulogic_vector(num_oscs_c-2 downto 0) := "0101"; -- GARO xor feedback select
constant use_lfsr_c : boolean := true; -- use LFSR for post-processing (default=true)
constant lfsr_taps_c : std_ulogic_vector(7 downto 0) := "10111000"; -- LFSR feedback taps
-- ---------------------------------------------------------------------------------------------------
-- advanced configuration ------------------------------------------------------------------------------------
constant num_inv_c : natural := 14; -- length of GARO inverter chain (default=14, max=14)
constant lfsr_taps_c : std_ulogic_vector(11 downto 0) := "100000101001"; -- Fibonacci LFSR feedback taps
-- -------------------------------------------------------------------------------------------------------
 
-- control register bits --
constant ctrl_rnd_en_c : natural := 15; -- -/w: TRNG enable
constant ctrl_taps_00_c : natural := 0; -- -/w: TAP 0 enable
-- ...
constant ctrl_taps_13_c : natural := 13; -- -/w: TAP 13 enable
constant ctrl_rnd_en_c : natural := 14; -- r/w: TRNG enable
constant ctrl_rnd_valid_c : natural := 15; -- r/-: Output byte valid
 
-- IO space: module base address --
constant hi_abb_c : natural := index_size_f(io_size_c)-1; -- high address boundary bit
77,15 → 83,22
signal rden : std_ulogic; -- read enable
 
-- random number generator --
signal rnd_inv : std_ulogic_vector(num_oscs_c-1 downto 0); -- inverter chain
signal rnd_enable_sreg : std_ulogic_vector(num_oscs_c-1 downto 0); -- enable shift register
signal rnd_inv : std_ulogic_vector(num_inv_c-1 downto 0); -- inverter chain
signal rnd_enable_sreg : std_ulogic_vector(num_inv_c-1 downto 0); -- enable shift register
signal rnd_enable : std_ulogic;
signal rnd_sync0 : std_ulogic;
signal rnd_sync1 : std_ulogic;
signal rnd_sreg : std_ulogic_vector(7 downto 0); -- sample shift reg
signal rnd_cnt : std_ulogic_vector(2 downto 0);
signal rnd_data : std_ulogic_vector(7 downto 0); -- random data register (read-only)
signal tap_config : std_ulogic_vector(13 downto 0);
signal rnd_sync : std_ulogic_vector(2 downto 0); -- metastability filter & de-biasing
signal ready_ff : std_ulogic; -- new random data available
signal rnd_sreg : std_ulogic_vector(11 downto 0); -- sample shift reg
signal rnd_cnt : std_ulogic_vector(3 downto 0);
signal new_sample : std_ulogic; -- new output byte ready
signal rnd_data : std_ulogic_vector(11 downto 0); -- random data register (read-only)
 
-- Randomness extractor (von Neumann De-Biasing) --
signal db_state : std_ulogic;
signal db_enable : std_ulogic; -- valid data from de-biasing
signal db_data : std_ulogic; -- actual data from de-biasing
 
begin
 
-- Access Control -----------------------------------------------------------
100,14 → 113,10
wr_access: process(clk_i)
begin
if rising_edge(clk_i) then
-- write access --
if (wren = '1') then
rnd_enable <= data_i(ctrl_rnd_en_c);
tap_config(13 downto 0) <= data_i(ctrl_taps_13_c downto ctrl_taps_00_c);
end if;
-- using individual enable signals for each inverter - derived from a shift register - to prevent the synthesis tool
-- from removing all but one inverter (since they implement "logical identical functions")
-- this also allows to make the trng platform independent
rnd_enable_sreg <= rnd_enable_sreg(num_oscs_c-2 downto 0) & rnd_enable; -- activate right most inverter first
end if;
end process wr_access;
 
114,20 → 123,23
 
-- True Random Generator ----------------------------------------------------
-- -----------------------------------------------------------------------------
entropy_source: process(rnd_enable_sreg, rnd_enable, rnd_inv)
entropy_source: process(rnd_enable_sreg, rnd_enable, rnd_inv, tap_config)
begin
for i in 0 to num_oscs_c-1 loop
for i in 0 to num_inv_c-1 loop
if (rnd_enable = '0') then -- start with a defined state (latch reset)
rnd_inv(i) <= '0';
-- use latches to decouple the inverters
-- by this, the synthesis tool does not complain about combinatorial loops
elsif (rnd_enable_sreg(i) = '1') then -- uniquely enable latches to prevent synthesis from removing chain elements
-- uniquely enable latches to prevent synthesis from removing chain elements
elsif (rnd_enable_sreg(i) = '1') then -- latch enable
-- here we have the inverter chain --
if (i = num_oscs_c-1) then -- left most inverter?
rnd_inv(i) <= not rnd_inv(0); -- direct input of right most inverter (= output signal)
if (i = num_inv_c-1) then -- left most inverter?
if (tap_config(i) = '1') then
rnd_inv(i) <= not rnd_inv(0); -- direct input of right most inverter (= output signal)
else
rnd_inv(i) <= '0';
end if;
else
if (garo_taps_c(i) = '1') then
rnd_inv(i) <= (not rnd_inv(i+1)) xor rnd_inv(0); -- use final output as feedback
if (tap_config(i) = '1') then
rnd_inv(i) <= not (rnd_inv(i+1) xor rnd_inv(0)); -- use final output as feedback
else
rnd_inv(i) <= not rnd_inv(i+1); -- normal chain: use previous inverter's output as input
end if;
136,35 → 148,73
end loop; -- i
end process entropy_source;
 
-- unique enable signals for each inverter latch --
inv_enable: process(clk_i)
begin
if rising_edge(clk_i) then
-- using individual enable signals for each inverter - derived from a shift register - to prevent the synthesis tool
-- from removing all but one inverter (since they implement "logical identical functions")
-- this also allows to make the trng platform independent
rnd_enable_sreg <= rnd_enable_sreg(num_inv_c-2 downto 0) & rnd_enable; -- activate right most inverter first
end if;
end process inv_enable;
 
-- Random Data Shift Register -----------------------------------------------
 
-- Processing Core ----------------------------------------------------------
-- -----------------------------------------------------------------------------
data_sreg: process(clk_i)
processing_core: process(clk_i)
begin
if rising_edge(clk_i) then
-- synchronize output of oscillator chain --
rnd_sync0 <= rnd_inv(0);
rnd_sync1 <= rnd_sync0; -- no more metastability
-- sample random data --
-- synchronize output of GARO --
rnd_sync <= rnd_sync(1 downto 0) & rnd_inv(0); -- no more metastability
 
-- von Neumann De-Biasing state --
db_state <= (not db_state) and rnd_enable; -- just toggle -> process in every second cycle
 
-- sample random data & post-processing --
if (rnd_enable = '0') then
rnd_cnt <= (others => '0');
rnd_sreg <= (others => '0');
else
rnd_cnt <= std_ulogic_vector(unsigned(rnd_cnt) + 1);
if (use_lfsr_c = true) then -- use LFSR for post-processing
rnd_sreg <= rnd_sreg(6 downto 0) & (xor_all_f(rnd_sreg and lfsr_taps_c) xor rnd_sync1);
else -- no post-processing
rnd_sreg <= rnd_sreg(6 downto 0) & rnd_sync1;
elsif (db_enable = '1') then -- valid de-biased output?
if (rnd_cnt = "1010") then
rnd_cnt <= (others => '0');
else
rnd_cnt <= std_ulogic_vector(unsigned(rnd_cnt) + 1);
end if;
rnd_sreg <= rnd_sreg(10 downto 0) & (xor_all_f(rnd_sreg and lfsr_taps_c) xor db_data); -- LFSR post-processing
end if;
-- sample final output byte --
if (rnd_cnt = "000") and (rnd_enable = '1') then
 
-- data output register --
if (new_sample = '1') then
rnd_data <= rnd_sreg;
end if;
 
-- data ready flag --
if (rnd_enable = '0') or (rden = '1') then -- clear when deactivated or on data read
ready_ff <= '0';
elsif (new_sample = '1') then
ready_ff <= '1';
end if;
end if;
end process data_sreg;
end process processing_core;
 
-- John von Neumann De-Biasing --
debiasing: process(db_state, rnd_sync)
variable tmp_v : std_ulogic_vector(2 downto 0);
begin
-- check groups of two non-overlapping bits from the input stream
tmp_v := db_state & rnd_sync(2 downto 1);
case tmp_v is
when "101" => db_enable <= '1'; db_data <= '1'; -- rising edge -> '1'
when "110" => db_enable <= '1'; db_data <= '0'; -- falling edge -> '0'
when others => db_enable <= '0'; db_data <= '-'; -- invalid
end case;
end process debiasing;
 
-- new valid byte available? --
new_sample <= '1' when (rnd_cnt = "1010") and (rnd_enable = '1') and (db_enable = '1') else '0';
 
 
-- Read access --------------------------------------------------------------
-- -----------------------------------------------------------------------------
rd_access: process(clk_i)
172,8 → 222,9
if rising_edge(clk_i) then
data_o <= (others => '0');
if (rden = '1') then
data_o(7 downto 0) <= rnd_data;
data_o(ctrl_rnd_en_c) <= rnd_enable;
data_o(11 downto 0) <= rnd_data;
data_o(ctrl_rnd_en_c) <= rnd_enable;
data_o(ctrl_rnd_valid_c) <= ready_ff;
end if;
end if;
end process rd_access;
/neo430/trunk/neo430/rtl/core/neo430_uart.vhd
22,7 → 22,7
-- # You should have received a copy of the GNU Lesser General Public License along with this #
-- # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
-- # ********************************************************************************************* #
-- # Stephan Nolting, Hannover, Germany 17.11.2018 #
-- # Stephan Nolting, Hannover, Germany 18.12.2019 #
-- #################################################################################################
 
library ieee;
73,7 → 73,7
constant ctrl_uart_prsc0_c : natural := 8; -- r/w: UART baud prsc bit 0
constant ctrl_uart_prsc1_c : natural := 9; -- r/w: UART baud prsc bit 1
constant ctrl_uart_prsc2_c : natural := 10; -- r/w: UART baud prsc bit 2
-- ...
constant ctrl_uart_rxovr_c : natural := 11; -- r/-: UART RX overrun
constant ctrl_uart_en_c : natural := 12; -- r/w: UART enable
constant ctrl_uart_rx_irq_c : natural := 13; -- r/w: UART rx done interrupt enable
constant ctrl_uart_tx_irq_c : natural := 14; -- r/w: UART tx done interrupt enable
94,19 → 94,19
-- uart tx unit --
signal uart_tx_busy : std_ulogic;
signal uart_tx_done : std_ulogic;
signal uart_tx_bitcnt : std_ulogic_vector(03 downto 0);
signal uart_tx_sreg : std_ulogic_vector(09 downto 0);
signal uart_tx_baud_cnt : std_ulogic_vector(07 downto 0);
signal uart_tx_bitcnt : std_ulogic_vector(3 downto 0);
signal uart_tx_sreg : std_ulogic_vector(9 downto 0);
signal uart_tx_baud_cnt : std_ulogic_vector(7 downto 0);
 
-- uart rx unit --
signal uart_rx_sync : std_ulogic_vector(04 downto 0);
signal uart_rx_avail : std_ulogic;
signal uart_rx_sync : std_ulogic_vector(4 downto 0);
signal uart_rx_avail : std_ulogic_vector(1 downto 0);
signal uart_rx_busy : std_ulogic;
signal uart_rx_busy_ff : std_ulogic;
signal uart_rx_bitcnt : std_ulogic_vector(03 downto 0);
signal uart_rx_sreg : std_ulogic_vector(08 downto 0);
signal uart_rx_reg : std_ulogic_vector(07 downto 0);
signal uart_rx_baud_cnt : std_ulogic_vector(07 downto 0);
signal uart_rx_bitcnt : std_ulogic_vector(3 downto 0);
signal uart_rx_sreg : std_ulogic_vector(8 downto 0);
signal uart_rx_reg : std_ulogic_vector(7 downto 0);
signal uart_rx_baud_cnt : std_ulogic_vector(7 downto 0);
 
begin
 
207,10 → 207,10
 
-- RX available flag --
uart_rx_busy_ff <= uart_rx_busy;
if (ctrl(ctrl_uart_en_c) = '0') or ((uart_rx_avail = '1') and (rd_en = '1') and (addr = uart_rtx_addr_c)) then
uart_rx_avail <= '0';
if (ctrl(ctrl_uart_en_c) = '0') or (((uart_rx_avail(0) = '1') or (uart_rx_avail(1) = '1')) and (rd_en = '1') and (addr = uart_rtx_addr_c)) then
uart_rx_avail <= "00";
elsif (uart_rx_busy_ff = '1') and (uart_rx_busy = '0') then
uart_rx_avail <= '1';
uart_rx_avail <= uart_rx_avail(0) & '1';
end if;
end if;
end process uart_rx_unit;
244,9 → 244,10
data_o(ctrl_uart_en_c) <= ctrl(ctrl_uart_en_c);
data_o(ctrl_uart_rx_irq_c) <= ctrl(ctrl_uart_rx_irq_c);
data_o(ctrl_uart_tx_irq_c) <= ctrl(ctrl_uart_tx_irq_c);
data_o(ctrl_uart_rxovr_c) <= uart_rx_avail(0) and uart_rx_avail(1);
data_o(ctrl_uart_tx_busy_c) <= uart_tx_busy;
else -- uart_rtx_addr_c
data_o(data_rx_avail_c) <= uart_rx_avail;
data_o(data_rx_avail_c) <= uart_rx_avail(0);
data_o(07 downto 0) <= uart_rx_reg;
end if;
end if;
/neo430/trunk/neo430/rtl/core/neo430_wdt.vhd
25,7 → 25,7
-- # You should have received a copy of the GNU Lesser General Public License along with this #
-- # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
-- # ********************************************************************************************* #
-- # Stephan Nolting, Hannover, Germany 27.11.2019 #
-- # Stephan Nolting, Hannover, Germany 15.01.2020 #
-- #################################################################################################
 
library ieee;
102,23 → 102,25
 
-- Write Access, Reset Generator --------------------------------------------
-- -----------------------------------------------------------------------------
wdt_core: process(rst_i, rst_sync(1), clk_i)
wdt_core: process(clk_i)
begin
if (rst_i = '0') or (rst_sync(1) = '0') then -- external or internal reset
enable <= '0'; -- disable WDT
clk_sel <= (others => '1'); -- slowest clock rst_source
rst_gen <= (others => '1'); -- do NOT fire on reset!
elsif rising_edge(clk_i) then
-- control register write access --
if (wren = '1') then -- allow write if password is correct
enable <= data_i(ctrl_enable_c);
clk_sel <= data_i(ctrl_clksel2_c downto ctrl_clksel0_c);
end if;
-- reset generator - enabled and (overflow or unauthorized access)? --
if (enable = '1') and ((cnt(cnt'left) = '1') or (fail_ff = '1')) then
rst_gen <= (others => '0');
if rising_edge(clk_i) then
if (rst_i = '0') or (rst_sync(1) = '0') then -- external or internal reset
enable <= '0'; -- disable WDT
clk_sel <= (others => '1'); -- slowest clock rst_source
rst_gen <= (others => '1'); -- do NOT fire on reset!
else
rst_gen <= rst_gen(rst_gen'left-1 downto 0) & '1';
-- control register write access --
if (wren = '1') then -- allow write if password is correct
enable <= data_i(ctrl_enable_c);
clk_sel <= data_i(ctrl_clksel2_c downto ctrl_clksel0_c);
end if;
-- reset generator - enabled and (overflow or unauthorized access)? --
if (enable = '1') and ((cnt(cnt'left) = '1') or (fail_ff = '1')) then
rst_gen <= (others => '0');
else
rst_gen <= rst_gen(rst_gen'left-1 downto 0) & '1';
end if;
end if;
end if;
end process wdt_core;
/neo430/trunk/neo430/rtl/top_templates/neo430_test.vhd
23,7 → 23,7
-- # You should have received a copy of the GNU Lesser General Public License along with this #
-- # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
-- # ********************************************************************************************* #
-- # Stephan Nolting, Hannover, Germany 28.11.2019 #
-- # Stephan Nolting, Hannover, Germany 10.01.2020 #
-- #################################################################################################
 
library ieee;
99,7 → 99,7
spi_sclk_o => open, -- serial clock line
spi_mosi_o => open, -- serial data line out
spi_miso_i => '0', -- serial data line in
spi_cs_o => open, -- SPI CS 0..7
spi_cs_o => open, -- SPI CS
twi_sda_io => twi_sda, -- twi serial data line
twi_scl_io => twi_scl, -- twi serial clock line
-- 32-bit wishbone interface --
/neo430/trunk/neo430/rtl/top_templates/neo430_top_avm.vhd
19,7 → 19,7
-- # You should have received a copy of the GNU Lesser General Public License along with this #
-- # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
-- # ********************************************************************************************* #
-- # Stephan Nolting, Hannover, Germany 28.11.2019 #
-- # Stephan Nolting, Hannover, Germany 10.01.2020 #
-- #################################################################################################
 
library ieee;
71,7 → 71,7
spi_sclk_o : out std_logic; -- serial clock line
spi_mosi_o : out std_logic; -- serial data line out
spi_miso_i : in std_logic; -- serial data line in
spi_cs_o : out std_logic_vector(07 downto 0); -- SPI CS 0..7
spi_cs_o : out std_logic_vector(05 downto 0); -- SPI CS
twi_sda_io : inout std_logic; -- twi serial data line
twi_scl_io : inout std_logic; -- twi serial clock line
-- external interrupts --
127,7 → 127,7
signal spi_sclk_o_int : std_ulogic;
signal spi_mosi_o_int : std_ulogic;
signal spi_miso_i_int : std_ulogic;
signal spi_cs_o_int : std_ulogic_vector(07 downto 0);
signal spi_cs_o_int : std_ulogic_vector(05 downto 0);
signal irq_i_int : std_ulogic_vector(07 downto 0);
signal irq_ack_o_int : std_ulogic_vector(07 downto 0);
constant usrcode_c : std_ulogic_vector(15 downto 0) := std_ulogic_vector(USER_CODE);
180,7 → 180,7
spi_sclk_o => spi_sclk_o_int, -- serial clock line
spi_mosi_o => spi_mosi_o_int, -- serial data line out
spi_miso_i => spi_miso_i_int, -- serial data line in
spi_cs_o => spi_cs_o_int, -- SPI CS 0..7
spi_cs_o => spi_cs_o_int, -- SPI CS
twi_sda_io => twi_sda_io, -- twi serial data line
twi_scl_io => twi_scl_io, -- twi serial clock line
-- 32-bit wishbone interface --
/neo430/trunk/neo430/rtl/top_templates/neo430_top_axi4lite.vhd
19,7 → 19,7
-- # You should have received a copy of the GNU Lesser General Public License along with this #
-- # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
-- # ********************************************************************************************* #
-- # Stephan Nolting, Hannover, Germany 28.11.2019 #
-- # Stephan Nolting, Hannover, Germany 10.01.2020 #
-- #################################################################################################
 
library ieee;
68,7 → 68,7
spi_sclk_o : out std_logic; -- serial clock line
spi_mosi_o : out std_logic; -- serial data line out
spi_miso_i : in std_logic; -- serial data line in
spi_cs_o : out std_logic_vector(07 downto 0); -- SPI CS 0..7
spi_cs_o : out std_logic_vector(05 downto 0); -- SPI CS
twi_sda_io : inout std_logic; -- twi serial data line
twi_scl_io : inout std_logic; -- twi serial clock line
-- external interrupts --
129,7 → 129,7
signal spi_sclk_o_int : std_ulogic;
signal spi_mosi_o_int : std_ulogic;
signal spi_miso_i_int : std_ulogic;
signal spi_cs_o_int : std_ulogic_vector(07 downto 0);
signal spi_cs_o_int : std_ulogic_vector(05 downto 0);
signal irq_i_int : std_ulogic_vector(07 downto 0);
signal irq_ack_o_int : std_ulogic_vector(07 downto 0);
constant usrcode_c : std_ulogic_vector(15 downto 0) := std_ulogic_vector(USER_CODE);
187,7 → 187,7
spi_sclk_o => spi_sclk_o_int, -- serial clock line
spi_mosi_o => spi_mosi_o_int, -- serial data line out
spi_miso_i => spi_miso_i_int, -- serial data line in
spi_cs_o => spi_cs_o_int, -- SPI CS 0..7
spi_cs_o => spi_cs_o_int, -- SPI CS
twi_sda_io => twi_sda_io, -- twi serial data line
twi_scl_io => twi_scl_io, -- twi serial clock line
-- 32-bit wishbone interface --
/neo430/trunk/neo430/rtl/top_templates/neo430_top_std_logic.vhd
19,7 → 19,7
-- # You should have received a copy of the GNU Lesser General Public License along with this #
-- # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
-- # ********************************************************************************************* #
-- # Stephan Nolting, Hannover, Germany 28.11.2019 #
-- # Stephan Nolting, Hannover, Germany 10.01.2020 #
-- #################################################################################################
 
library ieee;
70,7 → 70,7
spi_sclk_o : out std_logic; -- serial clock line
spi_mosi_o : out std_logic; -- serial data line out
spi_miso_i : in std_logic; -- serial data line in
spi_cs_o : out std_logic_vector(07 downto 0); -- SPI CS 0..7
spi_cs_o : out std_logic_vector(05 downto 0); -- SPI CS
twi_sda_io : inout std_logic; -- twi serial data line
twi_scl_io : inout std_logic; -- twi serial clock line
-- 32-bit wishbone interface --
102,7 → 102,7
signal spi_sclk_o_int : std_ulogic;
signal spi_mosi_o_int : std_ulogic;
signal spi_miso_i_int : std_ulogic;
signal spi_cs_o_int : std_ulogic_vector(07 downto 0);
signal spi_cs_o_int : std_ulogic_vector(05 downto 0);
signal irq_i_int : std_ulogic_vector(07 downto 0);
signal irq_ack_o_int : std_ulogic_vector(07 downto 0);
signal wb_adr_o_int : std_ulogic_vector(31 downto 0);
/neo430/trunk/neo430/sim/neo430_tb.vhd
22,7 → 22,7
-- # You should have received a copy of the GNU Lesser General Public License along with this #
-- # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
-- # ********************************************************************************************* #
-- # Stephan Nolting, Hannover, Germany 28.11.2019 #
-- # Stephan Nolting, Hannover, Germany 10.01.2020 #
-- #################################################################################################
 
library ieee;
124,7 → 124,7
pwm_o => open, -- pwm channels
-- serial com --
uart_txd_o => uart_txd, -- UART send data
uart_rxd_i => '0', -- UART receive data
uart_rxd_i => uart_txd, -- UART receive data
spi_sclk_o => open, -- serial clock line
spi_mosi_o => spi_data, -- serial data line out
spi_miso_i => spi_data, -- serial data line in
/neo430/trunk/neo430/sw/bootloader/bootloader.c
29,7 → 29,7
// # You should have received a copy of the GNU Lesser General Public License along with this #
// # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
// # ********************************************************************************************* #
// # Stephan Nolting, Hannover, Germany 10.12.2019 #
// # Stephan Nolting, Hannover, Germany 17.01.2020 #
// #################################################################################################
 
// Libraries
36,10 → 36,6
#include <stdint.h>
#include <neo430.h>
 
// Macros
#define xstr(a) str(a)
#define str(a) #a
 
// Configuration
#define BAUD_RATE 19200 // default UART baud rate
#define AUTOBOOT_TIMEOUT 8 // countdown (seconds) to auto boot
71,8 → 67,14
// Scratch registers - abuse unused IRQ vectors for this ;)
#define TIMEOUT_CNT IRQVEC_GPIO
 
// Macros
#define xstr(a) str(a)
#define str(a) #a
#define BOOT_EEP_EN {SPI_CT |= 1 << (BOOT_EEP_CS+SPI_CT_CS_SEL0);}
 
// Function prototypes
void __attribute__((__interrupt__)) timer_irq_handler(void);
void __attribute__((__interrupt__)) dummy_irq_handler(void);
void __attribute__((__naked__)) start_app(void);
void print_help(void);
void core_dump(void);
119,8 → 121,9
// disable EXIRQ
EXIRQ_CT = 0;
 
// init timer interrupt vector
// init interrupt vectors
IRQVEC_TIMER = (uint16_t)(&timer_irq_handler); // timer match
IRQVEC_EXT = (uint16_t)(&dummy_irq_handler); // dummy handler in case an external IRQ occurs
 
// init GPIO
GPIO_IRQMASK = 0; // no pin change interrupt please, thanks
132,7 → 135,7
neo430_uart_char_read(); // clear UART RX buffer
 
// set SPI config:
// enable SPI, no IRQs, MSB first, SPI clock mode 0, 1/128 SPI speed, disable all 6 SPI CS lines (set high)
// enable SPI, no IRQs, MSB first, 8-bit mode, SPI clock mode 0, set SPI speed, disable all 6 SPI CS lines (set high)
neo430_spi_enable(SPI_PRSC_64); // this also resets the SPI module
neo430_spi_trans(0); // clear SPI RTX buffer
 
215,7 → 218,7
else if (c == 's') // start program in RAM
start_app();
else if (c == 'c')
neo430_uart_br_print("By Stephan Nolting");
neo430_uart_br_print("By Stephan Nolting\nMade in Hannover, Germany");
else // unknown command
neo430_uart_br_print("Bad CMD!");
}
233,6 → 236,15
 
 
/* ------------------------------------------------------------
* INFO Dummy IRQ handler
* ------------------------------------------------------------ */
void __attribute__((__interrupt__)) dummy_irq_handler(void) {
 
asm volatile ("nop");
}
 
 
/* ------------------------------------------------------------
* INFO Start application in IMEM
* INFO "naked" since this is final...
* ------------------------------------------------------------ */
308,17 → 320,17
 
neo430_uart_br_print("\nWriting... ");
 
neo430_spi_cs_en(BOOT_EEP_CS);
BOOT_EEP_EN;
neo430_spi_trans(EEP_WREN); // write enable
neo430_spi_cs_dis();
 
// check if eeprom ready (or available at all)
neo430_spi_cs_en(BOOT_EEP_CS);
BOOT_EEP_EN;
neo430_spi_trans(EEP_RDSR); // read status register CMD
uint8_t b = neo430_spi_trans(0x00); // read status register data
uint16_t b = neo430_spi_trans(0); // read status register data
neo430_spi_cs_dis();
 
if ((b & 0x8F) != 0x02)
if ((b & 0x008F) != 0x0002)
system_error(ERROR_EEPROM);
 
// write EXE signature
369,25 → 381,25
* ------------------------------------------------------------ */
void spi_eeprom_write_byte(uint16_t a, uint8_t b) {
 
neo430_spi_cs_en(BOOT_EEP_CS);
BOOT_EEP_EN;
neo430_spi_trans(EEP_WREN); // write enable
neo430_spi_cs_dis();
 
neo430_spi_cs_en(BOOT_EEP_CS);
BOOT_EEP_EN;
neo430_spi_trans(EEP_WRITE); // byte write instruction
neo430_spi_trans((uint8_t)(a >> 8));
neo430_spi_trans((uint8_t)(a >> 0));
neo430_spi_trans(b);
neo430_spi_trans(neo430_bswap(a)); // was ">> 8"
neo430_spi_trans(a >> 0);
neo430_spi_trans((uint16_t)b);
neo430_spi_cs_dis();
 
// wait for write to finish
while(1) {
neo430_spi_cs_en(BOOT_EEP_CS);
BOOT_EEP_EN;
neo430_spi_trans(EEP_RDSR); // read status register CMD
uint8_t s = neo430_spi_trans(0x00);
uint16_t s = neo430_spi_trans(0);
neo430_spi_cs_dis();
 
if ((s & 0x01) == 0) { // check WIP flag
if ((s & 0x0001) == 0) { // check WIP flag
break; // done!
}
}
401,11 → 413,11
* ------------------------------------------------------------ */
uint8_t spi_eeprom_read_byte(uint16_t a) {
 
neo430_spi_cs_en(BOOT_EEP_CS);
BOOT_EEP_EN;
neo430_spi_trans(EEP_READ); // byte read instruction
neo430_spi_trans((uint8_t)(a >> 8));
neo430_spi_trans((uint8_t)(a >> 0));
uint8_t d = neo430_spi_trans(0);
neo430_spi_trans(neo430_bswap(a)); // was ">> 8"
neo430_spi_trans(a >> 0);
uint8_t d = (uint8_t)neo430_spi_trans(0);
neo430_spi_cs_dis();
 
return d;
419,18 → 431,7
* ------------------------------------------------------------ */
uint8_t twi_eeprom_read_byte(uint16_t a) {
 
uint8_t twi_err = neo430_twi_start_trans(TWI_BOOT_EEP_ADDR_READ);
twi_err |= neo430_twi_trans((uint8_t)(a >> 8));
twi_err |= neo430_twi_trans((uint8_t)(a >> 0));
twi_err |= !neo430_twi_trans(0xFF); // read data
uint8_t d = neo430_twi_get_data();
neo430_twi_generate_stop();
 
//if (twi_err) {
//
//}
 
return d;
return 0;
}
 
 
/neo430/trunk/neo430/sw/example/game_of_life/main.c
31,6 → 31,7
#define NUM_CELLS_X 160 // must be a multiple of 8
#define NUM_CELLS_Y 40
#define BAUD_RATE 19200
#define UNI_DELAY 500 // delay between iterations in ms
 
// Global variables
uint8_t universe[2][NUM_CELLS_X/8][NUM_CELLS_Y];
112,7 → 113,7
generation++;
 
// wait 500ms
neo430_cpu_delay_ms(500);
neo430_cpu_delay_ms(UNI_DELAY);
}
 
return 0;
/neo430/trunk/neo430/sw/example/hw_analysis/main.c
67,21 → 67,7
neo430_printf("DMEM/RAM: %u bytes @ 0x%x\n", DMEM_SIZE, DMEM_ADDR_BASE);
 
// UART baud rate
uint16_t baud = UART_CT & 0x00FF;
uint16_t prsc;
switch ((UART_CT >> 8) & 0x0007) {
case 0: prsc = 2; break;
case 1: prsc = 4; break;
case 2: prsc = 8; break;
case 3: prsc = 64; break;
case 4: prsc = 128; break;
case 5: prsc = 1024; break;
case 6: prsc = 2048; break;
case 7: prsc = 4096; break;
default: prsc = 0; break;
}
uint32_t baud_value = clock / (uint32_t)(prsc * baud);
neo430_printf("UART Baud rate: %n\n", baud_value);
neo430_printf("UART Baud rate: %n\n", neo430_uart_get_baudrate());
 
 
// System features
/neo430/trunk/neo430/sw/example/trng_test/main.c
19,7 → 19,7
// # You should have received a copy of the GNU Lesser General Public License along with this #
// # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
// # ********************************************************************************************* #
// # Stephan Nolting, Hannover, Germany 27.11.2019 #
// # Stephan Nolting, Hannover, Germany 09.01.2020 #
// #################################################################################################
 
 
28,8 → 28,9
#include <neo430.h>
 
// Configuration
#define BAUD_RATE 19200
#define NUM_SAMPLES 2000000000
#define BAUD_RATE 19200
#define NUM_SAMPLES 2000000000
#define TRNG_TAP_MASK 0b01010001000000
 
// Global variables
uint32_t rnd_hist[256];
52,9 → 53,29
return 1;
}
 
// start TRNG
neo430_trng_enable();
// reset & start TRNG
uint8_t rnd_data = 0;
uint16_t rnd_status = 0;
neo430_trng_enable(TRNG_TAP_MASK);
 
// make sure TRNG is running
int k;
for(k=0; k<1024; k++){
rnd_status = neo430_trng_get(&rnd_data);
if (rnd_status) {
neo430_trng_disable();
neo430_cpu_delay(100);
neo430_trng_enable(TRNG_TAP_MASK); // reset TRNG
}
else {
break;
}
if (k == 1000) {
neo430_printf("\nTRNG calibration error!\n");
return 0;
}
}
 
while(1) {
 
// main menu
72,7 → 93,12
if (cmd == 'a') {
uint32_t num_samples = 0;
while(1) {
neo430_printf("%u ", (uint16_t)neo430_trng_get());
rnd_status = neo430_trng_get(&rnd_data);
if (rnd_status) {
neo430_printf("\nTRNG error!\n");
break;
}
neo430_printf("%u ", (uint16_t)rnd_data);
num_samples++;
if (neo430_uart_char_received()) { // abort when key pressed
neo430_printf("\nNumber of samples: %n\n", num_samples);
93,7 → 119,12
neo430_printf("Sampling data (%n samples). This may take some time...\n", (uint32_t)NUM_SAMPLES);
uint32_t j;
for (j=0; j<NUM_SAMPLES; j++) {
uint8_t rnd_data = neo430_trng_get();
rnd_status = neo430_trng_get(&rnd_data);
if (rnd_status
) {
neo430_printf("\nTRNG error!\n");
break;
}
rnd_hist[rnd_data]++;
}
 
/neo430/trunk/neo430/sw/lib/neo430/include/neo430.h
23,7 → 23,7
// # You should have received a copy of the GNU Lesser General Public License along with this #
// # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
// # ********************************************************************************************* #
// # Stephan Nolting, Hannover, Germany 10.12.2019 #
// # Stephan Nolting, Hannover, Germany 10.01.2020 #
// #################################################################################################
 
#ifndef neo430_h
134,7 → 134,7
#define UART_CT_PRSC0 8 // r/w: baud presclaer bit 0
#define UART_CT_PRSC1 9 // r/w: baud presclaer bit 1
#define UART_CT_PRSC2 10 // r/w: baud presclaer bit 2
 
#define UART_CT_RXOR 11 // r/-: RX data overrun
#define UART_CT_EN 12 // r/w: UART enable
#define UART_CT_RX_IRQ 13 // r/w: Rx done interrupt enable
#define UART_CT_TX_IRQ 14 // r/w: Tx done interrupt enable
161,18 → 161,21
#define SPI_RTX (*(REG16 0xFFA6)) // r/w: receive/transmit register
 
// SPI control register
#define SPI_CT_EN 0 // r/w: spi enable
#define SPI_CT_CPHA 1 // r/w: spi clock phase (idle polarity = '0')
#define SPI_CT_IRQ 2 // r/w: spi transmission done interrupt enable
#define SPI_CT_PRSC0 3 // r/w: spi clock prescaler select bit 0
#define SPI_CT_PRSC1 4 // r/w: spi clock prescaler select bit 1
#define SPI_CT_PRSC2 5 // r/w: spi clock prescaler select bit 2
#define SPI_CT_CS_SEL0 6 // r/w: spi CS select 0
#define SPI_CT_CS_SEL1 7 // r/w: spi CS select 1
#define SPI_CT_CS_SEL2 8 // r/w: spi CS select 2
#define SPI_CT_CS_SET 9 // r/w: selected CS becomes active ('0') when set
#define SPI_CT_DIR 10 // r/w: shift direction (0: MSB first, 1: LSB first)
 
#define SPI_CT_CS_SEL0 0 // r/w: spi CS 0
#define SPI_CT_CS_SEL1 1 // r/w: spi CS 1
#define SPI_CT_CS_SEL2 2 // r/w: spi CS 2
#define SPI_CT_CS_SEL3 3 // r/w: spi CS 3
#define SPI_CT_CS_SEL4 4 // r/w: spi CS 4
#define SPI_CT_CS_SEL5 5 // r/w: spi CS 5
#define SPI_CT_EN 6 // r/w: spi enable
#define SPI_CT_CPHA 7 // r/w: spi clock phase (idle polarity = '0')
#define SPI_CT_IRQ 8 // r/w: spi transmission done interrupt enable
#define SPI_CT_PRSC0 9 // r/w: spi clock prescaler select bit 0
#define SPI_CT_PRSC1 10 // r/w: spi clock prescaler select bit 1
#define SPI_CT_PRSC2 11 // r/w: spi clock prescaler select bit 2
#define SPI_CT_DIR 12 // r/w: shift direction (0: MSB first, 1: LSB first)
#define SPI_CT_SIZE 13 // r/w: 0 = 8-bit, 1 = 16-bit
// ...
#define SPI_CT_BUSY 15 // r/-: spi transceiver is busy
 
// clock prescalers
339,17 → 342,39
#define TRNG_CT (*(REG16 0xFFEC)) // r/w: control register
 
// TRNG control register
#define TRNG_CT_RND0 0 // r/-: TRNG random data byte bit 0
#define TRNG_CT_RND1 1 // r/-: TRNG random data byte bit 1
#define TRNG_CT_RND2 2 // r/-: TRNG random data byte bit 2
#define TRNG_CT_RND3 3 // r/-: TRNG random data byte bit 3
#define TRNG_CT_RND4 4 // r/-: TRNG random data byte bit 4
#define TRNG_CT_RND5 5 // r/-: TRNG random data byte bit 5
#define TRNG_CT_RND6 6 // r/-: TRNG random data byte bit 6
#define TRNG_CT_RND7 7 // r/-: TRNG random data byte bit 7
#define TRNG_CT_EN 15 // r/w: TRNG enable
#define TRNG_CT_DATA0 0 // r/-: TRNG random data byte bit 0
#define TRNG_CT_DATA1 1 // r/-: TRNG random data byte bit 1
#define TRNG_CT_DATA2 2 // r/-: TRNG random data byte bit 2
#define TRNG_CT_DATA3 3 // r/-: TRNG random data byte bit 3
#define TRNG_CT_DATA4 4 // r/-: TRNG random data byte bit 4
#define TRNG_CT_DATA5 5 // r/-: TRNG random data byte bit 5
#define TRNG_CT_DATA6 6 // r/-: TRNG random data byte bit 6
#define TRNG_CT_DATA7 7 // r/-: TRNG random data byte bit 7
#define TRNG_CT_DATA8 8 // r/-: TRNG random data byte bit 8
#define TRNG_CT_DATA9 9 // r/-: TRNG random data byte bit 9
#define TRNG_CT_DATA10 10 // r/-: TRNG random data byte bit 10
#define TRNG_CT_DATA11 11 // r/-: TRNG random data byte bit 11
// --
#define TRNG_CT_TAP00_EN 0 // -/w: Activate tap 0 switch
#define TRNG_CT_TAP01_EN 1 // -/w: Activate tap 1 switch
#define TRNG_CT_TAP02_EN 2 // -/w: Activate tap 2 switch
#define TRNG_CT_TAP03_EN 3 // -/w: Activate tap 3 switch
#define TRNG_CT_TAP04_EN 4 // -/w: Activate tap 4 switch
#define TRNG_CT_TAP05_EN 5 // -/w: Activate tap 5 switch
#define TRNG_CT_TAP06_EN 6 // -/w: Activate tap 6 switch
#define TRNG_CT_TAP07_EN 7 // -/w: Activate tap 7 switch
#define TRNG_CT_TAP08_EN 8 // -/w: Activate tap 8 switch
#define TRNG_CT_TAP09_EN 9 // -/w: Activate tap 9 switch
#define TRNG_CT_TAP10_EN 10 // -/w: Activate tap 10 switch
#define TRNG_CT_TAP11_EN 11 // -/w: Activate tap 11 switch
#define TRNG_CT_TAP12_EN 12 // -/w: Activate tap 12 switch
#define TRNG_CT_TAP13_EN 13 // -/w: Activate tap 13 switch
// --
#define TRNG_CT_EN 14 // r/w: TRNG enable
#define TRNG_CT_VALID 15 // r/-: TRNG output byte is valid
 
 
 
// ----------------------------------------------------------------------------
// External Interrupts Controller (EXIRQ)
// ----------------------------------------------------------------------------
/neo430/trunk/neo430/sw/lib/neo430/include/neo430_cpu.h
19,7 → 19,7
// # You should have received a copy of the GNU Lesser General Public License along with this #
// # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
// # ********************************************************************************************* #
// # Stephan Nolting, Hannover, Germany 21.11.2019 #
// # Stephan Nolting, Hannover, Germany 16.12.2019 #
// #################################################################################################
 
#ifndef neo430_cpu_h
26,26 → 26,30
#define neo430_cpu_h
 
// prototypes
void neo430_eint(void);
void neo430_dint(void);
uint16_t neo430_get_sp(void);
uint16_t neo430_get_sreg(void);
void neo430_set_sreg(uint16_t d);
uint16_t neo430_get_parity(uint16_t d);
void neo430_sleep(void);
void neo430_clear_irq_buffer(void);
void neo430_cpu_delay(uint16_t t);
void neo430_cpu_delay_ms(uint16_t ms);
void neo430_soft_reset(void);
void neo430_jump_address(uint16_t addr);
void neo430_call_address(uint16_t addr);
uint16_t neo430_bswap(uint16_t a);
uint16_t neo430_combine_bytes(uint8_t hi, uint8_t lo);
uint16_t neo430_dadd(uint16_t a, uint16_t b);
void neo430_memset(uint8_t *dst, uint8_t data, uint16_t num);
uint8_t neo430_memcmp(uint8_t *dst, uint8_t *src, uint16_t num);
void neo430_memcpy(uint8_t *dst, uint8_t *src, uint16_t num);
uint16_t neo430_bit_rev16(uint16_t x);
uint32_t neo430_xorshift32(void);
void neo430_eint(void); // enable global interrupts
void neo430_dint(void); // disable global interrupts
uint16_t neo430_get_sp(void); // get stack pointer
uint16_t neo430_get_sreg(void); // get status register
void neo430_set_sreg(uint16_t d); // set status register
uint16_t neo430_get_parity(uint16_t d); // get parity (EXTENDED ALU OPERATION!)
void neo430_sleep(void); // set CPU to sleep mode
void neo430_clear_irq_buffer(void); // clear pending IRQs
void neo430_cpu_delay(uint16_t t); // wait cycles
void neo430_cpu_delay_ms(uint16_t ms); // wait ms
void neo430_soft_reset(void); // perform soft reset
void neo430_jump_address(uint16_t addr); // jump to certain address
void neo430_call_address(uint16_t addr); // call certain address
uint16_t neo430_bswap(uint16_t a); // swap bytes in word
uint16_t neo430_combine_bytes(uint8_t hi, uint8_t lo); // combine two bytes into a single word
uint16_t neo430_dadd(uint16_t a, uint16_t b); // BCD addition (HAS TO BE ENABLED FOR SYNTHESIS!)
void neo430_memset(uint8_t *dst, uint8_t data, uint16_t num); // set num bytes in memory
uint8_t neo430_memcmp(uint8_t *dst, uint8_t *src, uint16_t num); // compare num bytes in memory
void neo430_memcpy(uint8_t *dst, uint8_t *src, uint16_t num); // copy num bytes from memory to memory
uint16_t neo430_bit_rev16(uint16_t x); // reverse bit order of word
uint16_t neo430_rotate_right_w(uint16_t x); // rotate right word by one bit
uint16_t neo430_rotate_left_w(uint16_t x); // rotate left word by one bit
uint8_t neo430_rotate_right_b(uint8_t x); // rotate right byte by one bit
uint8_t neo430_rotate_left_b(uint8_t x); // rotate left byte by one bit
uint32_t neo430_xorshift32(void); // simple PRNG
 
#endif // neo430_cpu_h
/neo430/trunk/neo430/sw/lib/neo430/include/neo430_spi.h
19,7 → 19,7
// # You should have received a copy of the GNU Lesser General Public License along with this #
// # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
// # ********************************************************************************************* #
// # Stephan Nolting, Hannover, Germany 04.10.2019 #
// # Stephan Nolting, Hannover, Germany 10.02.2020 #
// #################################################################################################
 
#ifndef neo430_spi_h
26,10 → 26,10
#define neo430_spi_h
 
// prototypes
void neo430_spi_enable(uint8_t prsc); // configure and activate SPI module
void neo430_spi_disable(void); // deactivate SPI module
void neo430_spi_cs_en(uint8_t cs); // activate slave
void neo430_spi_cs_dis(void); // deactivate all slaves
uint8_t neo430_spi_trans(uint8_t d); // RTX transfer
void neo430_spi_enable(uint8_t prsc); // configure speed and activate SPI module
void neo430_spi_disable(void); // deactivate SPI module
void neo430_spi_cs_en(uint8_t cs); // select slave
void neo430_spi_cs_dis(void); // deselect all slaves
uint16_t neo430_spi_trans(uint16_t d); // RTX transfer
 
#endif // neo430_spi_h
/neo430/trunk/neo430/sw/lib/neo430/include/neo430_timer.h
19,7 → 19,7
// # You should have received a copy of the GNU Lesser General Public License along with this #
// # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
// # ********************************************************************************************* #
// # Stephan Nolting, Hannover, Germany 10.12.2019 #
// # Stephan Nolting, Hannover, Germany 16.01.2020 #
// #################################################################################################
 
#ifndef neo430_timer_h
28,9 → 28,10
// prototypes
void neo430_timer_enable(void); // enable timer unit
void neo430_timer_disable(void); // disable timer unit
void neo430_timer_stop(void); // stop timer
void neo430_timer_reset(void); // reset timer
void neo430_timer_start(void); // start timer
void neo430_timer_stop(void); // stop timer
void neo430_timer_run(void); // run timer
void neo430_timer_pause(void); // pause timer
uint8_t neo430_timer_config_period(uint32_t f_timer); // configure (irq) frequency
 
#endif // neo430_timer_h
/neo430/trunk/neo430/sw/lib/neo430/include/neo430_trng.h
19,7 → 19,7
// # You should have received a copy of the GNU Lesser General Public License along with this #
// # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
// # ********************************************************************************************* #
// # Stephan Nolting, Hannover, Germany 21.11.2019 #
// # Stephan Nolting, Hannover, Germany 09.01.2020 #
// #################################################################################################
 
#ifndef neo430_trng_h
26,8 → 26,8
#define neo430_trng_h
 
// prototypes
void neo430_trng_enable(void);
void neo430_trng_disable(void);
uint8_t neo430_trng_get(void);
void neo430_trng_enable(uint16_t tap_mask); // set TRNG's tap mask and enable TRNG
void neo430_trng_disable(void); // disable TRNG
uint16_t neo430_trng_get(uint8_t *data); // read new random byte from TRNG and check if valid
 
#endif // neo430_trng_h
/neo430/trunk/neo430/sw/lib/neo430/include/neo430_uart.h
19,7 → 19,7
// # You should have received a copy of the GNU Lesser General Public License along with this #
// # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
// # ********************************************************************************************* #
// # Stephan Nolting, Hannover, Germany 27.11.2019 #
// # Stephan Nolting, Hannover, Germany 17.01.2020 #
// #################################################################################################
 
#ifndef neo430_uart_h
30,6 → 30,8
 
// prototypes
void neo430_uart_setup(uint32_t baudrate); // activate and configure UART
void neo430_uart_disable(void); // deactivate uart
uint32_t neo430_uart_get_baudrate(void); // compute actual baudrate using UART's current configuration
void neo430_uart_putc(char c); // send single char
char neo430_uart_getc(void); // wait and read single char
uint16_t neo430_uart_char_received(void); // test if a char has been received
44,7 → 46,7
void neo430_uart_print_bin_byte(uint8_t b); // print byte in binary form
void neo430_uart_print_bin_word(uint16_t w); // print word in binary form
void neo430_uart_print_bin_dword(uint32_t dw); // print double word in binary form
void neo430_itoa(uint32_t x, const uint16_t leading_zeros); // convert double word to decimal number
void neo430_itoa(uint32_t x, const uint16_t leading_zeros, char *res); // convert double word to decimal number
void neo430_printf(char *format, ...); // print format string
void neo430_fp_print(int32_t num, const uint16_t fp); // print fixed point number
uint32_t neo430_hexstr_to_uint(char *buffer, uint8_t length); // convert hex string to number
/neo430/trunk/neo430/sw/lib/neo430/source/neo430_cpu.c
19,7 → 19,7
// # You should have received a copy of the GNU Lesser General Public License along with this #
// # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
// # ********************************************************************************************* #
// # Stephan Nolting, Hannover, Germany 26.11.2019 #
// # Stephan Nolting, Hannover, Germany 16.12.2019 #
// #################################################################################################
 
#include "neo430.h"
288,6 → 288,62
 
 
/* ------------------------------------------------------------
* INFO rotate word right by one position
* PARAM input operand to be rotated
* RETURN rotated result
* ------------------------------------------------------------ */
uint16_t neo430_rotate_right_w(uint16_t x) {
 
uint16_t tmp = x;
asm volatile ("rrc.w %[b]" : [b] "=r" (tmp) : "[b]" (tmp)); // get carry flag
asm volatile ("rrc.w %[b]" : [b] "=r" (x) : "[b]" (x)); // rotate input with according carry input
return x;
}
 
 
/* ------------------------------------------------------------
* INFO rotate word left by one position
* PARAM input operand to be rotated
* RETURN rotated result
* ------------------------------------------------------------ */
uint16_t neo430_rotate_left_w(uint16_t x) {
 
uint16_t tmp = x;
asm volatile ("rlc.w %[b]" : [b] "=r" (tmp) : "[b]" (tmp)); // get carry flag
asm volatile ("rlc.w %[b]" : [b] "=r" (x) : "[b]" (x)); // rotate input with according carry input
return x;
}
 
 
/* ------------------------------------------------------------
* INFO rotate byte right by one position
* PARAM input operand to be rotated
* RETURN rotated result
* ------------------------------------------------------------ */
uint8_t neo430_rotate_right_b(uint8_t x) {
 
uint8_t tmp = x;
asm volatile ("rrc.b %[b]" : [b] "=r" (tmp) : "[b]" (tmp)); // get carry flag
asm volatile ("rrc.b %[b]" : [b] "=r" (x) : "[b]" (x)); // rotate input with according carry input
return x;
}
 
 
/* ------------------------------------------------------------
* INFO rotate byte left by one position
* PARAM input operand to be rotated
* RETURN rotated result
* ------------------------------------------------------------ */
uint8_t neo430_rotate_left_b(uint8_t x) {
 
uint8_t tmp = x;
asm volatile ("rlc.b %[b]" : [b] "=r" (tmp) : "[b]" (tmp)); // get carry flag
asm volatile ("rlc.b %[b]" : [b] "=r" (x) : "[b]" (x)); // rotate input with according carry input
return x;
}
 
 
/* ------------------------------------------------------------
* INFO Pseudo-random number generator
* RETURN 32-bit random data
* ------------------------------------------------------------ */
/neo430/trunk/neo430/sw/lib/neo430/source/neo430_pwm.c
30,7 → 30,7
* INFO Reset and activate PWM controller
* PARAM prsc: Clock prescaler for PWM clock
* PARAM size: 1=use 8-bit counter, 0=use 4-bit counter
* PARAM gpio_pwm: Use channel 3 for GPIO.output modulation when '1'
* PARAM gpio_pwm: Use channel 3 for GPIO.output modulation when 1
* ------------------------------------------------------------ */
void neo430_pwm_enable(const uint16_t prsc, const uint16_t size, const uint16_t gpio_pwm) {
 
/neo430/trunk/neo430/sw/lib/neo430/source/neo430_spi.c
19,7 → 19,7
// # You should have received a copy of the GNU Lesser General Public License along with this #
// # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
// # ********************************************************************************************* #
// # Stephan Nolting, Hannover, Germany 04.10.2019 #
// # Stephan Nolting, Hannover, Germany 10.01.2020 #
// #################################################################################################
 
#include "neo430.h"
27,7 → 27,7
 
 
/* ------------------------------------------------------------
* INFO Reset, activate, configure and enable SPI module
* INFO Reset, configure speed and enable SPI module
* INFO SPI SCK speed: f_main/(2*PRSC), prsc = see below (control reg)
* SPI clock prescaler select:
* 0: CLK/2
56,22 → 56,21
 
 
/* ------------------------------------------------------------
* INFO Enable SPI CSx (set low)
* PARAM CS line (0..7)
* INFO Enable SPI CSx (set low), can be used to set several CS lines
* PARAM CS line (0..5)
* ------------------------------------------------------------ */
void neo430_spi_cs_en(uint8_t cs) {
 
SPI_CT &= ~(15 << SPI_CT_CS_SEL0); // clear CS selection AND CS_set
SPI_CT |= (1 << SPI_CT_CS_SET) | (cs << SPI_CT_CS_SEL0);
SPI_CT |= 1 << (cs+SPI_CT_CS_SEL0);
}
 
 
/* ------------------------------------------------------------
* INFO Disable all SPI CSx (set high)
* INFO Disable ALL SPI CS lines (set high)
* ------------------------------------------------------------ */
void neo430_spi_cs_dis(void) {
 
SPI_CT &= ~(1 << SPI_CT_CS_SET);
SPI_CT &= ~(0b111111 << SPI_CT_CS_SEL0); // clear all 6 CS lines
}
 
 
80,10 → 79,10
* PARAM d byte to be send
* RETURN received byte
* ------------------------------------------------------------ */
uint8_t neo430_spi_trans(uint8_t d) {
uint16_t neo430_spi_trans(uint16_t d) {
 
SPI_RTX = (uint16_t)d; // trigger transfer
SPI_RTX = d; // trigger transfer
while((SPI_CT & (1<<SPI_CT_BUSY)) != 0); // wait for current transfer to finish
 
return (uint8_t)SPI_RTX;
return SPI_RTX;
}
/neo430/trunk/neo430/sw/lib/neo430/source/neo430_timer.c
19,7 → 19,7
// # You should have received a copy of the GNU Lesser General Public License along with this #
// # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
// # ********************************************************************************************* #
// # Stephan Nolting, Hannover, Germany 10.12.2019 #
// # Stephan Nolting, Hannover, Germany 16.01.2020 #
// #################################################################################################
 
#include "neo430.h"
40,6 → 40,15
* ------------------------------------------------------------ */
void neo430_timer_disable(void) {
 
TMR_CT = 0;
}
 
 
/* ------------------------------------------------------------
* INFO Stop Timer
* ------------------------------------------------------------ */
void neo430_timer_stop(void) {
 
TMR_CT &= ~(1<<TMR_CT_EN);
}
 
57,7 → 66,7
/* ------------------------------------------------------------
* INFO Start Timer
* ------------------------------------------------------------ */
void neo430_timer_start(void) {
void neo430_timer_run(void) {
 
TMR_CT |= (1<<TMR_CT_RUN);
}
66,7 → 75,7
/* ------------------------------------------------------------
* INFO Stop Timer
* ------------------------------------------------------------ */
void neo430_timer_stop(void) {
void neo430_timer_pause(void) {
 
TMR_CT &= ~(1<<TMR_CT_RUN);
}
/neo430/trunk/neo430/sw/lib/neo430/source/neo430_trng.c
19,7 → 19,7
// # You should have received a copy of the GNU Lesser General Public License along with this #
// # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
// # ********************************************************************************************* #
// # Stephan Nolting, Hannover, Germany 27.11.2019 #
// # Stephan Nolting, Hannover, Germany 09.01.2020 #
// #################################################################################################
 
#include "neo430.h"
29,14 → 29,19
/* ------------------------------------------------------------
* INFO Enable TRNG
* ------------------------------------------------------------ */
void neo430_trng_enable(void) {
void neo430_trng_enable(uint16_t tap_mask) {
 
TRNG_CT = 0; // reset
TRNG_CT = (1<<TRNG_CT_EN);
 
// wait for unit to get oscillating
asm volatile ("nop");
asm volatile ("nop");
asm volatile("nop");
asm volatile("nop");
asm volatile("nop");
 
TRNG_CT = (1<<TRNG_CT_EN) | tap_mask;
 
asm volatile("nop");
asm volatile("nop");
asm volatile("nop");
}
 
 
50,11 → 55,16
 
 
/* ------------------------------------------------------------
* INFO Get TRNG data
* RETURN TRNG random data byte
* INFO Get TRNG data and status information
* PARAM byte-pointer to store random data
* RETURN is 0 when data is VALID
* ------------------------------------------------------------ */
uint8_t neo430_trng_get(void) {
uint16_t neo430_trng_get(uint8_t *data) {
 
asm volatile ("nop"); // make sure TRNG has enough time to sample a new number
return (uint8_t)(TRNG_CT & 0xFF);
uint16_t trng_ct = TRNG_CT;
*data = (uint8_t)trng_ct; // actual TRNG data
if (trng_ct & (1<<TRNG_CT_VALID)) // output data valid?
return 0;
else
return 1;
}
/neo430/trunk/neo430/sw/lib/neo430/source/neo430_twi.c
55,7 → 55,7
 
neo430_twi_generate_start(); // generate START condition
 
TWI_DATA = (uint16_t)a; // send data
TWI_DATA = (uint16_t)a; // send address
while(TWI_CT & (1 << TWI_CT_BUSY)); // wait until idle again
 
// check for ACK/NACK
85,7 → 85,7
 
 
/* ------------------------------------------------------------
* INFO Get receive data from previous transmission
* INFO Get rx data from previous transmission
* RETURN Last received data byte
* ------------------------------------------------------------ */
uint8_t neo430_twi_get_data(void) {
/neo430/trunk/neo430/sw/lib/neo430/source/neo430_uart.c
19,7 → 19,7
// # You should have received a copy of the GNU Lesser General Public License along with this #
// # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
// # ********************************************************************************************* #
// # Stephan Nolting, Hannover, Germany 21.11.2019 #
// # Stephan Nolting, Hannover, Germany 17.01.2020 #
// #################################################################################################
 
#include "neo430.h"
66,6 → 66,15
 
 
/* ------------------------------------------------------------
* INFO Disable UART
* ------------------------------------------------------------ */
void neo430_uart_disable(void){
 
UART_CT = 0;
}
 
 
/* ------------------------------------------------------------
* INFO Send single char via internal UART
* PARAM c char to send
* ------------------------------------------------------------ */
274,15 → 283,16
* INFO Slow custom version of itoa
* PARAM 32-bit value to be printed as decimal number
* PARAM show leading zeros when set
* PARAM pointer to array (11 elements!!!) to store conversion result string
* ------------------------------------------------------------ */
void neo430_itoa(uint32_t x, const uint16_t leading_zeros) {
void neo430_itoa(uint32_t x, const uint16_t leading_zeros, char *res) {
 
static const char numbers[10] = "0123456789";
char buffer1[11], buffer2[11];
char buffer1[11];
uint16_t i, j;
 
buffer1[10] = '\0';
buffer2[10] = '\0';
res[10] = '\0';
 
// convert
for (i=0; i<10; i++) {
302,12 → 312,10
j = 0;
do {
if (buffer1[i] != '\0')
buffer2[j++] = buffer1[i];
res[j++] = buffer1[i];
} while (i--);
 
buffer2[j] = '\0'; // terminate result string
 
neo430_uart_br_print(buffer2);
res[j] = '\0'; // terminate result string
}
 
 
320,7 → 328,7
* ------------------------------------------------------------ */
void neo430_printf(char *format, ...) {
 
char c;
char c, string_buf[11];
int32_t n;
 
va_list a;
345,10 → 353,12
n = -n;
neo430_uart_putc('-');
}
neo430_itoa((uint32_t)n, 0);
neo430_itoa((uint32_t)n, 0, string_buf);
neo430_uart_br_print(string_buf);
break;
case 'u': // 16-bit unsigned
neo430_itoa((uint32_t)va_arg(a, unsigned int), 0);
neo430_itoa((uint32_t)va_arg(a, unsigned int), 0, string_buf);
neo430_uart_br_print(string_buf);
break;
case 'l': // 32-bit long
n = (int32_t)va_arg(a, int32_t);
356,10 → 366,12
n = -n;
neo430_uart_putc('-');
}
neo430_itoa((uint32_t)n, 0);
neo430_itoa((uint32_t)n, 0, string_buf);
neo430_uart_br_print(string_buf);
break;
case 'n': // 32-bit unsigned long
neo430_itoa(va_arg(a, uint32_t), 0);
neo430_itoa(va_arg(a, uint32_t), 0, string_buf);
neo430_uart_br_print(string_buf);
break;
case 'x': // 16-bit hexadecimal
neo430_uart_print_hex_word(va_arg(a, unsigned int));
389,6 → 401,8
* ------------------------------------------------------------ */
void neo430_fp_print(int32_t num, const uint16_t fp) {
 
char string_buf[11];
 
// print integer part
int32_t num_int = num;
 
396,7 → 410,8
num_int = -num_int;
neo430_uart_putc('-');
}
neo430_itoa((uint32_t)num_int >> fp, 0);
neo430_itoa((uint32_t)num_int >> fp, 0, string_buf);
neo430_uart_br_print(string_buf);
 
neo430_uart_putc('.');
 
403,7 → 418,8
// print fractional part (3 digits)
uint32_t frac_part = (uint32_t)(num_int & ((1<<fp)-1));
frac_part = (frac_part * 1000) / (1<<fp);
neo430_itoa(frac_part, 2);
neo430_itoa(frac_part, 2, string_buf);
neo430_uart_br_print(string_buf);
}
 
 

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