URL
https://opencores.org/ocsvn/neorv32/neorv32/trunk
Subversion Repositories neorv32
Compare Revisions
- This comparison shows the changes necessary to convert path
/neorv32/trunk/sim
- from Rev 33 to Rev 34
- ↔ Reverse comparison
Rev 33 → Rev 34
/ghdl/ghdl_sim.sh
4,7 → 4,7
set -e |
|
# Default simulation configuration |
SIM_CONFIG=--stop-time=5ms |
SIM_CONFIG=--stop-time=6ms |
|
# Project home folder |
homedir="$( cd "$(dirname "$0")" >/dev/null 2>&1 ; pwd -P )" |
41,7 → 41,8
# |
ghdl -a --work=neorv32 $srcdir_core/neorv32_boot_rom.vhd |
ghdl -a --work=neorv32 $srcdir_core/neorv32_busswitch.vhd |
ghdl -a --work=neorv32 $srcdir_core/neorv32_cfu.vhd |
ghdl -a --work=neorv32 $srcdir_core/neorv32_cfu0.vhd |
ghdl -a --work=neorv32 $srcdir_core/neorv32_cfu1.vhd |
ghdl -a --work=neorv32 $srcdir_core/neorv32_cpu.vhd |
ghdl -a --work=neorv32 $srcdir_core/neorv32_cpu_alu.vhd |
ghdl -a --work=neorv32 $srcdir_core/neorv32_cpu_bus.vhd |
/neorv32_tb.vhd
167,6 → 167,7
CPU_EXTENSION_RISCV_Zifencei => true, -- implement instruction stream sync.? |
-- Extension Options -- |
FAST_MUL_EN => false, -- use DSPs for M extension's multiplier |
FAST_SHIFT_EN => false, -- use barrel shifter for shift operations |
-- Physical Memory Protection (PMP) -- |
PMP_USE => true, -- implement PMP? |
PMP_NUM_REGIONS => 4, -- number of regions (max 16) |
190,43 → 191,46
IO_PWM_USE => true, -- implement pulse-width modulation unit (PWM)? |
IO_WDT_USE => true, -- implement watch dog timer (WDT)? |
IO_TRNG_USE => false, -- DEFAULT TRNG CONFIG CANNOT BE SIMULATED! |
IO_CFU_USE => true -- implement custom functions unit (CFU)? |
IO_CFU0_USE => true, -- implement custom functions unit 0 (CFU0)? |
IO_CFU1_USE => true -- implement custom functions unit 1 (CFU1)? |
) |
port map ( |
-- Global control -- |
clk_i => clk_gen, -- global clock, rising edge |
rstn_i => rst_gen, -- global reset, low-active, async |
clk_i => clk_gen, -- global clock, rising edge |
rstn_i => rst_gen, -- global reset, low-active, async |
-- Wishbone bus interface -- |
wb_adr_o => wb_cpu.addr, -- address |
wb_dat_i => wb_cpu.rdata, -- read data |
wb_dat_o => wb_cpu.wdata, -- write data |
wb_we_o => wb_cpu.we, -- read/write |
wb_sel_o => wb_cpu.sel, -- byte enable |
wb_stb_o => wb_cpu.stb, -- strobe |
wb_cyc_o => wb_cpu.cyc, -- valid cycle |
wb_ack_i => wb_cpu.ack, -- transfer acknowledge |
wb_err_i => wb_cpu.err, -- transfer error |
wb_adr_o => wb_cpu.addr, -- address |
wb_dat_i => wb_cpu.rdata, -- read data |
wb_dat_o => wb_cpu.wdata, -- write data |
wb_we_o => wb_cpu.we, -- read/write |
wb_sel_o => wb_cpu.sel, -- byte enable |
wb_stb_o => wb_cpu.stb, -- strobe |
wb_cyc_o => wb_cpu.cyc, -- valid cycle |
wb_ack_i => wb_cpu.ack, -- transfer acknowledge |
wb_err_i => wb_cpu.err, -- transfer error |
-- Advanced memory control signals -- |
fence_o => open, -- indicates an executed FENCE operation |
fencei_o => open, -- indicates an executed FENCEI operation |
fence_o => open, -- indicates an executed FENCE operation |
fencei_o => open, -- indicates an executed FENCEI operation |
-- GPIO -- |
gpio_o => gpio, -- parallel output |
gpio_i => gpio, -- parallel input |
gpio_o => gpio, -- parallel output |
gpio_i => gpio, -- parallel input |
-- UART -- |
uart_txd_o => uart_txd, -- UART send data |
uart_rxd_i => uart_txd, -- UART receive data |
uart_txd_o => uart_txd, -- UART send data |
uart_rxd_i => uart_txd, -- UART receive data |
-- SPI -- |
spi_sck_o => open, -- SPI serial clock |
spi_sdo_o => spi_data, -- controller data out, peripheral data in |
spi_sdi_i => spi_data, -- controller data in, peripheral data out |
spi_csn_o => open, -- SPI CS |
spi_sck_o => open, -- SPI serial clock |
spi_sdo_o => spi_data, -- controller data out, peripheral data in |
spi_sdi_i => spi_data, -- controller data in, peripheral data out |
spi_csn_o => open, -- SPI CS |
-- TWI -- |
twi_sda_io => twi_sda, -- twi serial data line |
twi_scl_io => twi_scl, -- twi serial clock line |
twi_sda_io => twi_sda, -- twi serial data line |
twi_scl_io => twi_scl, -- twi serial clock line |
-- PWM -- |
pwm_o => open, -- pwm channels |
pwm_o => open, -- pwm channels |
-- Interrupts -- |
mext_irq_i => '0' -- machine external interrupt |
mtime_irq_i => '0', -- machine software interrupt, available if IO_MTIME_USE = false |
msw_irq_i => '0', -- machine software interrupt |
mext_irq_i => '0' -- machine external interrupt |
); |
|
-- TWI termination -- |