OpenCores
URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /neorv32/trunk/sim
    from Rev 40 to Rev 41
    Reverse comparison

Rev 40 → Rev 41

/ghdl/ghdl_sim.sh
41,6 → 41,7
#
ghdl -a --work=neorv32 $srcdir_core/neorv32_boot_rom.vhd
ghdl -a --work=neorv32 $srcdir_core/neorv32_busswitch.vhd
ghdl -a --work=neorv32 $srcdir_core/neorv32_cache.vhd
ghdl -a --work=neorv32 $srcdir_core/neorv32_cfu0.vhd
ghdl -a --work=neorv32 $srcdir_core/neorv32_cfu1.vhd
ghdl -a --work=neorv32 $srcdir_core/neorv32_cpu.vhd
/vivado/neorv32_tb_behav.wcfg
12,15 → 12,15
</db_ref>
</db_ref_list>
<zoom_setting>
<ZoomStartTime time="0fs"></ZoomStartTime>
<ZoomEndTime time="1111160fs"></ZoomEndTime>
<Cursor1Time time="15000fs"></Cursor1Time>
<ZoomStartTime time="396191834fs"></ZoomStartTime>
<ZoomEndTime time="396390835fs"></ZoomEndTime>
<Cursor1Time time="396225000fs"></Cursor1Time>
</zoom_setting>
<column_width_setting>
<NameColumnWidth column_width="203"></NameColumnWidth>
<ValueColumnWidth column_width="95"></ValueColumnWidth>
<ValueColumnWidth column_width="124"></ValueColumnWidth>
</column_width_setting>
<WVObjectSize size="121" />
<WVObjectSize size="122" />
<wvobject type="divider" fp_name="divider273">
<obj_property name="label">CPU: Control.FETCH</obj_property>
<obj_property name="DisplayName">label</obj_property>
153,7 → 153,6
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/atomic_ctrl" type="array">
<obj_property name="ElementShortName">atomic_ctrl</obj_property>
<obj_property name="ObjectShortName">atomic_ctrl</obj_property>
<obj_property name="isExpanded"></obj_property>
</wvobject>
<wvobject type="divider" fp_name="divider139">
<obj_property name="label">CPU: Control.TRAP</obj_property>
376,6 → 375,10
<obj_property name="ObjectShortName">st_pmp_fault</obj_property>
</wvobject>
<wvobject type="divider" fp_name="divider298">
<obj_property name="label">I-CACHE</obj_property>
<obj_property name="DisplayName">label</obj_property>
</wvobject>
<wvobject type="divider" fp_name="divider298">
<obj_property name="label">CPU: MULDIV CP</obj_property>
<obj_property name="DisplayName">label</obj_property>
</wvobject>
/neorv32_tb.vhd
55,6 → 55,7
-- general --
constant ext_imem_c : boolean := false; -- false: use and boot from proc-internal IMEM, true: use and boot from external (initialized) simulated IMEM (ext. mem A)
constant ext_dmem_c : boolean := false; -- false: use proc-internal DMEM, true: use external simulated DMEM (ext. mem B)
constant icache_use_c : boolean := false; -- set true to use processor-internal instruction cache
constant imem_size_c : natural := 16*1024; -- size in bytes of processor-internal IMEM / external mem A
constant dmem_size_c : natural := 8*1024; -- size in bytes of processor-internal DMEM / external mem B
constant f_clock_c : natural := 100000000; -- main clock in Hz
195,6 → 196,10
-- Internal Data memory --
MEM_INT_DMEM_USE => int_dmem_c, -- implement processor-internal data memory
MEM_INT_DMEM_SIZE => dmem_size_c, -- size of processor-internal data memory in bytes
-- Internal Cache memory --
ICACHE_USE => icache_use_c, -- implement instruction cache
ICACHE_NUM_BLOCKS => 8, -- i-cache: number of blocks (min 2), has to be a power of 2
ICACHE_BLOCK_SIZE => 64, -- i-cache: block size in bytes (min 4), has to be a power of 2
-- External memory interface --
MEM_EXT_USE => true, -- implement external memory bus interface?
-- Processor peripherals --

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.