URL
https://opencores.org/ocsvn/neorv32/neorv32/trunk
Subversion Repositories neorv32
Compare Revisions
- This comparison shows the changes necessary to convert path
/neorv32/trunk/sw/bootloader
- from Rev 13 to Rev 14
- ↔ Reverse comparison
Rev 13 → Rev 14
/bootloader.c
176,7 → 176,6
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// deactivate unused IO devices |
neorv32_wdt_disable(); |
neorv32_clic_disable(); |
neorv32_pwm_disable(); |
neorv32_spi_disable(); |
neorv32_trng_disable(); |
338,16 → 337,15
while ((UART_CT & (1<<UART_CT_TX_BUSY)) != 0); |
|
// reset performance counters (to benchmark actual application) |
asm volatile ("csrrw zero, mcycle, zero"); // will also clear 'cycle' |
asm volatile ("csrrw zero, mcycleh, zero"); // will also clear 'cycleh' |
asm volatile ("csrrw zero, minstret, zero"); // will also clear 'instret' |
asm volatile ("csrrw zero, minstreth, zero"); // will also clear 'instreth' |
asm volatile ("csrw mcycle, zero"); // will also clear 'cycle' |
asm volatile ("csrw mcycleh, zero"); // will also clear 'cycleh' |
asm volatile ("csrw minstret, zero"); // will also clear 'instret' |
asm volatile ("csrw minstreth, zero"); // will also clear 'instreth' |
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// start app at instruction space base address |
while (1) { |
register uint32_t app_base = SYSINFO_ISPACE_BASE; |
asm volatile ("jalr zero, %0" : : "r" (app_base)); |
} |
register uint32_t app_base = SYSINFO_ISPACE_BASE; |
asm volatile ("jalr zero, %0" : : "r" (app_base)); |
while (1); |
} |
|
|
359,7 → 357,7
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// make sure this was caused by MTIME IRQ |
uint32_t cause = neorv32_cpu_csr_read(CSR_MCAUSE); |
if (cause != EXCCODE_MTI) { // raw exception code for MTI |
if (cause != TRAP_CODE_MTI) { // raw exception code for MTI |
neorv32_uart_print("\n\nEXCEPTION: "); |
print_hex_word(cause); |
neorv32_uart_print(" @ 0x"); |