URL
https://opencores.org/ocsvn/neorv32/neorv32/trunk
Subversion Repositories neorv32
Compare Revisions
- This comparison shows the changes necessary to convert path
/neorv32/trunk/sw/bootloader
- from Rev 54 to Rev 55
- ↔ Reverse comparison
Rev 54 → Rev 55
/bootloader.c
1,7 → 1,7
// ################################################################################################# |
// # << NEORV32 - Bootloader >> # |
// # ********************************************************************************************* # |
// # In order to run the bootloader on any CPU configuration, the bootloader should be compiled # |
// # In order to run the bootloader on *any* CPU configuration, the bootloader should be compiled # |
// # unsing the base ISA (rv32i/rv32e) only. # |
// # ********************************************************************************************* # |
// # Boot from (internal) instruction memory, UART or SPI Flash. # |
18,7 → 18,7
// # ********************************************************************************************* # |
// # BSD 3-Clause License # |
// # # |
// # Copyright (c) 2020, Stephan Nolting. All rights reserved. # |
// # Copyright (c) 2021, Stephan Nolting. All rights reserved. # |
// # # |
// # Redistribution and use in source and binary forms, with or without modification, are # |
// # permitted provided that the following conditions are met: # |
261,10 → 261,12
print_hex_word(neorv32_cpu_csr_read(CSR_MIMPID)); |
neorv32_uart_print("\nCLK: "); |
print_hex_word(SYSINFO_CLK); |
neorv32_uart_print(" Hz\nUSER: "); |
neorv32_uart_print("\nUSER: "); |
print_hex_word(SYSINFO_USER_CODE); |
neorv32_uart_print("\nMISA: "); |
print_hex_word(neorv32_cpu_csr_read(CSR_MISA)); |
neorv32_uart_print("\nZEXT: "); |
print_hex_word(neorv32_cpu_csr_read(CSR_MZEXT)); |
neorv32_uart_print("\nPROC: "); |
print_hex_word(SYSINFO_FEATURES); |
neorv32_uart_print("\nIMEM: "); |
/makefile
1,11 → 1,11
################################################################################################# |
# << NEORV32 - Application Makefile >> # |
# ********************************************************************************************* # |
# Make sure to add the riscv GCC compiler's bin folder to your PATH environment variable. # |
# Make sure to add the RISC-V GCC compiler's bin folder to your PATH environment variable. # |
# ********************************************************************************************* # |
# BSD 3-Clause License # |
# # |
# Copyright (c) 2020, Stephan Nolting. All rights reserved. # |
# Copyright (c) 2021, Stephan Nolting. All rights reserved. # |
# # |
# Redistribution and use in source and binary forms, with or without modification, are # |
# permitted provided that the following conditions are met: # |
126,7 → 126,7
IMAGE_GEN = $(NEORV32_EXG_PATH)/image_gen |
|
# Compiler & linker flags |
CC_OPTS = $(MARCH) $(MABI) $(EFFORT) -Wall -ffunction-sections -fdata-sections -nostartfiles |
CC_OPTS = $(MARCH) $(MABI) $(EFFORT) -Wall -ffunction-sections -fdata-sections -nostartfiles -mno-fdiv |
CC_OPTS += -Wl,--gc-sections -lm -lc -lgcc -lc |
# This accelerates instruction fetch after branches when C extension is enabled (irrelevant when C extension is disabled) |
CC_OPTS += -falign-functions=4 -falign-labels=4 -falign-loops=4 -falign-jumps=4 |