OpenCores
URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /neorv32/trunk/sw/bootloader
    from Rev 59 to Rev 60
    Reverse comparison

Rev 59 → Rev 60

/bootloader.c
2,9 → 2,10
// # << NEORV32 - Bootloader >> #
// # ********************************************************************************************* #
// # In order to run the bootloader on *any* CPU configuration, the bootloader should be compiled #
// # unsing the base ISA (rv32i/rv32e) only. #
// # using the base ISA (rv32i/rv32e) only. #
// # ********************************************************************************************* #
// # Boot from (internal) instruction memory, UART or SPI Flash. #
// # Bootloader executables (neorv32_exe.bin) are LITTLE-ENDIAN! #
// # #
// # The bootloader uses the primary UART (UART0) for user console interface. #
// # #
226,7 → 227,7
// Configure machine system timer interrupt for ~2Hz
neorv32_mtime_set_timecmp(neorv32_mtime_get_time() + (clock_speed/4));
 
// confiure trap handler (bare-metal, no neorv32 rte available)
// configure trap handler (bare-metal, no neorv32 rte available)
neorv32_cpu_csr_write(CSR_MTVEC, (uint32_t)(&bootloader_trap_handler));
 
// active timer IRQ
250,7 → 251,7
neorv32_uart_print("\n");
start_app();
 
return 0;
return 1; // bootloader should never return
#endif
 
 
343,7 → 344,7
}
}
 
return 0; // bootloader should never return
return 1; // bootloader should never return
}
 
 
599,10 → 600,10
uint32_t i;
for (i=0; i<4; i++) {
if (src == EXE_STREAM_UART) {
data.uint8[3-i] = (uint8_t)neorv32_uart_getc();
data.uint8[i] = (uint8_t)neorv32_uart_getc();
}
else {
data.uint8[3-i] = spi_flash_read_byte(addr + i);
data.uint8[i] = spi_flash_read_byte(addr + i);
}
}
 
712,7 → 713,7
 
int i;
for (i=0; i<4; i++) {
spi_flash_write_byte(addr + i, data.uint8[3-i]);
spi_flash_write_byte(addr + i, data.uint8[i]);
}
}
 

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