URL
https://opencores.org/ocsvn/neorv32/neorv32/trunk
Subversion Repositories neorv32
Compare Revisions
- This comparison shows the changes necessary to convert path
/neorv32/trunk/sw/common
- from Rev 62 to Rev 63
- ↔ Reverse comparison
Rev 62 → Rev 63
/common.mk
39,6 → 39,8
NEORV32_EXG_PATH = $(NEORV32_HOME)/sw/image_gen |
# Path to NEORV32 core rtl folder |
NEORV32_RTL_PATH = $(NEORV32_HOME)/rtl/core |
# Path to NEORV32 sim folder |
NEORV32_SIM_PATH = $(NEORV32_HOME)/sim |
# Marker file to check for NEORV32 home folder |
NEORV32_HOME_MARKER = $(NEORV32_INC_PATH)/neorv32.h |
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115,7 → 117,7
# Image generator targets |
# ----------------------------------------------------------------------------- |
# install/compile tools |
$(IMAGE_GEN): $(NEORV32_EXG_PATH)/image_gen.cpp |
$(IMAGE_GEN): $(NEORV32_EXG_PATH)/image_gen.c |
@echo Compiling $(IMAGE_GEN) |
@$(CC_X86) $< -o $(IMAGE_GEN) |
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263,6 → 265,13
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# ----------------------------------------------------------------------------- |
# In-console simulation using default testbench and GHDL |
# ----------------------------------------------------------------------------- |
sim: $(APP_IMG) |
@echo "Simulating $(APP_IMG)..." |
@sh $(NEORV32_SIM_PATH)/ghdl.sh |
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# ----------------------------------------------------------------------------- |
# Show final ELF details (just for debugging) |
# ----------------------------------------------------------------------------- |
elf_info: main.elf |
282,6 → 291,7
@echo " exe - compile and generate <neorv32_exe.bin> executable for upload via bootloader" |
@echo " hex - compile and generate <neorv32_exe.hex> executable raw file" |
@echo " install - compile, generate and install VHDL IMEM boot image (for application)" |
@echo " sim - in-console simulation using default testbench and GHDL" |
@echo " all - exe + hex + install" |
@echo " elf_info - show ELF layout info" |
@echo " clean - clean up project" |
/crt0.S
87,13 → 87,7
csrw minstret, zero // reset instruction counters |
csrw minstreth, zero |
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#if defined(__riscv_flen) |
li x11, 0x00005000 // enable FPU (state = initial) |
csrs mstatus, x11 |
csrw fcsr, zero // reset floating-point CSR |
#endif |
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// ************************************************************************************************ |
// Initialize integer register file (lower half) |
// ************************************************************************************************ |