URL
https://opencores.org/ocsvn/neorv32/neorv32/trunk
Subversion Repositories neorv32
Compare Revisions
- This comparison shows the changes necessary to convert path
/neorv32/trunk/sw/lib/include
- from Rev 57 to Rev 58
- ↔ Reverse comparison
Rev 57 → Rev 58
/neorv32.h
100,7 → 100,7
CSR_MEPC = 0x341, /**< 0x341 - mepc (r/w): Machine exception program counter */ |
CSR_MCAUSE = 0x342, /**< 0x342 - mcause (r/w): Machine trap cause */ |
CSR_MTVAL = 0x343, /**< 0x343 - mtval (r/w): Machine bad address or instruction */ |
CSR_MIP = 0x344, /**< 0x344 - mip (r/w): Machine interrupt pending register */ |
CSR_MIP = 0x344, /**< 0x344 - mip (r/-): Machine interrupt pending register */ |
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CSR_PMPCFG0 = 0x3a0, /**< 0x3a0 - pmpcfg0 (r/w): Physical memory protection configuration register 0 */ |
CSR_PMPCFG1 = 0x3a1, /**< 0x3a1 - pmpcfg1 (r/w): Physical memory protection configuration register 1 */ |
511,7 → 511,9
CSR_MZEXT_ZBA = 4, /**< CPU mzext CSR (4): Zba extension (B sub-extension) available when set (r/-) */ |
CSR_MZEXT_ZFINX = 5, /**< CPU mzext CSR (5): Zfinx extension (F sub-/alternative-extension) available when set (r/-) */ |
CSR_MZEXT_ZXSCNT = 6, /**< CPU mzext CSR (6): Custom extension - Small CPU counters: "cycle" & "instret" CSRs have less than 64-bit when set (r/-) */ |
CSR_MZEXT_ZXNOCNT = 7 /**< CPU mzext CSR (7): Custom extension - NO CPU counters: "cycle" & "instret" CSRs are NOT available at all when set (r/-) */ |
CSR_MZEXT_ZXNOCNT = 7, /**< CPU mzext CSR (7): Custom extension - NO CPU counters: "cycle" & "instret" CSRs are NOT available at all when set (r/-) */ |
CSR_MZEXT_PMP = 8, /**< CPU mzext CSR (8): PMP (physical memory protection) extension available when set (r/-) */ |
CSR_MZEXT_HPM = 9 /**< CPU mzext CSR (9): HPM (hardware performance monitors) extension available when set (r/-) */ |
}; |
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553,6 → 555,7
TRAP_CODE_S_ACCESS = 0x00000007, /**< 0.7: Store (bus) access fault */ |
TRAP_CODE_UENV_CALL = 0x00000008, /**< 0.8: Environment call from user mode (ECALL instruction) */ |
TRAP_CODE_MENV_CALL = 0x0000000b, /**< 0.11: Environment call from machine mode (ECALL instruction) */ |
TRAP_CODE_NMI = 0x80000000, /**< 1.0: Non-maskable interrupt */ |
TRAP_CODE_MSI = 0x80000003, /**< 1.3: Machine software interrupt */ |
TRAP_CODE_MTI = 0x80000007, /**< 1.7: Machine timer interrupt */ |
TRAP_CODE_MEI = 0x8000000b, /**< 1.11: Machine external interrupt */ |
/neorv32_rte.h
56,25 → 56,26
RTE_TRAP_S_ACCESS = 7, /**< Store (bus) access fault */ |
RTE_TRAP_UENV_CALL = 8, /**< Environment call from user mode (ECALL instruction) */ |
RTE_TRAP_MENV_CALL = 9, /**< Environment call from machine mode (ECALL instruction) */ |
RTE_TRAP_MSI = 10, /**< Machine software interrupt */ |
RTE_TRAP_MTI = 11, /**< Machine timer interrupt */ |
RTE_TRAP_MEI = 12, /**< Machine external interrupt */ |
RTE_TRAP_FIRQ_0 = 13, /**< Fast interrupt channel 0 */ |
RTE_TRAP_FIRQ_1 = 14, /**< Fast interrupt channel 1 */ |
RTE_TRAP_FIRQ_2 = 15, /**< Fast interrupt channel 2 */ |
RTE_TRAP_FIRQ_3 = 16, /**< Fast interrupt channel 3 */ |
RTE_TRAP_FIRQ_4 = 17, /**< Fast interrupt channel 4 */ |
RTE_TRAP_FIRQ_5 = 18, /**< Fast interrupt channel 5 */ |
RTE_TRAP_FIRQ_6 = 19, /**< Fast interrupt channel 6 */ |
RTE_TRAP_FIRQ_7 = 20, /**< Fast interrupt channel 7 */ |
RTE_TRAP_FIRQ_8 = 21, /**< Fast interrupt channel 8 */ |
RTE_TRAP_FIRQ_9 = 22, /**< Fast interrupt channel 9 */ |
RTE_TRAP_FIRQ_10 = 23, /**< Fast interrupt channel 10 */ |
RTE_TRAP_FIRQ_11 = 24, /**< Fast interrupt channel 11 */ |
RTE_TRAP_FIRQ_12 = 25, /**< Fast interrupt channel 12 */ |
RTE_TRAP_FIRQ_13 = 26, /**< Fast interrupt channel 13 */ |
RTE_TRAP_FIRQ_14 = 27, /**< Fast interrupt channel 14 */ |
RTE_TRAP_FIRQ_15 = 28 /**< Fast interrupt channel 15 */ |
RTE_TRAP_NMI = 10, /**< Non-maskable interrupt */ |
RTE_TRAP_MSI = 11, /**< Machine software interrupt */ |
RTE_TRAP_MTI = 12, /**< Machine timer interrupt */ |
RTE_TRAP_MEI = 13, /**< Machine external interrupt */ |
RTE_TRAP_FIRQ_0 = 14, /**< Fast interrupt channel 0 */ |
RTE_TRAP_FIRQ_1 = 15, /**< Fast interrupt channel 1 */ |
RTE_TRAP_FIRQ_2 = 16, /**< Fast interrupt channel 2 */ |
RTE_TRAP_FIRQ_3 = 17, /**< Fast interrupt channel 3 */ |
RTE_TRAP_FIRQ_4 = 18, /**< Fast interrupt channel 4 */ |
RTE_TRAP_FIRQ_5 = 19, /**< Fast interrupt channel 5 */ |
RTE_TRAP_FIRQ_6 = 20, /**< Fast interrupt channel 6 */ |
RTE_TRAP_FIRQ_7 = 21, /**< Fast interrupt channel 7 */ |
RTE_TRAP_FIRQ_8 = 22, /**< Fast interrupt channel 8 */ |
RTE_TRAP_FIRQ_9 = 23, /**< Fast interrupt channel 9 */ |
RTE_TRAP_FIRQ_10 = 24, /**< Fast interrupt channel 10 */ |
RTE_TRAP_FIRQ_11 = 25, /**< Fast interrupt channel 11 */ |
RTE_TRAP_FIRQ_12 = 26, /**< Fast interrupt channel 12 */ |
RTE_TRAP_FIRQ_13 = 27, /**< Fast interrupt channel 13 */ |
RTE_TRAP_FIRQ_14 = 28, /**< Fast interrupt channel 14 */ |
RTE_TRAP_FIRQ_15 = 29 /**< Fast interrupt channel 15 */ |
}; |
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81,7 → 82,7
/**********************************************************************//** |
* NEORV32 runtime environment: Number of available traps. |
**************************************************************************/ |
#define NEORV32_RTE_NUM_TRAPS 29 |
#define NEORV32_RTE_NUM_TRAPS 30 |
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// prototypes |