URL
https://opencores.org/ocsvn/neorv32/neorv32/trunk
Subversion Repositories neorv32
Compare Revisions
- This comparison shows the changes necessary to convert path
/neorv32/trunk/sw/lib/source
- from Rev 33 to Rev 34
- ↔ Reverse comparison
Rev 33 → Rev 34
/neorv32_cfu.c
1,5 → 1,5
// ################################################################################################# |
// # << NEORV32: neorv32_cfu.c - Custom Functions Unit (CFU) HW Driver >> # |
// # << NEORV32: neorv32_cfu.c - Custom Functions Unit 0/1 (CFU0/CFU1) HW Driver (stub) >> # |
// # ********************************************************************************************* # |
// # BSD 3-Clause License # |
// # # |
36,12 → 36,12
/**********************************************************************//** |
* @file neorv32_cfu.c |
* @author Stephan Nolting |
* @brief Custom functions unit (CFU) HW driver source file. |
* @brief Custom Functions Unit 0/1 (CFU0/CFU1) HW driver source file. |
* |
* @warning There are no "real" CFU driver functions available here, because these functions are defined by the actual hardware. |
* @warning Hence, the CFU designer has to provide the actual driver functions. |
* |
* @note These functions should only be used if the CFU was synthesized (IO_CFU_USE = true). |
* @note These functions should only be used if the CFU0/CFU1 was synthesized (IO_CFU0_USE/IO_CFU1_USE = true). |
**************************************************************************/ |
|
#include "neorv32.h" |
49,13 → 49,13
|
|
/**********************************************************************//** |
* Check if CFU unit was synthesized. |
* Check if custom functions unit 0 was synthesized. |
* |
* @return 0 if CFU was not synthesized, 1 if CFU is available. |
* @return 0 if CFU0 was not synthesized, 1 if CFU0 is available. |
**************************************************************************/ |
int neorv32_cfu_available(void) { |
int neorv32_cfu0_available(void) { |
|
if (SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_IO_CFU)) { |
if (SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_IO_CFU0)) { |
return 1; |
} |
else { |
62,3 → 62,19
return 0; |
} |
} |
|
|
/**********************************************************************//** |
* Check if custom functions unit 1 was synthesized. |
* |
* @return 0 if CFU1 was not synthesized, 1 if CFU1 is available. |
**************************************************************************/ |
int neorv32_cfu1_available(void) { |
|
if (SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_IO_CFU1)) { |
return 1; |
} |
else { |
return 0; |
} |
} |
/neorv32_rte.c
308,8 → 308,69
} |
|
|
// Misc |
neorv32_uart_printf("\n\n\n-- Processor --\n"); |
// check physical memory protection |
neorv32_uart_printf("\n\nPhysical memory protection: "); |
if (neorv32_cpu_csr_read(CSR_MZEXT) & (1<<CPU_MZEXT_PMP)) { |
|
// check granulartiy |
neorv32_cpu_csr_write(CSR_PMPCFG0, 0); |
neorv32_cpu_csr_write(CSR_PMPADDR0, 0xffffffff); |
uint32_t pmp_test_g = neorv32_cpu_csr_read(0x3b0); |
|
// find least-significat set bit |
for (i=31; i!=0; i--) { |
if (((pmp_test_g >> i) & 1) == 0) { |
break; |
} |
} |
|
neorv32_uart_printf("\n- Min granularity: "); |
if (i < 29) { |
neorv32_uart_printf("%u bytes per region (0x%x)\n", (uint32_t)(1 << (i+1+2)), pmp_test_g); |
} |
else { |
neorv32_uart_printf("2^%u bytes per region\n", i+1+2); |
} |
|
|
// test available modes |
neorv32_uart_printf("- Mode TOR: "); |
neorv32_cpu_csr_write(CSR_PMPCFG0, 0x08); |
if ((neorv32_cpu_csr_read(CSR_PMPCFG0) & 0xFF) == 0x08) { |
neorv32_uart_printf("available\n"); |
} |
else { |
neorv32_uart_printf("not implemented\n"); |
} |
|
neorv32_uart_printf("- Mode NA4: "); |
neorv32_cpu_csr_write(CSR_PMPCFG0, 0x10); |
if ((neorv32_cpu_csr_read(CSR_PMPCFG0) & 0xFF) == 0x10) { |
neorv32_uart_printf("available\n"); |
} |
else { |
neorv32_uart_printf("not implemented\n"); |
} |
|
neorv32_uart_printf("- Mode NAPOT: "); |
neorv32_cpu_csr_write(CSR_PMPCFG0, 0x18); |
if ((neorv32_cpu_csr_read(CSR_PMPCFG0) & 0xFF) == 0x18) { |
neorv32_uart_printf("available\n"); |
} |
else { |
neorv32_uart_printf("not implemented\n"); |
} |
|
// deactivate entry |
neorv32_cpu_csr_write(CSR_PMPCFG0, 0); |
} |
else { |
neorv32_uart_printf("not implemented\n"); |
} |
|
|
// Misc - system |
neorv32_uart_printf("\n\n-- Processor --\n"); |
neorv32_uart_printf("Clock: %u Hz\n", SYSINFO_CLK); |
neorv32_uart_printf("User ID: 0x%x\n", SYSINFO_USER_CODE); |
|
364,8 → 425,11
neorv32_uart_printf("TRNG: "); |
__neorv32_rte_print_true_false(tmp & (1 << SYSINFO_FEATURES_IO_TRNG)); |
|
neorv32_uart_printf("CFU: "); |
__neorv32_rte_print_true_false(tmp & (1 << SYSINFO_FEATURES_IO_CFU)); |
neorv32_uart_printf("CFU0: "); |
__neorv32_rte_print_true_false(tmp & (1 << SYSINFO_FEATURES_IO_CFU0)); |
|
neorv32_uart_printf("CFU1: "); |
__neorv32_rte_print_true_false(tmp & (1 << SYSINFO_FEATURES_IO_CFU1)); |
} |
|
|
/neorv32_uart.c
72,6 → 72,7
* Enable and configure UART. |
* |
* @warning The 'UART_SIM_MODE' compiler flag will redirect all UART TX data to the simulation output. Use this for simulations only! |
* @warning To enable simulation mode add <USER_FLAGS+=-DUART_SIM_MODE> when compiling. |
* |
* @param[in] baudrate Targeted BAUD rate (e.g. 9600). |
* @param[in] rx_irq Enable RX interrupt (data received) when 1. |