URL
https://opencores.org/ocsvn/neorv32/neorv32/trunk
Subversion Repositories neorv32
Compare Revisions
- This comparison shows the changes necessary to convert path
/neorv32/trunk/sw/lib/source
- from Rev 35 to Rev 36
- ↔ Reverse comparison
Rev 35 → Rev 36
/neorv32_spi.c
66,11 → 66,10
* |
* @param[in] prsc Clock prescaler select (0..7). See #NEORV32_CLOCK_PRSC_enum. |
* @param[in] clk_polarity Idle clock polarity (0, 1). |
* @param[in] dir Shift direction (0: MSB first, 1: LSB first). |
* @param[in] data_size Data transfer size (0: 8-bit, 1: 16-bit, 2: 24-bit, 3: 32-bit). |
* @param[in] irq_en Enable transfer-done interrupt when 1. |
**************************************************************************/ |
void neorv32_spi_setup(uint8_t prsc, uint8_t clk_polarity, uint8_t dir, uint8_t data_size, uint8_t irq_en) { |
void neorv32_spi_setup(uint8_t prsc, uint8_t clk_polarity, uint8_t data_size, uint8_t irq_en) { |
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SPI_CT = 0; // reset |
|
83,9 → 82,6
uint32_t ct_polarity = (uint32_t)(clk_polarity & 0x01); |
ct_polarity = ct_polarity << SPI_CT_CPHA; |
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uint32_t ct_dir = (uint32_t)(dir & 0x01); |
ct_dir = ct_dir << SPI_CT_DIR; |
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uint32_t ct_size = (uint32_t)(data_size & 0x03); |
ct_size = ct_size << SPI_CT_SIZE0; |
|
92,7 → 88,7
uint32_t ct_irq = (uint32_t)(irq_en & 0x01); |
ct_irq = ct_irq << SPI_CT_IRQ_EN; |
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SPI_CT = ct_enable | ct_prsc | ct_polarity | ct_dir | ct_size | ct_irq; |
SPI_CT = ct_enable | ct_prsc | ct_polarity | ct_size | ct_irq; |
} |
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|
138,6 → 134,8
/**********************************************************************//** |
* Initiate SPI transfer. |
* |
* @warning The SPI always sends MSB first. |
* |
* @note This function is blocking. |
* |
* @param tx_data Transmit data (8/16/24/32-bit, LSB-aligned). |
/neorv32_uart.c
71,7 → 71,7
/**********************************************************************//** |
* Enable and configure UART. |
* |
* @warning The 'UART_SIM_MODE' compiler flag will redirect all UART TX data to the simulation output. Use this for simulations only! |
* @warning The 'UART_SIM_MODE' compiler flag will configure UART for simulation mode: all UART TX data will be redirected to simulation output. Use this for simulations only! |
* @warning To enable simulation mode add <USER_FLAGS+=-DUART_SIM_MODE> when compiling. |
* |
* @param[in] baudrate Targeted BAUD rate (e.g. 9600). |
82,14 → 82,21
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UART_CT = 0; // reset |
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// raw baud rate prescaler |
uint32_t clock = SYSINFO_CLK; |
uint16_t i = 0; // BAUD rate divisor |
uint8_t p = 0; // prsc = CLK/2 |
uint8_t p = 0; // initial prsc = CLK/2 |
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// raw clock prescaler |
#ifdef __riscv_div |
// use div instructions |
i = (uint16_t)(clock / (2*baudrate)); |
#else |
// division via repeated subtraction |
while (clock >= 2*baudrate) { |
clock -= 2*baudrate; |
i++; |
} |
#endif |
|
// find clock prsc |
while (i >= 0x0fff) { |